diff --git a/src/ieu/aes_common/aesinvmixcolumns.sv b/src/ieu/aes_common/aesinvmixcolumns.sv index 03c1962a0..5ef6b2e9c 100644 --- a/src/ieu/aes_common/aesinvmixcolumns.sv +++ b/src/ieu/aes_common/aesinvmixcolumns.sv @@ -26,23 +26,23 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aesinvmixcolumns( - input logic [31:0] in, - output logic [31:0] out + input logic [31:0] a, + output logic [31:0] y ); - logic [7:0] in0, in1, in2, in3, temp; + logic [7:0] a0, a1, a2, a3, temp; logic [10:0] xor0, xor1, xor2, xor3; - assign {in0, in1, in2, in3} = in; - assign temp = in0 ^ in1 ^ in2 ^ in3; + assign {a0, a1, a2, a3} = a; + assign temp = a0 ^ a1 ^ a2 ^ a3; - assign xor0 = {temp, 3'b0} ^ {1'b0, in3^in1, 2'b0} ^ {2'b0, in3^in2, 1'b0} ^ {3'b0, temp} ^ {3'b0, in3}; - assign xor1 = {temp, 3'b0} ^ {1'b0, in2^in0, 2'b0} ^ {2'b0, in2^in1, 1'b0} ^ {3'b0, temp} ^ {3'b0, in2}; - assign xor2 = {temp, 3'b0} ^ {1'b0, in1^in3, 2'b0} ^ {2'b0, in1^in0, 1'b0} ^ {3'b0, temp} ^ {3'b0, in1}; - assign xor3 = {temp, 3'b0} ^ {1'b0, in0^in2, 2'b0} ^ {2'b0, in0^in3, 1'b0} ^ {3'b0, temp} ^ {3'b0, in0}; + assign xor0 = {temp, 3'b0} ^ {1'b0, a3^a1, 2'b0} ^ {2'b0, a3^a2, 1'b0} ^ {3'b0, temp} ^ {3'b0, a3}; + assign xor1 = {temp, 3'b0} ^ {1'b0, a2^a0, 2'b0} ^ {2'b0, a2^a1, 1'b0} ^ {3'b0, temp} ^ {3'b0, a2}; + assign xor2 = {temp, 3'b0} ^ {1'b0, a1^a3, 2'b0} ^ {2'b0, a1^a0, 1'b0} ^ {3'b0, temp} ^ {3'b0, a1}; + assign xor3 = {temp, 3'b0} ^ {1'b0, a0^a2, 2'b0} ^ {2'b0, a0^a3, 1'b0} ^ {3'b0, temp} ^ {3'b0, a0}; - galoismultinverse gm0 (xor0, out[7:0]); - galoismultinverse gm1 (xor1, out[15:8]); - galoismultinverse gm2 (xor2, out[23:16]); - galoismultinverse gm3 (xor3, out[31:24]); + galoismultinverse gm0 (xor0, y[7:0]); + galoismultinverse gm1 (xor1, y[15:8]); + galoismultinverse gm2 (xor2, y[23:16]); + galoismultinverse gm3 (xor3, y[31:24]); endmodule diff --git a/src/ieu/aes_common/aesinvsbox.sv b/src/ieu/aes_common/aesinvsbox.sv index c8735baac..3d62e30f2 100644 --- a/src/ieu/aes_common/aesinvsbox.sv +++ b/src/ieu/aes_common/aesinvsbox.sv @@ -26,267 +26,267 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aesinvsbox( - input logic [7:0] in, - output logic [7:0] out + input logic [7:0] a, + output logic [7:0] y ); always_comb - case(in) - 8'h00 : out = 8'h52; - 8'h01 : out = 8'h09; - 8'h02 : out = 8'h6A; - 8'h03 : out = 8'hD5; - 8'h04 : out = 8'h30; - 8'h05 : out = 8'h36; - 8'h06 : out = 8'hA5; - 8'h07 : out = 8'h38; - 8'h08 : out = 8'hBF; - 8'h09 : out = 8'h40; - 8'h0A : out = 8'hA3; - 8'h0B : out = 8'h9E; - 8'h0C : out = 8'h81; - 8'h0D : out = 8'hF3; - 8'h0E : out = 8'hD7; - 8'h0F : out = 8'hFB; - 8'h10 : out = 8'h7C; - 8'h11 : out = 8'hE3; - 8'h12 : out = 8'h39; - 8'h13 : out = 8'h82; - 8'h14 : out = 8'h9B; - 8'h15 : out = 8'h2F; - 8'h16 : out = 8'hFF; - 8'h17 : out = 8'h87; - 8'h18 : out = 8'h34; - 8'h19 : out = 8'h8E; - 8'h1A : out = 8'h43; - 8'h1B : out = 8'h44; - 8'h1C : out = 8'hC4; - 8'h1D : out = 8'hDE; - 8'h1E : out = 8'hE9; - 8'h1F : out = 8'hCB; - 8'h20 : out = 8'h54; - 8'h21 : out = 8'h7B; - 8'h22 : out = 8'h94; - 8'h23 : out = 8'h32; - 8'h24 : out = 8'hA6; - 8'h25 : out = 8'hC2; - 8'h26 : out = 8'h23; - 8'h27 : out = 8'h3D; - 8'h28 : out = 8'hEE; - 8'h29 : out = 8'h4C; - 8'h2A : out = 8'h95; - 8'h2B : out = 8'h0B; - 8'h2C : out = 8'h42; - 8'h2D : out = 8'hFA; - 8'h2E : out = 8'hC3; - 8'h2F : out = 8'h4E; - 8'h30 : out = 8'h08; - 8'h31 : out = 8'h2E; - 8'h32 : out = 8'hA1; - 8'h33 : out = 8'h66; - 8'h34 : out = 8'h28; - 8'h35 : out = 8'hD9; - 8'h36 : out = 8'h24; - 8'h37 : out = 8'hB2; - 8'h38 : out = 8'h76; - 8'h39 : out = 8'h5B; - 8'h3A : out = 8'hA2; - 8'h3B : out = 8'h49; - 8'h3C : out = 8'h6D; - 8'h3D : out = 8'h8B; - 8'h3E : out = 8'hD1; - 8'h3F : out = 8'h25; - 8'h40 : out = 8'h72; - 8'h41 : out = 8'hF8; - 8'h42 : out = 8'hF6; - 8'h43 : out = 8'h64; - 8'h44 : out = 8'h86; - 8'h45 : out = 8'h68; - 8'h46 : out = 8'h98; - 8'h47 : out = 8'h16; - 8'h48 : out = 8'hD4; - 8'h49 : out = 8'hA4; - 8'h4A : out = 8'h5C; - 8'h4B : out = 8'hCC; - 8'h4C : out = 8'h5D; - 8'h4D : out = 8'h65; - 8'h4E : out = 8'hB6; - 8'h4F : out = 8'h92; - 8'h50 : out = 8'h6C; - 8'h51 : out = 8'h70; - 8'h52 : out = 8'h48; - 8'h53 : out = 8'h50; - 8'h54 : out = 8'hFD; - 8'h55 : out = 8'hED; - 8'h56 : out = 8'hB9; - 8'h57 : out = 8'hDA; - 8'h58 : out = 8'h5E; - 8'h59 : out = 8'h15; - 8'h5A : out = 8'h46; - 8'h5B : out = 8'h57; - 8'h5C : out = 8'hA7; - 8'h5D : out = 8'h8D; - 8'h5E : out = 8'h9D; - 8'h5F : out = 8'h84; - 8'h60 : out = 8'h90; - 8'h61 : out = 8'hD8; - 8'h62 : out = 8'hAB; - 8'h63 : out = 8'h00; - 8'h64 : out = 8'h8C; - 8'h65 : out = 8'hBC; - 8'h66 : out = 8'hD3; - 8'h67 : out = 8'h0A; - 8'h68 : out = 8'hF7; - 8'h69 : out = 8'hE4; - 8'h6A : out = 8'h58; - 8'h6B : out = 8'h05; - 8'h6C : out = 8'hB8; - 8'h6D : out = 8'hB3; - 8'h6E : out = 8'h45; - 8'h6F : out = 8'h06; - 8'h70 : out = 8'hD0; - 8'h71 : out = 8'h2C; - 8'h72 : out = 8'h1E; - 8'h73 : out = 8'h8F; - 8'h74 : out = 8'hCA; - 8'h75 : out = 8'h3F; - 8'h76 : out = 8'h0F; - 8'h77 : out = 8'h02; - 8'h78 : out = 8'hC1; - 8'h79 : out = 8'hAF; - 8'h7A : out = 8'hBD; - 8'h7B : out = 8'h03; - 8'h7C : out = 8'h01; - 8'h7D : out = 8'h13; - 8'h7E : out = 8'h8A; - 8'h7F : out = 8'h6B; - 8'h80 : out = 8'h3A; - 8'h81 : out = 8'h91; - 8'h82 : out = 8'h11; - 8'h83 : out = 8'h41; - 8'h84 : out = 8'h4F; - 8'h85 : out = 8'h67; - 8'h86 : out = 8'hDC; - 8'h87 : out = 8'hEA; - 8'h88 : out = 8'h97; - 8'h89 : out = 8'hF2; - 8'h8A : out = 8'hCF; - 8'h8B : out = 8'hCE; - 8'h8C : out = 8'hF0; - 8'h8D : out = 8'hB4; - 8'h8E : out = 8'hE6; - 8'h8F : out = 8'h73; - 8'h90 : out = 8'h96; - 8'h91 : out = 8'hAC; - 8'h92 : out = 8'h74; - 8'h93 : out = 8'h22; - 8'h94 : out = 8'hE7; - 8'h95 : out = 8'hAD; - 8'h96 : out = 8'h35; - 8'h97 : out = 8'h85; - 8'h98 : out = 8'hE2; - 8'h99 : out = 8'hF9; - 8'h9A : out = 8'h37; - 8'h9B : out = 8'hE8; - 8'h9C : out = 8'h1C; - 8'h9D : out = 8'h75; - 8'h9E : out = 8'hDF; - 8'h9F : out = 8'h6E; - 8'hA0 : out = 8'h47; - 8'hA1 : out = 8'hF1; - 8'hA2 : out = 8'h1A; - 8'hA3 : out = 8'h71; - 8'hA4 : out = 8'h1D; - 8'hA5 : out = 8'h29; - 8'hA6 : out = 8'hC5; - 8'hA7 : out = 8'h89; - 8'hA8 : out = 8'h6F; - 8'hA9 : out = 8'hB7; - 8'hAA : out = 8'h62; - 8'hAB : out = 8'h0E; - 8'hAC : out = 8'hAA; - 8'hAD : out = 8'h18; - 8'hAE : out = 8'hBE; - 8'hAF : out = 8'h1B; - 8'hB0 : out = 8'hFC; - 8'hB1 : out = 8'h56; - 8'hB2 : out = 8'h3E; - 8'hB3 : out = 8'h4B; - 8'hB4 : out = 8'hC6; - 8'hB5 : out = 8'hD2; - 8'hB6 : out = 8'h79; - 8'hB7 : out = 8'h20; - 8'hB8 : out = 8'h9A; - 8'hB9 : out = 8'hDB; - 8'hBA : out = 8'hC0; - 8'hBB : out = 8'hFE; - 8'hBC : out = 8'h78; - 8'hBD : out = 8'hCD; - 8'hBE : out = 8'h5A; - 8'hBF : out = 8'hF4; - 8'hC0 : out = 8'h1F; - 8'hC1 : out = 8'hDD; - 8'hC2 : out = 8'hA8; - 8'hC3 : out = 8'h33; - 8'hC4 : out = 8'h88; - 8'hC5 : out = 8'h07; - 8'hC6 : out = 8'hC7; - 8'hC7 : out = 8'h31; - 8'hC8 : out = 8'hB1; - 8'hC9 : out = 8'h12; - 8'hCA : out = 8'h10; - 8'hCB : out = 8'h59; - 8'hCC : out = 8'h27; - 8'hCD : out = 8'h80; - 8'hCE : out = 8'hEC; - 8'hCF : out = 8'h5F; - 8'hD0 : out = 8'h60; - 8'hD1 : out = 8'h51; - 8'hD2 : out = 8'h7F; - 8'hD3 : out = 8'hA9; - 8'hD4 : out = 8'h19; - 8'hD5 : out = 8'hB5; - 8'hD6 : out = 8'h4A; - 8'hD7 : out = 8'h0D; - 8'hD8 : out = 8'h2D; - 8'hD9 : out = 8'hE5; - 8'hDA : out = 8'h7A; - 8'hDB : out = 8'h9F; - 8'hDC : out = 8'h93; - 8'hDD : out = 8'hC9; - 8'hDE : out = 8'h9C; - 8'hDF : out = 8'hEF; - 8'hE0 : out = 8'hA0; - 8'hE1 : out = 8'hE0; - 8'hE2 : out = 8'h3B; - 8'hE3 : out = 8'h4D; - 8'hE4 : out = 8'hAE; - 8'hE5 : out = 8'h2A; - 8'hE6 : out = 8'hF5; - 8'hE7 : out = 8'hB0; - 8'hE8 : out = 8'hC8; - 8'hE9 : out = 8'hEB; - 8'hEA : out = 8'hBB; - 8'hEB : out = 8'h3C; - 8'hEC : out = 8'h83; - 8'hED : out = 8'h53; - 8'hEE : out = 8'h99; - 8'hEF : out = 8'h61; - 8'hF0 : out = 8'h17; - 8'hF1 : out = 8'h2B; - 8'hF2 : out = 8'h04; - 8'hF3 : out = 8'h7E; - 8'hF4 : out = 8'hBA; - 8'hF5 : out = 8'h77; - 8'hF6 : out = 8'hD6; - 8'hF7 : out = 8'h26; - 8'hF8 : out = 8'hE1; - 8'hF9 : out = 8'h69; - 8'hFA : out = 8'h14; - 8'hFB : out = 8'h63; - 8'hFC : out = 8'h55; - 8'hFD : out = 8'h21; - 8'hFE : out = 8'h0C; - 8'hFF : out = 8'h7D; + case(a) + 8'h00 : y = 8'h52; + 8'h01 : y = 8'h09; + 8'h02 : y = 8'h6A; + 8'h03 : y = 8'hD5; + 8'h04 : y = 8'h30; + 8'h05 : y = 8'h36; + 8'h06 : y = 8'hA5; + 8'h07 : y = 8'h38; + 8'h08 : y = 8'hBF; + 8'h09 : y = 8'h40; + 8'h0A : y = 8'hA3; + 8'h0B : y = 8'h9E; + 8'h0C : y = 8'h81; + 8'h0D : y = 8'hF3; + 8'h0E : y = 8'hD7; + 8'h0F : y = 8'hFB; + 8'h10 : y = 8'h7C; + 8'h11 : y = 8'hE3; + 8'h12 : y = 8'h39; + 8'h13 : y = 8'h82; + 8'h14 : y = 8'h9B; + 8'h15 : y = 8'h2F; + 8'h16 : y = 8'hFF; + 8'h17 : y = 8'h87; + 8'h18 : y = 8'h34; + 8'h19 : y = 8'h8E; + 8'h1A : y = 8'h43; + 8'h1B : y = 8'h44; + 8'h1C : y = 8'hC4; + 8'h1D : y = 8'hDE; + 8'h1E : y = 8'hE9; + 8'h1F : y = 8'hCB; + 8'h20 : y = 8'h54; + 8'h21 : y = 8'h7B; + 8'h22 : y = 8'h94; + 8'h23 : y = 8'h32; + 8'h24 : y = 8'hA6; + 8'h25 : y = 8'hC2; + 8'h26 : y = 8'h23; + 8'h27 : y = 8'h3D; + 8'h28 : y = 8'hEE; + 8'h29 : y = 8'h4C; + 8'h2A : y = 8'h95; + 8'h2B : y = 8'h0B; + 8'h2C : y = 8'h42; + 8'h2D : y = 8'hFA; + 8'h2E : y = 8'hC3; + 8'h2F : y = 8'h4E; + 8'h30 : y = 8'h08; + 8'h31 : y = 8'h2E; + 8'h32 : y = 8'hA1; + 8'h33 : y = 8'h66; + 8'h34 : y = 8'h28; + 8'h35 : y = 8'hD9; + 8'h36 : y = 8'h24; + 8'h37 : y = 8'hB2; + 8'h38 : y = 8'h76; + 8'h39 : y = 8'h5B; + 8'h3A : y = 8'hA2; + 8'h3B : y = 8'h49; + 8'h3C : y = 8'h6D; + 8'h3D : y = 8'h8B; + 8'h3E : y = 8'hD1; + 8'h3F : y = 8'h25; + 8'h40 : y = 8'h72; + 8'h41 : y = 8'hF8; + 8'h42 : y = 8'hF6; + 8'h43 : y = 8'h64; + 8'h44 : y = 8'h86; + 8'h45 : y = 8'h68; + 8'h46 : y = 8'h98; + 8'h47 : y = 8'h16; + 8'h48 : y = 8'hD4; + 8'h49 : y = 8'hA4; + 8'h4A : y = 8'h5C; + 8'h4B : y = 8'hCC; + 8'h4C : y = 8'h5D; + 8'h4D : y = 8'h65; + 8'h4E : y = 8'hB6; + 8'h4F : y = 8'h92; + 8'h50 : y = 8'h6C; + 8'h51 : y = 8'h70; + 8'h52 : y = 8'h48; + 8'h53 : y = 8'h50; + 8'h54 : y = 8'hFD; + 8'h55 : y = 8'hED; + 8'h56 : y = 8'hB9; + 8'h57 : y = 8'hDA; + 8'h58 : y = 8'h5E; + 8'h59 : y = 8'h15; + 8'h5A : y = 8'h46; + 8'h5B : y = 8'h57; + 8'h5C : y = 8'hA7; + 8'h5D : y = 8'h8D; + 8'h5E : y = 8'h9D; + 8'h5F : y = 8'h84; + 8'h60 : y = 8'h90; + 8'h61 : y = 8'hD8; + 8'h62 : y = 8'hAB; + 8'h63 : y = 8'h00; + 8'h64 : y = 8'h8C; + 8'h65 : y = 8'hBC; + 8'h66 : y = 8'hD3; + 8'h67 : y = 8'h0A; + 8'h68 : y = 8'hF7; + 8'h69 : y = 8'hE4; + 8'h6A : y = 8'h58; + 8'h6B : y = 8'h05; + 8'h6C : y = 8'hB8; + 8'h6D : y = 8'hB3; + 8'h6E : y = 8'h45; + 8'h6F : y = 8'h06; + 8'h70 : y = 8'hD0; + 8'h71 : y = 8'h2C; + 8'h72 : y = 8'h1E; + 8'h73 : y = 8'h8F; + 8'h74 : y = 8'hCA; + 8'h75 : y = 8'h3F; + 8'h76 : y = 8'h0F; + 8'h77 : y = 8'h02; + 8'h78 : y = 8'hC1; + 8'h79 : y = 8'hAF; + 8'h7A : y = 8'hBD; + 8'h7B : y = 8'h03; + 8'h7C : y = 8'h01; + 8'h7D : y = 8'h13; + 8'h7E : y = 8'h8A; + 8'h7F : y = 8'h6B; + 8'h80 : y = 8'h3A; + 8'h81 : y = 8'h91; + 8'h82 : y = 8'h11; + 8'h83 : y = 8'h41; + 8'h84 : y = 8'h4F; + 8'h85 : y = 8'h67; + 8'h86 : y = 8'hDC; + 8'h87 : y = 8'hEA; + 8'h88 : y = 8'h97; + 8'h89 : y = 8'hF2; + 8'h8A : y = 8'hCF; + 8'h8B : y = 8'hCE; + 8'h8C : y = 8'hF0; + 8'h8D : y = 8'hB4; + 8'h8E : y = 8'hE6; + 8'h8F : y = 8'h73; + 8'h90 : y = 8'h96; + 8'h91 : y = 8'hAC; + 8'h92 : y = 8'h74; + 8'h93 : y = 8'h22; + 8'h94 : y = 8'hE7; + 8'h95 : y = 8'hAD; + 8'h96 : y = 8'h35; + 8'h97 : y = 8'h85; + 8'h98 : y = 8'hE2; + 8'h99 : y = 8'hF9; + 8'h9A : y = 8'h37; + 8'h9B : y = 8'hE8; + 8'h9C : y = 8'h1C; + 8'h9D : y = 8'h75; + 8'h9E : y = 8'hDF; + 8'h9F : y = 8'h6E; + 8'hA0 : y = 8'h47; + 8'hA1 : y = 8'hF1; + 8'hA2 : y = 8'h1A; + 8'hA3 : y = 8'h71; + 8'hA4 : y = 8'h1D; + 8'hA5 : y = 8'h29; + 8'hA6 : y = 8'hC5; + 8'hA7 : y = 8'h89; + 8'hA8 : y = 8'h6F; + 8'hA9 : y = 8'hB7; + 8'hAA : y = 8'h62; + 8'hAB : y = 8'h0E; + 8'hAC : y = 8'hAA; + 8'hAD : y = 8'h18; + 8'hAE : y = 8'hBE; + 8'hAF : y = 8'h1B; + 8'hB0 : y = 8'hFC; + 8'hB1 : y = 8'h56; + 8'hB2 : y = 8'h3E; + 8'hB3 : y = 8'h4B; + 8'hB4 : y = 8'hC6; + 8'hB5 : y = 8'hD2; + 8'hB6 : y = 8'h79; + 8'hB7 : y = 8'h20; + 8'hB8 : y = 8'h9A; + 8'hB9 : y = 8'hDB; + 8'hBA : y = 8'hC0; + 8'hBB : y = 8'hFE; + 8'hBC : y = 8'h78; + 8'hBD : y = 8'hCD; + 8'hBE : y = 8'h5A; + 8'hBF : y = 8'hF4; + 8'hC0 : y = 8'h1F; + 8'hC1 : y = 8'hDD; + 8'hC2 : y = 8'hA8; + 8'hC3 : y = 8'h33; + 8'hC4 : y = 8'h88; + 8'hC5 : y = 8'h07; + 8'hC6 : y = 8'hC7; + 8'hC7 : y = 8'h31; + 8'hC8 : y = 8'hB1; + 8'hC9 : y = 8'h12; + 8'hCA : y = 8'h10; + 8'hCB : y = 8'h59; + 8'hCC : y = 8'h27; + 8'hCD : y = 8'h80; + 8'hCE : y = 8'hEC; + 8'hCF : y = 8'h5F; + 8'hD0 : y = 8'h60; + 8'hD1 : y = 8'h51; + 8'hD2 : y = 8'h7F; + 8'hD3 : y = 8'hA9; + 8'hD4 : y = 8'h19; + 8'hD5 : y = 8'hB5; + 8'hD6 : y = 8'h4A; + 8'hD7 : y = 8'h0D; + 8'hD8 : y = 8'h2D; + 8'hD9 : y = 8'hE5; + 8'hDA : y = 8'h7A; + 8'hDB : y = 8'h9F; + 8'hDC : y = 8'h93; + 8'hDD : y = 8'hC9; + 8'hDE : y = 8'h9C; + 8'hDF : y = 8'hEF; + 8'hE0 : y = 8'hA0; + 8'hE1 : y = 8'hE0; + 8'hE2 : y = 8'h3B; + 8'hE3 : y = 8'h4D; + 8'hE4 : y = 8'hAE; + 8'hE5 : y = 8'h2A; + 8'hE6 : y = 8'hF5; + 8'hE7 : y = 8'hB0; + 8'hE8 : y = 8'hC8; + 8'hE9 : y = 8'hEB; + 8'hEA : y = 8'hBB; + 8'hEB : y = 8'h3C; + 8'hEC : y = 8'h83; + 8'hED : y = 8'h53; + 8'hEE : y = 8'h99; + 8'hEF : y = 8'h61; + 8'hF0 : y = 8'h17; + 8'hF1 : y = 8'h2B; + 8'hF2 : y = 8'h04; + 8'hF3 : y = 8'h7E; + 8'hF4 : y = 8'hBA; + 8'hF5 : y = 8'h77; + 8'hF6 : y = 8'hD6; + 8'hF7 : y = 8'h26; + 8'hF8 : y = 8'hE1; + 8'hF9 : y = 8'h69; + 8'hFA : y = 8'h14; + 8'hFB : y = 8'h63; + 8'hFC : y = 8'h55; + 8'hFD : y = 8'h21; + 8'hFE : y = 8'h0C; + 8'hFF : y = 8'h7D; endcase endmodule diff --git a/src/ieu/aes_common/aesinvsboxword.sv b/src/ieu/aes_common/aesinvsboxword.sv index c6d3ac126..62b969852 100644 --- a/src/ieu/aes_common/aesinvsboxword.sv +++ b/src/ieu/aes_common/aesinvsboxword.sv @@ -26,13 +26,13 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aesinvsboxword( - input logic [31:0] in, - output logic [31:0] out + input logic [31:0] a, + output logic [31:0] y ); // inverse substitutions boxes for each byte of the word - aesinvsbox sboxb0(.in(in[7:0]), .out(out[7:0])); - aesinvsbox sboxb1(.in(in[15:8]), .out(out[15:8])); - aesinvsbox sboxb2(.in(in[23:16]), .out(out[23:16])); - aesinvsbox sboxb3(.in(in[31:24]), .out(out[31:24])); + aesinvsbox sboxb0(a[7:0], y[7:0]); + aesinvsbox sboxb1(a[15:8], y[15:8]); + aesinvsbox sboxb2(a[23:16], y[23:16]); + aesinvsbox sboxb3(a[31:24], y[31:24]); endmodule diff --git a/src/ieu/aes_common/aesinvshiftrow.sv b/src/ieu/aes_common/aesinvshiftrow.sv index 82b9a380c..54b11c82a 100644 --- a/src/ieu/aes_common/aesinvshiftrow.sv +++ b/src/ieu/aes_common/aesinvshiftrow.sv @@ -26,12 +26,12 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aesinvshiftrow( - input logic [127:0] DataIn, - output logic [127:0] DataOut + input logic [127:0] a, + output logic [127:0] y ); - assign DataOut = {DataIn[31:24], DataIn[55:48], DataIn[79:72], DataIn[103:96], - DataIn[127:120], DataIn[23:16], DataIn[47:40], DataIn[71:64], - DataIn[95:88], DataIn[119:112], DataIn[15:8], DataIn[39:32], - DataIn[63:56], DataIn[87:80], DataIn[111:104], DataIn[7:0]}; + assign y = {a[31:24], a[55:48], a[79:72], a[103:96], + a[127:120], a[23:16], a[47:40], a[71:64], + a[95:88], a[119:112], a[15:8], a[39:32], + a[63:56], a[87:80], a[111:104], a[7:0]}; endmodule diff --git a/src/ieu/aes_common/aesmixcolumns.sv b/src/ieu/aes_common/aesmixcolumns.sv index 0bff6b753..517533f63 100644 --- a/src/ieu/aes_common/aesmixcolumns.sv +++ b/src/ieu/aes_common/aesmixcolumns.sv @@ -27,24 +27,24 @@ module aesmixcolumns( - input logic [31:0] in, - output logic [31:0] out + input logic [31:0] a, + output logic [31:0] y ); - logic [7:0] in0, in1, in2, in3, out0, out1, out2, out3, t0, t1, t2, t3, temp; + logic [7:0] a0, a1, a2, a3, y0, y1, y2, y3, t0, t1, t2, t3, temp; - assign {in0, in1, in2, in3} = in; - assign temp = in0 ^ in1 ^ in2 ^ in3; + assign {a0, a1, a2, a3} = a; + assign temp = a0 ^ a1 ^ a2 ^ a3; - galoismultforward gm0 (in0^in1, t0); - galoismultforward gm1 (in1^in2, t1); - galoismultforward gm2 (in2^in3, t2); - galoismultforward gm3 (in3^in0, t3); + galoismultforward gm0 (a0^a1, t0); + galoismultforward gm1 (a1^a2, t1); + galoismultforward gm2 (a2^a3, t2); + galoismultforward gm3 (a3^a0, t3); - assign out0 = in0 ^ temp ^ t3; - assign out1 = in1 ^ temp ^ t0; - assign out2 = in2 ^ temp ^ t1; - assign out3 = in3 ^ temp ^ t2; + assign y0 = a0 ^ temp ^ t3; + assign y1 = a1 ^ temp ^ t0; + assign y2 = a2 ^ temp ^ t1; + assign y3 = a3 ^ temp ^ t2; - assign out = {out0, out1, out2, out3}; + assign y = {y0, y1, y2, y3}; endmodule diff --git a/src/ieu/aes_common/aessbox.sv b/src/ieu/aes_common/aessbox.sv index 8ddfa9731..84eb61c4d 100644 --- a/src/ieu/aes_common/aessbox.sv +++ b/src/ieu/aes_common/aessbox.sv @@ -26,268 +26,268 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aessbox( - input logic [7:0] in, - output logic [7:0] out + input logic [7:0] a, + output logic [7:0] y ); // case statement to lookup the value in the rijndael table always_comb - case(in) - 8'h00 : out = 8'h63; - 8'h01 : out = 8'h7C; - 8'h02 : out = 8'h77; - 8'h03 : out = 8'h7B; - 8'h04 : out = 8'hF2; - 8'h05 : out = 8'h6B; - 8'h06 : out = 8'h6F; - 8'h07 : out = 8'hC5; - 8'h08 : out = 8'h30; - 8'h09 : out = 8'h01; - 8'h0A : out = 8'h67; - 8'h0B : out = 8'h2B; - 8'h0C : out = 8'hFE; - 8'h0D : out = 8'hD7; - 8'h0E : out = 8'hAB; - 8'h0F : out = 8'h76; - 8'h10 : out = 8'hCA; - 8'h11 : out = 8'h82; - 8'h12 : out = 8'hC9; - 8'h13 : out = 8'h7D; - 8'h14 : out = 8'hFA; - 8'h15 : out = 8'h59; - 8'h16 : out = 8'h47; - 8'h17 : out = 8'hF0; - 8'h18 : out = 8'hAD; - 8'h19 : out = 8'hD4; - 8'h1A : out = 8'hA2; - 8'h1B : out = 8'hAF; - 8'h1C : out = 8'h9C; - 8'h1D : out = 8'hA4; - 8'h1E : out = 8'h72; - 8'h1F : out = 8'hC0; - 8'h20 : out = 8'hB7; - 8'h21 : out = 8'hFD; - 8'h22 : out = 8'h93; - 8'h23 : out = 8'h26; - 8'h24 : out = 8'h36; - 8'h25 : out = 8'h3F; - 8'h26 : out = 8'hF7; - 8'h27 : out = 8'hCC; - 8'h28 : out = 8'h34; - 8'h29 : out = 8'hA5; - 8'h2A : out = 8'hE5; - 8'h2B : out = 8'hF1; - 8'h2C : out = 8'h71; - 8'h2D : out = 8'hD8; - 8'h2E : out = 8'h31; - 8'h2F : out = 8'h15; - 8'h30 : out = 8'h04; - 8'h31 : out = 8'hC7; - 8'h32 : out = 8'h23; - 8'h33 : out = 8'hC3; - 8'h34 : out = 8'h18; - 8'h35 : out = 8'h96; - 8'h36 : out = 8'h05; - 8'h37 : out = 8'h9A; - 8'h38 : out = 8'h07; - 8'h39 : out = 8'h12; - 8'h3A : out = 8'h80; - 8'h3B : out = 8'hE2; - 8'h3C : out = 8'hEB; - 8'h3D : out = 8'h27; - 8'h3E : out = 8'hB2; - 8'h3F : out = 8'h75; - 8'h40 : out = 8'h09; - 8'h41 : out = 8'h83; - 8'h42 : out = 8'h2C; - 8'h43 : out = 8'h1A; - 8'h44 : out = 8'h1B; - 8'h45 : out = 8'h6E; - 8'h46 : out = 8'h5A; - 8'h47 : out = 8'hA0; - 8'h48 : out = 8'h52; - 8'h49 : out = 8'h3B; - 8'h4A : out = 8'hD6; - 8'h4B : out = 8'hB3; - 8'h4C : out = 8'h29; - 8'h4D : out = 8'hE3; - 8'h4E : out = 8'h2F; - 8'h4F : out = 8'h84; - 8'h50 : out = 8'h53; - 8'h51 : out = 8'hD1; - 8'h52 : out = 8'h00; - 8'h53 : out = 8'hED; - 8'h54 : out = 8'h20; - 8'h55 : out = 8'hFC; - 8'h56 : out = 8'hB1; - 8'h57 : out = 8'h5B; - 8'h58 : out = 8'h6A; - 8'h59 : out = 8'hCB; - 8'h5A : out = 8'hBE; - 8'h5B : out = 8'h39; - 8'h5C : out = 8'h4A; - 8'h5D : out = 8'h4C; - 8'h5E : out = 8'h58; - 8'h5F : out = 8'hCF; - 8'h60 : out = 8'hD0; - 8'h61 : out = 8'hEF; - 8'h62 : out = 8'hAA; - 8'h63 : out = 8'hFB; - 8'h64 : out = 8'h43; - 8'h65 : out = 8'h4D; - 8'h66 : out = 8'h33; - 8'h67 : out = 8'h85; - 8'h68 : out = 8'h45; - 8'h69 : out = 8'hF9; - 8'h6A : out = 8'h02; - 8'h6B : out = 8'h7F; - 8'h6C : out = 8'h50; - 8'h6D : out = 8'h3C; - 8'h6E : out = 8'h9F; - 8'h6F : out = 8'hA8; - 8'h70 : out = 8'h51; - 8'h71 : out = 8'hA3; - 8'h72 : out = 8'h40; - 8'h73 : out = 8'h8F; - 8'h74 : out = 8'h92; - 8'h75 : out = 8'h9D; - 8'h76 : out = 8'h38; - 8'h77 : out = 8'hF5; - 8'h78 : out = 8'hBC; - 8'h79 : out = 8'hB6; - 8'h7A : out = 8'hDA; - 8'h7B : out = 8'h21; - 8'h7C : out = 8'h10; - 8'h7D : out = 8'hFF; - 8'h7E : out = 8'hF3; - 8'h7F : out = 8'hD2; - 8'h80 : out = 8'hCD; - 8'h81 : out = 8'h0C; - 8'h82 : out = 8'h13; - 8'h83 : out = 8'hEC; - 8'h84 : out = 8'h5F; - 8'h85 : out = 8'h97; - 8'h86 : out = 8'h44; - 8'h87 : out = 8'h17; - 8'h88 : out = 8'hC4; - 8'h89 : out = 8'hA7; - 8'h8A : out = 8'h7E; - 8'h8B : out = 8'h3D; - 8'h8C : out = 8'h64; - 8'h8D : out = 8'h5D; - 8'h8E : out = 8'h19; - 8'h8F : out = 8'h73; - 8'h90 : out = 8'h60; - 8'h91 : out = 8'h81; - 8'h92 : out = 8'h4F; - 8'h93 : out = 8'hDC; - 8'h94 : out = 8'h22; - 8'h95 : out = 8'h2A; - 8'h96 : out = 8'h90; - 8'h97 : out = 8'h88; - 8'h98 : out = 8'h46; - 8'h99 : out = 8'hEE; - 8'h9A : out = 8'hB8; - 8'h9B : out = 8'h14; - 8'h9C : out = 8'hDE; - 8'h9D : out = 8'h5E; - 8'h9E : out = 8'h0B; - 8'h9F : out = 8'hDB; - 8'hA0 : out = 8'hE0; - 8'hA1 : out = 8'h32; - 8'hA2 : out = 8'h3A; - 8'hA3 : out = 8'h0A; - 8'hA4 : out = 8'h49; - 8'hA5 : out = 8'h06; - 8'hA6 : out = 8'h24; - 8'hA7 : out = 8'h5C; - 8'hA8 : out = 8'hC2; - 8'hA9 : out = 8'hD3; - 8'hAA : out = 8'hAC; - 8'hAB : out = 8'h62; - 8'hAC : out = 8'h91; - 8'hAD : out = 8'h95; - 8'hAE : out = 8'hE4; - 8'hAF : out = 8'h79; - 8'hB0 : out = 8'hE7; - 8'hB1 : out = 8'hC8; - 8'hB2 : out = 8'h37; - 8'hB3 : out = 8'h6D; - 8'hB4 : out = 8'h8D; - 8'hB5 : out = 8'hD5; - 8'hB6 : out = 8'h4E; - 8'hB7 : out = 8'hA9; - 8'hB8 : out = 8'h6C; - 8'hB9 : out = 8'h56; - 8'hBA : out = 8'hF4; - 8'hBB : out = 8'hEA; - 8'hBC : out = 8'h65; - 8'hBD : out = 8'h7A; - 8'hBE : out = 8'hAE; - 8'hBF : out = 8'h08; - 8'hC0 : out = 8'hBA; - 8'hC1 : out = 8'h78; - 8'hC2 : out = 8'h25; - 8'hC3 : out = 8'h2E; - 8'hC4 : out = 8'h1C; - 8'hC5 : out = 8'hA6; - 8'hC6 : out = 8'hB4; - 8'hC7 : out = 8'hC6; - 8'hC8 : out = 8'hE8; - 8'hC9 : out = 8'hDD; - 8'hCA : out = 8'h74; - 8'hCB : out = 8'h1F; - 8'hCC : out = 8'h4B; - 8'hCD : out = 8'hBD; - 8'hCE : out = 8'h8B; - 8'hCF : out = 8'h8A; - 8'hD0 : out = 8'h70; - 8'hD1 : out = 8'h3E; - 8'hD2 : out = 8'hB5; - 8'hD3 : out = 8'h66; - 8'hD4 : out = 8'h48; - 8'hD5 : out = 8'h03; - 8'hD6 : out = 8'hF6; - 8'hD7 : out = 8'h0E; - 8'hD8 : out = 8'h61; - 8'hD9 : out = 8'h35; - 8'hDA : out = 8'h57; - 8'hDB : out = 8'hB9; - 8'hDC : out = 8'h86; - 8'hDD : out = 8'hC1; - 8'hDE : out = 8'h1D; - 8'hDF : out = 8'h9E; - 8'hE0 : out = 8'hE1; - 8'hE1 : out = 8'hF8; - 8'hE2 : out = 8'h98; - 8'hE3 : out = 8'h11; - 8'hE4 : out = 8'h69; - 8'hE5 : out = 8'hD9; - 8'hE6 : out = 8'h8E; - 8'hE7 : out = 8'h94; - 8'hE8 : out = 8'h9B; - 8'hE9 : out = 8'h1E; - 8'hEA : out = 8'h87; - 8'hEB : out = 8'hE9; - 8'hEC : out = 8'hCE; - 8'hED : out = 8'h55; - 8'hEE : out = 8'h28; - 8'hEF : out = 8'hDF; - 8'hF0 : out = 8'h8C; - 8'hF1 : out = 8'hA1; - 8'hF2 : out = 8'h89; - 8'hF3 : out = 8'h0D; - 8'hF4 : out = 8'hBF; - 8'hF5 : out = 8'hE6; - 8'hF6 : out = 8'h42; - 8'hF7 : out = 8'h68; - 8'hF8 : out = 8'h41; - 8'hF9 : out = 8'h99; - 8'hFA : out = 8'h2D; - 8'hFB : out = 8'h0F; - 8'hFC : out = 8'hB0; - 8'hFD : out = 8'h54; - 8'hFE : out = 8'hBB; - 8'hFF : out = 8'h16; + case(a) + 8'h00 : y = 8'h63; + 8'h01 : y = 8'h7C; + 8'h02 : y = 8'h77; + 8'h03 : y = 8'h7B; + 8'h04 : y = 8'hF2; + 8'h05 : y = 8'h6B; + 8'h06 : y = 8'h6F; + 8'h07 : y = 8'hC5; + 8'h08 : y = 8'h30; + 8'h09 : y = 8'h01; + 8'h0A : y = 8'h67; + 8'h0B : y = 8'h2B; + 8'h0C : y = 8'hFE; + 8'h0D : y = 8'hD7; + 8'h0E : y = 8'hAB; + 8'h0F : y = 8'h76; + 8'h10 : y = 8'hCA; + 8'h11 : y = 8'h82; + 8'h12 : y = 8'hC9; + 8'h13 : y = 8'h7D; + 8'h14 : y = 8'hFA; + 8'h15 : y = 8'h59; + 8'h16 : y = 8'h47; + 8'h17 : y = 8'hF0; + 8'h18 : y = 8'hAD; + 8'h19 : y = 8'hD4; + 8'h1A : y = 8'hA2; + 8'h1B : y = 8'hAF; + 8'h1C : y = 8'h9C; + 8'h1D : y = 8'hA4; + 8'h1E : y = 8'h72; + 8'h1F : y = 8'hC0; + 8'h20 : y = 8'hB7; + 8'h21 : y = 8'hFD; + 8'h22 : y = 8'h93; + 8'h23 : y = 8'h26; + 8'h24 : y = 8'h36; + 8'h25 : y = 8'h3F; + 8'h26 : y = 8'hF7; + 8'h27 : y = 8'hCC; + 8'h28 : y = 8'h34; + 8'h29 : y = 8'hA5; + 8'h2A : y = 8'hE5; + 8'h2B : y = 8'hF1; + 8'h2C : y = 8'h71; + 8'h2D : y = 8'hD8; + 8'h2E : y = 8'h31; + 8'h2F : y = 8'h15; + 8'h30 : y = 8'h04; + 8'h31 : y = 8'hC7; + 8'h32 : y = 8'h23; + 8'h33 : y = 8'hC3; + 8'h34 : y = 8'h18; + 8'h35 : y = 8'h96; + 8'h36 : y = 8'h05; + 8'h37 : y = 8'h9A; + 8'h38 : y = 8'h07; + 8'h39 : y = 8'h12; + 8'h3A : y = 8'h80; + 8'h3B : y = 8'hE2; + 8'h3C : y = 8'hEB; + 8'h3D : y = 8'h27; + 8'h3E : y = 8'hB2; + 8'h3F : y = 8'h75; + 8'h40 : y = 8'h09; + 8'h41 : y = 8'h83; + 8'h42 : y = 8'h2C; + 8'h43 : y = 8'h1A; + 8'h44 : y = 8'h1B; + 8'h45 : y = 8'h6E; + 8'h46 : y = 8'h5A; + 8'h47 : y = 8'hA0; + 8'h48 : y = 8'h52; + 8'h49 : y = 8'h3B; + 8'h4A : y = 8'hD6; + 8'h4B : y = 8'hB3; + 8'h4C : y = 8'h29; + 8'h4D : y = 8'hE3; + 8'h4E : y = 8'h2F; + 8'h4F : y = 8'h84; + 8'h50 : y = 8'h53; + 8'h51 : y = 8'hD1; + 8'h52 : y = 8'h00; + 8'h53 : y = 8'hED; + 8'h54 : y = 8'h20; + 8'h55 : y = 8'hFC; + 8'h56 : y = 8'hB1; + 8'h57 : y = 8'h5B; + 8'h58 : y = 8'h6A; + 8'h59 : y = 8'hCB; + 8'h5A : y = 8'hBE; + 8'h5B : y = 8'h39; + 8'h5C : y = 8'h4A; + 8'h5D : y = 8'h4C; + 8'h5E : y = 8'h58; + 8'h5F : y = 8'hCF; + 8'h60 : y = 8'hD0; + 8'h61 : y = 8'hEF; + 8'h62 : y = 8'hAA; + 8'h63 : y = 8'hFB; + 8'h64 : y = 8'h43; + 8'h65 : y = 8'h4D; + 8'h66 : y = 8'h33; + 8'h67 : y = 8'h85; + 8'h68 : y = 8'h45; + 8'h69 : y = 8'hF9; + 8'h6A : y = 8'h02; + 8'h6B : y = 8'h7F; + 8'h6C : y = 8'h50; + 8'h6D : y = 8'h3C; + 8'h6E : y = 8'h9F; + 8'h6F : y = 8'hA8; + 8'h70 : y = 8'h51; + 8'h71 : y = 8'hA3; + 8'h72 : y = 8'h40; + 8'h73 : y = 8'h8F; + 8'h74 : y = 8'h92; + 8'h75 : y = 8'h9D; + 8'h76 : y = 8'h38; + 8'h77 : y = 8'hF5; + 8'h78 : y = 8'hBC; + 8'h79 : y = 8'hB6; + 8'h7A : y = 8'hDA; + 8'h7B : y = 8'h21; + 8'h7C : y = 8'h10; + 8'h7D : y = 8'hFF; + 8'h7E : y = 8'hF3; + 8'h7F : y = 8'hD2; + 8'h80 : y = 8'hCD; + 8'h81 : y = 8'h0C; + 8'h82 : y = 8'h13; + 8'h83 : y = 8'hEC; + 8'h84 : y = 8'h5F; + 8'h85 : y = 8'h97; + 8'h86 : y = 8'h44; + 8'h87 : y = 8'h17; + 8'h88 : y = 8'hC4; + 8'h89 : y = 8'hA7; + 8'h8A : y = 8'h7E; + 8'h8B : y = 8'h3D; + 8'h8C : y = 8'h64; + 8'h8D : y = 8'h5D; + 8'h8E : y = 8'h19; + 8'h8F : y = 8'h73; + 8'h90 : y = 8'h60; + 8'h91 : y = 8'h81; + 8'h92 : y = 8'h4F; + 8'h93 : y = 8'hDC; + 8'h94 : y = 8'h22; + 8'h95 : y = 8'h2A; + 8'h96 : y = 8'h90; + 8'h97 : y = 8'h88; + 8'h98 : y = 8'h46; + 8'h99 : y = 8'hEE; + 8'h9A : y = 8'hB8; + 8'h9B : y = 8'h14; + 8'h9C : y = 8'hDE; + 8'h9D : y = 8'h5E; + 8'h9E : y = 8'h0B; + 8'h9F : y = 8'hDB; + 8'hA0 : y = 8'hE0; + 8'hA1 : y = 8'h32; + 8'hA2 : y = 8'h3A; + 8'hA3 : y = 8'h0A; + 8'hA4 : y = 8'h49; + 8'hA5 : y = 8'h06; + 8'hA6 : y = 8'h24; + 8'hA7 : y = 8'h5C; + 8'hA8 : y = 8'hC2; + 8'hA9 : y = 8'hD3; + 8'hAA : y = 8'hAC; + 8'hAB : y = 8'h62; + 8'hAC : y = 8'h91; + 8'hAD : y = 8'h95; + 8'hAE : y = 8'hE4; + 8'hAF : y = 8'h79; + 8'hB0 : y = 8'hE7; + 8'hB1 : y = 8'hC8; + 8'hB2 : y = 8'h37; + 8'hB3 : y = 8'h6D; + 8'hB4 : y = 8'h8D; + 8'hB5 : y = 8'hD5; + 8'hB6 : y = 8'h4E; + 8'hB7 : y = 8'hA9; + 8'hB8 : y = 8'h6C; + 8'hB9 : y = 8'h56; + 8'hBA : y = 8'hF4; + 8'hBB : y = 8'hEA; + 8'hBC : y = 8'h65; + 8'hBD : y = 8'h7A; + 8'hBE : y = 8'hAE; + 8'hBF : y = 8'h08; + 8'hC0 : y = 8'hBA; + 8'hC1 : y = 8'h78; + 8'hC2 : y = 8'h25; + 8'hC3 : y = 8'h2E; + 8'hC4 : y = 8'h1C; + 8'hC5 : y = 8'hA6; + 8'hC6 : y = 8'hB4; + 8'hC7 : y = 8'hC6; + 8'hC8 : y = 8'hE8; + 8'hC9 : y = 8'hDD; + 8'hCA : y = 8'h74; + 8'hCB : y = 8'h1F; + 8'hCC : y = 8'h4B; + 8'hCD : y = 8'hBD; + 8'hCE : y = 8'h8B; + 8'hCF : y = 8'h8A; + 8'hD0 : y = 8'h70; + 8'hD1 : y = 8'h3E; + 8'hD2 : y = 8'hB5; + 8'hD3 : y = 8'h66; + 8'hD4 : y = 8'h48; + 8'hD5 : y = 8'h03; + 8'hD6 : y = 8'hF6; + 8'hD7 : y = 8'h0E; + 8'hD8 : y = 8'h61; + 8'hD9 : y = 8'h35; + 8'hDA : y = 8'h57; + 8'hDB : y = 8'hB9; + 8'hDC : y = 8'h86; + 8'hDD : y = 8'hC1; + 8'hDE : y = 8'h1D; + 8'hDF : y = 8'h9E; + 8'hE0 : y = 8'hE1; + 8'hE1 : y = 8'hF8; + 8'hE2 : y = 8'h98; + 8'hE3 : y = 8'h11; + 8'hE4 : y = 8'h69; + 8'hE5 : y = 8'hD9; + 8'hE6 : y = 8'h8E; + 8'hE7 : y = 8'h94; + 8'hE8 : y = 8'h9B; + 8'hE9 : y = 8'h1E; + 8'hEA : y = 8'h87; + 8'hEB : y = 8'hE9; + 8'hEC : y = 8'hCE; + 8'hED : y = 8'h55; + 8'hEE : y = 8'h28; + 8'hEF : y = 8'hDF; + 8'hF0 : y = 8'h8C; + 8'hF1 : y = 8'hA1; + 8'hF2 : y = 8'h89; + 8'hF3 : y = 8'h0D; + 8'hF4 : y = 8'hBF; + 8'hF5 : y = 8'hE6; + 8'hF6 : y = 8'h42; + 8'hF7 : y = 8'h68; + 8'hF8 : y = 8'h41; + 8'hF9 : y = 8'h99; + 8'hFA : y = 8'h2D; + 8'hFB : y = 8'h0F; + 8'hFC : y = 8'hB0; + 8'hFD : y = 8'h54; + 8'hFE : y = 8'hBB; + 8'hFF : y = 8'h16; endcase endmodule diff --git a/src/ieu/aes_common/aessboxword.sv b/src/ieu/aes_common/aessboxword.sv index f6f11680c..55bf1bb99 100644 --- a/src/ieu/aes_common/aessboxword.sv +++ b/src/ieu/aes_common/aessboxword.sv @@ -26,13 +26,13 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aessboxword( - input logic [31:0] in, - output logic [31:0] out + input logic [31:0] a, + output logic [31:0] y ); // substitutions boxes for each byte of the word - aessbox sboxb0(.in(in[7:0]), .out(out[7:0])); - aessbox sboxb1(.in(in[15:8]), .out(out[15:8])); - aessbox sboxb2(.in(in[23:16]), .out(out[23:16])); - aessbox sboxb3(.in(in[31:24]), .out(out[31:24])); + aessbox sboxb0(a[7:0], y[7:0]); + aessbox sboxb1(a[15:8], y[15:8]); + aessbox sboxb2(a[23:16], y[23:16]); + aessbox sboxb3(a[31:24], y[31:24]); endmodule diff --git a/src/ieu/aes_common/aesshiftrow.sv b/src/ieu/aes_common/aesshiftrow.sv index 0d9a1ed60..fa355458b 100644 --- a/src/ieu/aes_common/aesshiftrow.sv +++ b/src/ieu/aes_common/aesshiftrow.sv @@ -26,12 +26,12 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module aesshiftrow( - input logic [127:0] DataIn, - output logic [127:0] DataOut + input logic [127:0] a, + output logic [127:0] y ); - assign DataOut = {DataIn[95:88], DataIn[55:48], DataIn[15:8], DataIn[103:96], - DataIn[63:56], DataIn[23:16], DataIn[111:104], DataIn[71:64], - DataIn[31:24], DataIn[119:112], DataIn[79:72], DataIn[39:32], - DataIn[127:120], DataIn[87:80], DataIn[47:40], DataIn[7:0]}; + assign y = {a[95:88], a[55:48], a[15:8], a[103:96], + a[63:56], a[23:16], a[111:104], a[71:64], + a[31:24], a[119:112], a[79:72], a[39:32], + a[127:120], a[87:80], a[47:40], a[7:0]}; endmodule diff --git a/src/ieu/aes_common/galoismultforward.sv b/src/ieu/aes_common/galoismultforward.sv index 3e901eaa0..081605682 100644 --- a/src/ieu/aes_common/galoismultforward.sv +++ b/src/ieu/aes_common/galoismultforward.sv @@ -26,12 +26,12 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module galoismultforward( - input logic [7:0] in, - output logic [7:0] out + input logic [7:0] a, + output logic [7:0] y ); logic [7:0] leftshift; - assign leftshift = {in[6:0], 1'b0}; - assign out = in[7] ? (leftshift ^ 8'b00011011) : leftshift; + assign leftshift = {a[6:0], 1'b0}; + assign y = a[7] ? (leftshift ^ 8'b00011011) : leftshift; endmodule diff --git a/src/ieu/aes_common/galoismultinverse.sv b/src/ieu/aes_common/galoismultinverse.sv index 65973f33f..89c697584 100644 --- a/src/ieu/aes_common/galoismultinverse.sv +++ b/src/ieu/aes_common/galoismultinverse.sv @@ -26,13 +26,13 @@ //////////////////////////////////////////////////////////////////////////////////////////////// module galoismultinverse( - input logic [10:0] in, - output logic [7:0] out + input logic [10:0] a, + output logic [7:0] y ); logic [7:0] temp0, temp1; - assign temp0 = in[8] ? (in[7:0] ^ 8'b00011011) : in[7:0]; - assign temp1 = in[9] ? (temp0 ^ 8'b00110110) : temp0; - assign out = in[10] ? (temp1 ^ 8'b01101100) : temp1; + assign temp0 = a[8] ? (a[7:0] ^ 8'b00011011) : a[7:0]; + assign temp1 = a[9] ? (temp0 ^ 8'b00110110) : temp0; + assign y = a[10] ? (temp1 ^ 8'b01101100) : temp1; endmodule diff --git a/src/ieu/aes_instructions/aes32dsi.sv b/src/ieu/aes_instructions/aes32dsi.sv index 79d08e889..29c68b67f 100644 --- a/src/ieu/aes_instructions/aes32dsi.sv +++ b/src/ieu/aes_instructions/aes32dsi.sv @@ -47,7 +47,7 @@ module aes32dsi( assign SboxIn = SboxIn32[7:0]; // Apply inverse sbox to si - aesinvsbox inv_sbox(.in(SboxIn), .out(SboxOut)); + aesinvsbox inv_sbox(SboxIn, SboxOut); // Pad output of inverse substitution box assign so = {24'h0, SboxOut}; diff --git a/src/ieu/aes_instructions/aes32dsmi.sv b/src/ieu/aes_instructions/aes32dsmi.sv index 6ba703f26..a249e7e93 100644 --- a/src/ieu/aes_instructions/aes32dsmi.sv +++ b/src/ieu/aes_instructions/aes32dsmi.sv @@ -48,13 +48,13 @@ module aes32dsmi( assign SboxIn = SboxIn32[7:0]; // Apply inverse sbox to si - aesinvsbox inv_sbox(.in(SboxIn), .out(SboxOut)); + aesinvsbox inv_sbox(SboxIn, SboxOut); // Pad output of inverse substitution box assign so = {24'h0, SboxOut}; // Run so through the mixword AES function - aesinvmixcolumns mix(.in(so), .out(mixed)); + aesinvmixcolumns mix(so, mixed); // Rotate the substitution box output left by shamt (bs * 8) assign mixedrotate = (mixed << shamt) | (mixed >> (32 - shamt)); diff --git a/src/ieu/aes_instructions/aes32esi.sv b/src/ieu/aes_instructions/aes32esi.sv index dd7b165dc..c8a6dd0b4 100644 --- a/src/ieu/aes_instructions/aes32esi.sv +++ b/src/ieu/aes_instructions/aes32esi.sv @@ -49,7 +49,7 @@ module aes32esi( assign SboxIn = SboxIn32[7:0]; // Substitute - aessbox subbox(.in(SboxIn), .out(SboxOut)); + aessbox subbox(SboxIn, SboxOut); // Pad sbox output assign so = {24'h0, SboxOut}; diff --git a/src/ieu/aes_instructions/aes32esmi.sv b/src/ieu/aes_instructions/aes32esmi.sv index 30a48ca1b..b00495f48 100644 --- a/src/ieu/aes_instructions/aes32esmi.sv +++ b/src/ieu/aes_instructions/aes32esmi.sv @@ -50,13 +50,13 @@ module aes32esmi( assign SboxIn = SboxIn32[7:0]; // Substitute - aessbox sbox(.in(SboxIn), .out(SboxOut)); + aessbox sbox(SboxIn, SboxOut); // Pad sbox output assign so = {24'h0, SboxOut}; // Mix Word using aesmixword component - aesmixcolumns mwd(.in(so), .out(mixed)); + aesmixcolumns mwd(so, mixed); // Rotate so left by shamt assign mixedrotate = (mixed << shamt) | (mixed >> (32 - shamt)); diff --git a/src/ieu/aes_instructions/aes64ds.sv b/src/ieu/aes_instructions/aes64ds.sv index fb3ea0609..fb231a1b3 100644 --- a/src/ieu/aes_instructions/aes64ds.sv +++ b/src/ieu/aes_instructions/aes64ds.sv @@ -35,11 +35,11 @@ module aes64ds( logic [31:0] SboxOut0, SboxOut1; // Apply inverse shiftrows to rs2 and rs1 - aesinvshiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRowOut)); + aesinvshiftrow srow({rs2,rs1}, ShiftRowOut); // Apply full word inverse substitution to lower 2 words of shiftrow out - aesinvsboxword inv_sbox_0(.in(ShiftRowOut[31:0]), .out(SboxOut0)); - aesinvsboxword inv_sbox_1(.in(ShiftRowOut[63:32]), .out(SboxOut1)); + aesinvsboxword inv_sbox_0(ShiftRowOut[31:0], SboxOut0); + aesinvsboxword inv_sbox_1(ShiftRowOut[63:32], SboxOut1); // Concatenate the two substitution outputs to get result assign DataOut = {SboxOut1, SboxOut0}; diff --git a/src/ieu/aes_instructions/aes64dsm.sv b/src/ieu/aes_instructions/aes64dsm.sv index 995643f6d..72bc48a5a 100644 --- a/src/ieu/aes_instructions/aes64dsm.sv +++ b/src/ieu/aes_instructions/aes64dsm.sv @@ -36,15 +36,15 @@ module aes64dsm( logic [31:0] MixcolOut0, MixcolOut1; // Apply inverse shiftrows to rs2 and rs1 - aesinvshiftrow srow(.DataIn({rs2, rs1}), .DataOut(ShiftRowOut)); + aesinvshiftrow srow({rs2, rs1}, ShiftRowOut); // Apply full word inverse substitution to lower 2 words of shiftrow out - aesinvsboxword invsbox0(.in(ShiftRowOut[31:0]), .out(SboxOut0)); - aesinvsboxword invsbox1(.in(ShiftRowOut[63:32]), .out(SboxOut1)); + aesinvsboxword invsbox0(ShiftRowOut[31:0], SboxOut0); + aesinvsboxword invsbox1(ShiftRowOut[63:32], SboxOut1); // Apply inverse mixword to sbox outputs - aesinvmixcolumns invmw0(.in(SboxOut0), .out(MixcolOut0)); - aesinvmixcolumns invmw1(.in(SboxOut1), .out(MixcolOut1)); + aesinvmixcolumns invmw0(SboxOut0, MixcolOut0); + aesinvmixcolumns invmw1(SboxOut1, MixcolOut1); // Concatenate mixed words for output assign DataOut = {MixcolOut1, MixcolOut0}; diff --git a/src/ieu/aes_instructions/aes64es.sv b/src/ieu/aes_instructions/aes64es.sv index 62fc06822..388f3254f 100644 --- a/src/ieu/aes_instructions/aes64es.sv +++ b/src/ieu/aes_instructions/aes64es.sv @@ -34,9 +34,9 @@ module aes64es( logic [127:0] ShiftRowOut; // AES shiftrow unit - aesshiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRowOut)); + aesshiftrow srow({rs2,rs1}, ShiftRowOut); // Apply substitution box to 2 lower words - aessboxword sbox0(.in(ShiftRowOut[31:0]), .out(DataOut[31:0])); - aessboxword sbox1(.in(ShiftRowOut[63:32]), .out(DataOut[63:32])); + aessboxword sbox0(ShiftRowOut[31:0], DataOut[31:0]); + aessboxword sbox1(ShiftRowOut[63:32], DataOut[63:32]); endmodule diff --git a/src/ieu/aes_instructions/aes64esm.sv b/src/ieu/aes_instructions/aes64esm.sv index 1f51522de..603073d67 100644 --- a/src/ieu/aes_instructions/aes64esm.sv +++ b/src/ieu/aes_instructions/aes64esm.sv @@ -35,13 +35,13 @@ module aes64esm( logic [63:0] SboxOut; // AES shiftrow unit - aesshiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRowOut)); + aesshiftrow srow({rs2,rs1}, ShiftRowOut); // Apply substitution box to 2 lower words - aessboxword sbox0(.in(ShiftRowOut[31:0]), .out(SboxOut[31:0])); - aessboxword sbox1(.in(ShiftRowOut[63:32]), .out(SboxOut[63:32])); + aessboxword sbox0(ShiftRowOut[31:0], SboxOut[31:0]); + aessboxword sbox1(ShiftRowOut[63:32], SboxOut[63:32]); // Apply mix columns operations - aesmixcolumns mw0(.in(SboxOut[31:0]), .out(DataOut[31:0])); - aesmixcolumns mw1(.in(SboxOut[63:32]), .out(DataOut[63:32])); + aesmixcolumns mw0(SboxOut[31:0], DataOut[31:0]); + aesmixcolumns mw1(SboxOut[63:32], DataOut[63:32]); endmodule diff --git a/src/ieu/aes_instructions/aes64im.sv b/src/ieu/aes_instructions/aes64im.sv index fe2a4f0fb..c14c7e98a 100644 --- a/src/ieu/aes_instructions/aes64im.sv +++ b/src/ieu/aes_instructions/aes64im.sv @@ -30,6 +30,6 @@ module aes64im( output logic [63:0] DataOut ); - aesinvmixcolumns inv_mw_0(.in(rs1[31:0]), .out(DataOut[31:0])); - aesinvmixcolumns inv_mw_1(.in(rs1[63:32]), .out(DataOut[63:32])); + aesinvmixcolumns inv_mw_0(rs1[31:0], DataOut[31:0]); + aesinvmixcolumns inv_mw_1(rs1[63:32], DataOut[63:32]); endmodule diff --git a/src/ieu/aes_instructions/aes64ks1i.sv b/src/ieu/aes_instructions/aes64ks1i.sv index 824555f00..41a0183e2 100644 --- a/src/ieu/aes_instructions/aes64ks1i.sv +++ b/src/ieu/aes_instructions/aes64ks1i.sv @@ -39,7 +39,7 @@ module aes64ks1i( logic [31:0] SboxOut; // Get rcon value from table - rconlut128 rc(.rd(roundnum), .rconOut(rconPreShift)); + rconlut128 rc(roundnum, rconPreShift); // Shift RCON value assign rcon = {24'b0, rconPreShift}; @@ -54,7 +54,7 @@ module aes64ks1i( assign tmp2 = lastRoundFlag ? rs1[63:32] : rs1Rotate; // Substitute bytes of value obtained for tmp2 using Rijndael sbox - aessboxword sbox(.in(tmp2),.out(SboxOut)); + aessboxword sbox(tmp2, SboxOut); assign rd[31:0] = SboxOut ^ rcon; assign rd[63:32] = SboxOut ^ rcon; endmodule diff --git a/src/ieu/sha_instructions/sha256sig0.sv b/src/ieu/sha_instructions/sha256sig0.sv index c6760c55b..54ab387a3 100644 --- a/src/ieu/sha_instructions/sha256sig0.sv +++ b/src/ieu/sha_instructions/sha256sig0.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha256sig0 instruction +// Purpose: sha256sig0 instruction: SHA2-256 Sigma0 // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha256sig1.sv b/src/ieu/sha_instructions/sha256sig1.sv index ab3f8c0a1..b3868f2cc 100644 --- a/src/ieu/sha_instructions/sha256sig1.sv +++ b/src/ieu/sha_instructions/sha256sig1.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha256sig1 instruction +// Purpose: sha256sig1 instruction: SHA2-256 Sigma1 // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha256sum0.sv b/src/ieu/sha_instructions/sha256sum0.sv index 16240514d..2fcf9aa4a 100644 --- a/src/ieu/sha_instructions/sha256sum0.sv +++ b/src/ieu/sha_instructions/sha256sum0.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha256sum0 instruction +// Purpose: sha256sum0 instruction: : SHA2-256 Sum0 // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha256sum1.sv b/src/ieu/sha_instructions/sha256sum1.sv index ab9b37b9f..90dc51d50 100644 --- a/src/ieu/sha_instructions/sha256sum1.sv +++ b/src/ieu/sha_instructions/sha256sum1.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha256sum1 instruction +// Purpose: sha256sum1 instruction: : SHA2-256 Sum1 // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha512sig0.sv b/src/ieu/sha_instructions/sha512sig0.sv index 762ca7b3c..0ea6d2e07 100644 --- a/src/ieu/sha_instructions/sha512sig0.sv +++ b/src/ieu/sha_instructions/sha512sig0.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha512sig0 instruction +// Purpose: sha512sig0 instruction: RV64 SHA2-512 Sigma0 instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha512sig0h.sv b/src/ieu/sha_instructions/sha512sig0h.sv index 5b3b8555e..aea85708c 100644 --- a/src/ieu/sha_instructions/sha512sig0h.sv +++ b/src/ieu/sha_instructions/sha512sig0h.sv @@ -4,7 +4,7 @@ // Written: ryan.swann@okstate.edu, kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha512sig0h instruction +// Purpose: sha512sig0h instruction: RV32 SHA2-512 Sigma0 high instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -31,8 +31,8 @@ module sha512sig0h( output logic [31:0] DataOut ); - logic [31:0] shift1, shift7, shift8; // rs1 shifts - logic [31:0] shift31, shift24; // rs2 shifts + logic [31:0] shift1, shift7, shift8; // rs1 shifts + logic [31:0] shift31, shift24; // rs2 shifts // Shift rs1 assign shift1 = rs1 >> 1; diff --git a/src/ieu/sha_instructions/sha512sig0l.sv b/src/ieu/sha_instructions/sha512sig0l.sv index 6a5796e66..a49134338 100644 --- a/src/ieu/sha_instructions/sha512sig0l.sv +++ b/src/ieu/sha_instructions/sha512sig0l.sv @@ -4,7 +4,7 @@ // Written: ryan.swann@okstate.edu, kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha512sig0l instruction +// Purpose: sha512sig0l instruction: : RV32 SHA2-512 Sigma0 low instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -31,7 +31,7 @@ module sha512sig0l( output logic [31:0] DataOut ); - logic [31:0] shift1, shift7, shift8; // rs1 shifts + logic [31:0] shift1, shift7, shift8; // rs1 shifts logic [31:0] shift31, shift25, shift24; // rs2 shifts // rs1 shifts diff --git a/src/ieu/sha_instructions/sha512sig1.sv b/src/ieu/sha_instructions/sha512sig1.sv index 63836079a..3b573b178 100644 --- a/src/ieu/sha_instructions/sha512sig1.sv +++ b/src/ieu/sha_instructions/sha512sig1.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 6 February 2024 // -// Purpose: sha512sig1 instruction +// Purpose: sha512sig1 instruction: RV64 SHA2-512 Sigma1 instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha512sig1h.sv b/src/ieu/sha_instructions/sha512sig1h.sv index e424018a7..a4ccfb2b8 100644 --- a/src/ieu/sha_instructions/sha512sig1h.sv +++ b/src/ieu/sha_instructions/sha512sig1h.sv @@ -4,7 +4,7 @@ // Written: ryan.swann@okstate.edu, kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha512sig1h instruction +// Purpose: sha512sig1h instruction: : RV32 SHA2-512 Sigma1 high instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -32,8 +32,8 @@ module sha512sig1h( ); - logic [31:0] shift3, shift6, shift19; // rs1 shifts - logic [31:0] shift29, shift13; // rs2 shifts + logic [31:0] shift3, shift6, shift19; // rs1 shifts + logic [31:0] shift29, shift13; // rs2 shifts // shift rs1 assign shift3 = rs1 << 3; diff --git a/src/ieu/sha_instructions/sha512sig1l.sv b/src/ieu/sha_instructions/sha512sig1l.sv index 05c5799e3..71ecf5210 100644 --- a/src/ieu/sha_instructions/sha512sig1l.sv +++ b/src/ieu/sha_instructions/sha512sig1l.sv @@ -4,7 +4,7 @@ // Written: ryan.swann@okstate.edu, kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 20 February 2024 // -// Purpose: sha512sig1l instruction +// Purpose: sha512sig1l instruction: : RV32 SHA2-512 Sigma1 low instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -31,8 +31,8 @@ module sha512sig1l( output logic [31:0] DataOut ); - logic [31:0] shift3, shift6, shift19; // rs1 shifts - logic [31:0] shift29, shift26, shift13; + logic [31:0] shift3, shift6, shift19; // rs1 shifts + logic [31:0] shift29, shift26, shift13; // rs2 shifts // Shift rs1 assign shift3 = rs1 << 3; diff --git a/src/ieu/sha_instructions/sha512sum0.sv b/src/ieu/sha_instructions/sha512sum0.sv index e364d9c9b..e4b4a3b1a 100644 --- a/src/ieu/sha_instructions/sha512sum0.sv +++ b/src/ieu/sha_instructions/sha512sum0.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 6 February 2024 // -// Purpose: sha512sum0 instruction +// Purpose: sha512sum0 instruction: RV64 SHA2-512 Sum0 instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha512sum0r.sv b/src/ieu/sha_instructions/sha512sum0r.sv index a64b7678a..04738f322 100644 --- a/src/ieu/sha_instructions/sha512sum0r.sv +++ b/src/ieu/sha_instructions/sha512sum0r.sv @@ -4,7 +4,7 @@ // Written: ryan.swann@okstate.edu, kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 6 February 2024 // -// Purpose: sha512sum0r instruction +// Purpose: sha512sum0r instruction: RV32 SHA2-512 Sum0 instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -32,7 +32,7 @@ module sha512sum0r( ); logic [31:0] shift25, shift30, shift28; // rs1 shifts - logic [31:0] shift7, shift2, shift4; // rs2 shifts + logic [31:0] shift7, shift2, shift4; // rs2 shifts // Shift rs1 assign shift25 = rs1 << 25; diff --git a/src/ieu/sha_instructions/sha512sum1.sv b/src/ieu/sha_instructions/sha512sum1.sv index 5c33f828c..32affd18e 100644 --- a/src/ieu/sha_instructions/sha512sum1.sv +++ b/src/ieu/sha_instructions/sha512sum1.sv @@ -4,7 +4,7 @@ // Written: kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 6 February 2024 // -// Purpose: sha512sum1 instruction +// Purpose: sha512sum1 instruction: RV64 SHA2-512 Sum1 instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw diff --git a/src/ieu/sha_instructions/sha512sum1r.sv b/src/ieu/sha_instructions/sha512sum1r.sv index ce06bb163..329814b3b 100644 --- a/src/ieu/sha_instructions/sha512sum1r.sv +++ b/src/ieu/sha_instructions/sha512sum1r.sv @@ -4,7 +4,7 @@ // Written: ryan.swann@okstate.edu, kelvin.tran@okstate.edu, james.stine@okstate.edu // Created: 6 February 2024 // -// Purpose: sha512sum1r instruction +// Purpose: sha512sum1r instruction: RV32 SHA2-512 Sum01instruction // // A component of the CORE-V-WALLY configurable RISC-V project. // https://github.com/openhwgroup/cvw @@ -32,7 +32,7 @@ module sha512sum1r( ); logic [31:0] shift1by23, shift1by14, shift1by18; // rs1 shifts - logic [31:0] shift2by9, shift2by18, shift2by14; // rs2 shifts + logic [31:0] shift2by9, shift2by18, shift2by14; // rs2 shifts // Shift RS1 assign shift1by23 = rs1 << 23;