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Success! We have some instructions comparing across the FPGA and IDV!

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However I'm still losing ethernet frames.
This commit is contained in:
Ross Thompson 2024-06-17 13:41:40 -07:00
parent 598770da51
commit 93829ce509
1 changed files with 35 additions and 0 deletions
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35
fpga/rvvidaemon/rvvidaemon.c
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@ -98,6 +98,7 @@ void PrintInstructionData(RequiredRVVI_t *InstructionData);
void ProcessRvviAll(RequiredRVVI_t *InstructionData);
void set_gpr(int hart, int reg, uint64_t value);
void set_fpr(int hart, int reg, uint64_t value);
void state_compare(int hart, uint64_t Minstret);
int main(int argc, char **argv){
@ -232,12 +233,46 @@ void ProcessRvviAll(RequiredRVVI_t *InstructionData){
if(InstructionData->GPREn) set_gpr(0, InstructionData->GPRReg, InstructionData->GPRValue);
if(InstructionData->FPREn) set_fpr(0, InstructionData->FPRReg, InstructionData->FPRValue);
if (trap) {
rvviDutTrap(0, InstructionData->PC, InstructionData->insn);
} else {
rvviDutRetire(0, InstructionData->PC, InstructionData->insn, 0);
}
if(!trap) state_compare(0, InstructionData->Minstret);
// *** set is for nets like interrupts come back to this.
//found = rvviRefNetIndexGet("pc_rdata");
//rvviRefNetSet(found, InstructionData->PC, time);
}
void state_compare(int hart, uint64_t Minstret){
uint8_t result = 1;
uint8_t stepOk = 0;
char buf[80];
rvviDutCycleCountSet(Minstret);
if(rvviRefEventStep(hart) != 0) {
stepOk = 1;
result &= rvviRefPcCompare(hart);
result &= rvviRefInsBinCompare(hart);
result &= rvviRefGprsCompare(hart);
result &= rvviRefFprsCompare(hart);
//result &= rvviRefCsrCompare(hart);
} else {
result = 0;
}
if (result == 0) {
sprintf(buf, "MISMATCH @ instruction # %ld\n", Minstret);
idvMsgError(buf);
//if (ON_MISMATCH_DUMP_STATE) dump_state(hart);
}
}
void set_gpr(int hart, int reg, uint64_t value){
rvviDutGprSet(hart, reg, value);
}