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Address comments in openhwgroup/cvw#180
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@ -147,6 +147,7 @@ module fctrl (
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7'b0100001: if (Rs2D[4:2] == 3'b000 & SupportedFmt2 & Rs2D[1:0] != 2'b01)
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ControlsD = `FCTRLW'b1_0_01_00_001_0_0_0; // fcvt.d.(s/h/q)
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// coverage off
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// Not covered in testing because rv64gc does not support half or quad precision
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7'b0100010: if (Rs2D[4:2] == 3'b000 & SupportedFmt2 & Rs2D[1:0] != 2'b10)
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ControlsD = `FCTRLW'b1_0_01_00_010_0_0_0; // fcvt.h.(s/d/q)
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7'b0100011: if (Rs2D[4:2] == 3'b000 & SupportedFmt2 & Rs2D[1:0] != 2'b11)
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@ -177,6 +178,7 @@ module fctrl (
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5'b00011: ControlsD = `FCTRLW'b0_1_01_00_010_0_0_1; // fcvt.lu.d d->lu
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endcase
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// coverage off
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// Not covered in testing because rv64gc does not support half or quad precision
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7'b1101010: case(Rs2D)
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5'b00000: ControlsD = `FCTRLW'b1_0_01_00_101_0_0_0; // fcvt.h.w w->h
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5'b00001: ControlsD = `FCTRLW'b1_0_01_00_100_0_0_0; // fcvt.h.wu wu->h
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@ -38,10 +38,8 @@ main:
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fsh ft0, 8(a0)
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# Tests for fpu/fctrl.sv
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## The following cover lines 149 to 154
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fcvt.h.s ft1, ft0
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fcvt.q.s ft2, ft0
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## The following cover lines 179 to 204
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fcvt.h.w ft3, a0
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fcvt.h.wu ft3, a0
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fcvt.h.l ft3, a0
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