From 911b400af2cfd4ce47e6d48a748d7983684ba184 Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 18 Jan 2024 13:13:56 -0800 Subject: [PATCH] Fault on misaligned AMO --- src/mmu/mmu.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mmu/mmu.sv b/src/mmu/mmu.sv index c26ee2a44..dffa7be76 100644 --- a/src/mmu/mmu.sv +++ b/src/mmu/mmu.sv @@ -140,7 +140,7 @@ module mmu import cvw::*; #(parameter cvw_t P, 2'b11: DataMisalignedM = |VAdr[2:0]; // ld, sd, fld, fsd endcase assign LoadMisalignedFaultM = DataMisalignedM & ReadNoAmoAccessM & ~(P.ZICCLSM_SUPPORTED & Cacheable); - assign StoreAmoMisalignedFaultM = DataMisalignedM & WriteAccessM & ~(P.ZICCLSM_SUPPORTED & Cacheable); + assign StoreAmoMisalignedFaultM = DataMisalignedM & WriteAccessM & (~(P.ZICCLSM_SUPPORTED & Cacheable) | ReadAccessM); // Misaligned AMO faults even if ZICCLSM supported // Specify which type of page fault is occurring assign InstrPageFaultF = TLBPageFault & ExecuteAccessF;