From 8fb1673ab321f251d797a14306e097b25d40d826 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Tue, 15 Oct 2024 10:27:53 -0500 Subject: [PATCH] Updated email address authorship for my files. --- bin/CModelBTBAccuracy.sh | 2 +- bin/CModelBranchAccuracy.sh | 2 +- bin/SeparateBranch.sh | 2 +- bin/extractFunctionRadix.sh | 2 +- bin/parseHPMC.py | 2 +- bin/wally-tool-chain-install.sh | 2 +- fpga/rvvidaemon/rvvidaemon.c | 2 +- fpga/src/fpgaTop.sv | 2 +- fpga/src/fpgaTopArtyA7.sv | 2 +- fpga/src/wallypipelinedsocwrapper.sv | 2 +- src/cache/cache.sv | 2 +- src/cache/cacheLRU.sv | 2 +- src/cache/cachefsm.sv | 2 +- src/cache/cacheway.sv | 2 +- src/cache/subcachelineread.sv | 2 +- src/ebu/ahbcacheinterface.sv | 2 +- src/ebu/ahbinterface.sv | 2 +- src/ebu/buscachefsm.sv | 2 +- src/ebu/busfsm.sv | 2 +- src/ebu/controllerinput.sv | 2 +- src/ebu/ebu.sv | 2 +- src/ebu/ebufsmarb.sv | 2 +- src/generic/arrs.sv | 2 +- src/generic/binencoder.sv | 2 +- src/generic/mem/ram1p1rwbe.sv | 2 +- src/generic/mem/ram1p1rwe.sv | 2 +- src/generic/mem/ram2p1r1wbe.sv | 2 +- src/generic/onehotdecoder.sv | 2 +- src/ifu/bpred/RASPredictor.sv | 2 +- src/ifu/bpred/bpred.sv | 2 +- src/ifu/bpred/btb.sv | 2 +- src/ifu/bpred/gshare.sv | 2 +- src/ifu/bpred/gsharebasic.sv | 2 +- src/ifu/bpred/icpred.sv | 2 +- src/ifu/bpred/localaheadbp.sv | 2 +- src/ifu/bpred/localbpbasic.sv | 2 +- src/ifu/bpred/localrepairbp.sv | 2 +- src/ifu/bpred/satCounter2.sv | 2 +- src/ifu/bpred/twoBitPredictor.sv | 2 +- src/ifu/irom.sv | 2 +- src/ifu/spill.sv | 2 +- src/lsu/align.sv | 2 +- src/lsu/atomic.sv | 2 +- src/lsu/dtim.sv | 2 +- src/lsu/lsu.sv | 2 +- src/rvvi/csrindextoaddr.sv | 2 +- src/rvvi/packetizer.sv | 2 +- src/rvvi/priorityaomux.sv | 2 +- src/rvvi/regchangedetect.sv | 2 +- src/rvvi/rvvisynth.sv | 2 +- src/rvvi/triggergen.sv | 2 +- testbench/common/DCacheFlushFSM.sv | 2 +- testbench/common/functionName.sv | 2 +- testbench/common/loggers.sv | 2 +- testbench/common/rvvitbwrapper.sv | 2 +- testbench/common/watchdog.sv | 2 +- .../riscv-test-suite/rv32i_m/privilege/src/WALLY-cbom-01.S | 2 +- .../riscv-test-suite/rv32i_m/privilege/src/WALLY-cboz-01.S | 2 +- .../riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S | 2 +- .../riscv-test-suite/rv64i_m/privilege/src/WALLY-cboz-01.S | 2 +- 60 files changed, 60 insertions(+), 60 deletions(-) diff --git a/bin/CModelBTBAccuracy.sh b/bin/CModelBTBAccuracy.sh index 20a65bf98..504edf439 100755 --- a/bin/CModelBTBAccuracy.sh +++ b/bin/CModelBTBAccuracy.sh @@ -1,7 +1,7 @@ #!/bin/bash ########################################### -## Written: ross1728@gmail.com +## Written: rose@rosethompson.net ## Created: 23 October 2023 ## Modified: ## diff --git a/bin/CModelBranchAccuracy.sh b/bin/CModelBranchAccuracy.sh index 5e0e7bc01..039e38a8b 100755 --- a/bin/CModelBranchAccuracy.sh +++ b/bin/CModelBranchAccuracy.sh @@ -1,7 +1,7 @@ #!/bin/bash ########################################### -## Written: ross1728@gmail.com +## Written: rose@rosethompson.net ## Created: 12 March 2023 ## Modified: ## diff --git a/bin/SeparateBranch.sh b/bin/SeparateBranch.sh index 87648589f..27e0b1962 100755 --- a/bin/SeparateBranch.sh +++ b/bin/SeparateBranch.sh @@ -1,7 +1,7 @@ #!/bin/bash ########################################### -## Written: ross1728@gmail.com +## Written: rose@rosethompson.net ## Created: 12 March 2023 ## Modified: ## diff --git a/bin/extractFunctionRadix.sh b/bin/extractFunctionRadix.sh index a0480f855..c9446a3b5 100755 --- a/bin/extractFunctionRadix.sh +++ b/bin/extractFunctionRadix.sh @@ -4,7 +4,7 @@ ## extractFunctionRadix.sh ## ## Written: Rose Thompson -## email: ross1728@gmail.com +## email: rose@rosethompson.net ## Created: March 1, 2021 ## Modified: March 10, 2021 ## diff --git a/bin/parseHPMC.py b/bin/parseHPMC.py index 4408f2211..c0137916f 100755 --- a/bin/parseHPMC.py +++ b/bin/parseHPMC.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 ########################################### -## Written: Rose Thompson ross1728@gmail.com +## Written: Rose Thompson rose@rosethompson.net ## Created: 20 September 2023 ## Modified: ## diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index fdb9d6e4f..d27e2a392 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -2,7 +2,7 @@ ########################################### ## Tool chain install script. ## -## Written: Rose Thompson ross1728@gmail.com +## Written: Rose Thompson rose@rosethompson.net ## Created: 18 January 2023 ## Modified: 22 January 2023 ## Modified: 23 March 2023 diff --git a/fpga/rvvidaemon/rvvidaemon.c b/fpga/rvvidaemon/rvvidaemon.c index 1932038ad..3ac9c6f43 100644 --- a/fpga/rvvidaemon/rvvidaemon.c +++ b/fpga/rvvidaemon/rvvidaemon.c @@ -1,7 +1,7 @@ /////////////////////////////////////////// // rvvi daemon // -// Written: Rose Thomposn ross1728@gmail.com +// Written: Rose Thomposn rose@rosethompson.net // Created: 31 May 2024 // Modified: 31 May 2024 // diff --git a/fpga/src/fpgaTop.sv b/fpga/src/fpgaTop.sv index 0ecce067b..2bf6aee5e 100644 --- a/fpga/src/fpgaTop.sv +++ b/fpga/src/fpgaTop.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // fpgaTop.sv // -// Written: ross1728@gmail.com November 17, 2021 +// Written: rose@rosethompson.net November 17, 2021 // Modified: // // Purpose: This is a top level for the fpga's implementation of wally. diff --git a/fpga/src/fpgaTopArtyA7.sv b/fpga/src/fpgaTopArtyA7.sv index cb350e08a..07c66ff95 100644 --- a/fpga/src/fpgaTopArtyA7.sv +++ b/fpga/src/fpgaTopArtyA7.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // fpgaTop.sv // -// Written: ross1728@gmail.com November 17, 2021 +// Written: rose@rosethompson.net November 17, 2021 // Modified: // // Purpose: This is a top level for the fpga's implementation of wally. diff --git a/fpga/src/wallypipelinedsocwrapper.sv b/fpga/src/wallypipelinedsocwrapper.sv index a1e907913..db382ade1 100644 --- a/fpga/src/wallypipelinedsocwrapper.sv +++ b/fpga/src/wallypipelinedsocwrapper.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // wallypipelinedsocwrapper.sv // -// Written: Rose Thompson ross1728@gmail.com 16 June 2023 +// Written: Rose Thompson rose@rosethompson.net 16 June 2023 // Modified: // // Purpose: A wrapper to set parameters. Vivado cannot set the top level parameters because it only supports verilog, diff --git a/src/cache/cache.sv b/src/cache/cache.sv index 4c89d08cc..5855afb03 100644 --- a/src/cache/cache.sv +++ b/src/cache/cache.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // cache.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 7 July 2021 // Modified: 20 January 2023 // diff --git a/src/cache/cacheLRU.sv b/src/cache/cacheLRU.sv index 79b277a03..7f1904bbd 100644 --- a/src/cache/cacheLRU.sv +++ b/src/cache/cacheLRU.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // cacheLRU.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 20 July 2021 // Modified: 20 January 2023 // diff --git a/src/cache/cachefsm.sv b/src/cache/cachefsm.sv index 28cdc7440..1a39ad17a 100644 --- a/src/cache/cachefsm.sv +++ b/src/cache/cachefsm.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // cachefsm.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 25 August 2021 // Modified: 20 January 2023 // diff --git a/src/cache/cacheway.sv b/src/cache/cacheway.sv index fb9d39f41..addf1a019 100644 --- a/src/cache/cacheway.sv +++ b/src/cache/cacheway.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // cacheway // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 7 July 2021 // Modified: 20 January 2023 // diff --git a/src/cache/subcachelineread.sv b/src/cache/subcachelineread.sv index 2c340c092..262992b52 100644 --- a/src/cache/subcachelineread.sv +++ b/src/cache/subcachelineread.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // subcachelineread.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 4 February 2022 // Modified: 20 January 2023 // diff --git a/src/ebu/ahbcacheinterface.sv b/src/ebu/ahbcacheinterface.sv index 572e824bb..f3fc676b0 100644 --- a/src/ebu/ahbcacheinterface.sv +++ b/src/ebu/ahbcacheinterface.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // ahbcacheinterface.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: August 29, 2022 // Modified: 18 January 2023 // diff --git a/src/ebu/ahbinterface.sv b/src/ebu/ahbinterface.sv index 821633f71..5e5406c1f 100644 --- a/src/ebu/ahbinterface.sv +++ b/src/ebu/ahbinterface.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // ahbinterface.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: August 29, 2022 // Modified: 18 January 2023 // diff --git a/src/ebu/buscachefsm.sv b/src/ebu/buscachefsm.sv index 9461bd5c5..f81bfa67a 100644 --- a/src/ebu/buscachefsm.sv +++ b/src/ebu/buscachefsm.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // busfsm.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: December 29, 2021 // Modified: 18 January 2023 // diff --git a/src/ebu/busfsm.sv b/src/ebu/busfsm.sv index 9080dbb83..fbd6fe3f6 100644 --- a/src/ebu/busfsm.sv +++ b/src/ebu/busfsm.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // busfsm.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: December 29, 2021 // Modified: 18 January 2023 // diff --git a/src/ebu/controllerinput.sv b/src/ebu/controllerinput.sv index 1c4c360ec..9f644e1d3 100644 --- a/src/ebu/controllerinput.sv +++ b/src/ebu/controllerinput.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // controllerinput.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: August 31, 2022 // Modified: 18 January 2023 // diff --git a/src/ebu/ebu.sv b/src/ebu/ebu.sv index 8242d27e6..642eb6de4 100644 --- a/src/ebu/ebu.sv +++ b/src/ebu/ebu.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // abhmulticontroller // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: August 29, 2022 // Modified: 18 January 2023 // diff --git a/src/ebu/ebufsmarb.sv b/src/ebu/ebufsmarb.sv index 2e7b345f2..853acd09b 100644 --- a/src/ebu/ebufsmarb.sv +++ b/src/ebu/ebufsmarb.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // ebufsmarb.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 23 January 2023 // Modified: 23 January 2023 // diff --git a/src/generic/arrs.sv b/src/generic/arrs.sv index c0d314dd5..9fa09f4b6 100644 --- a/src/generic/arrs.sv +++ b/src/generic/arrs.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // arrs.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Modified: November 12, 2021 // // Purpose: resets are typically asynchronous but need to be synchronized to diff --git a/src/generic/binencoder.sv b/src/generic/binencoder.sv index 83b245485..558eb759a 100644 --- a/src/generic/binencoder.sv +++ b/src/generic/binencoder.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // binencoder.sv // -// Written: ross1728@gmail.com November 14, 2022 +// Written: rose@rosethompson.net November 14, 2022 // // Purpose: one-hot to binary encoding. // diff --git a/src/generic/mem/ram1p1rwbe.sv b/src/generic/mem/ram1p1rwbe.sv index d17262d22..9151a35d2 100644 --- a/src/generic/mem/ram1p1rwbe.sv +++ b/src/generic/mem/ram1p1rwbe.sv @@ -2,7 +2,7 @@ // ram1p1r2be.sv // 1 port sram with byte enables // -// Written: ross1728@gmail.com +// Written: rose@rosethompson.net // Created: 3 May 2021 // Modified: 20 January 2023 // diff --git a/src/generic/mem/ram1p1rwe.sv b/src/generic/mem/ram1p1rwe.sv index cdca14e38..84effae19 100644 --- a/src/generic/mem/ram1p1rwe.sv +++ b/src/generic/mem/ram1p1rwe.sv @@ -2,7 +2,7 @@ // ram1p1rwe.sv // 1 port sram. // -// Written: avercruysse@hmc.edu (Modified from ram1p1rwbe, by ross1728@gmail.com) +// Written: avercruysse@hmc.edu (Modified from ram1p1rwbe, by rose@rosethompson.net) // Created: 04 April 2023 // // Purpose: ram1p1wre, but without byte-enable. Used for icache data. diff --git a/src/generic/mem/ram2p1r1wbe.sv b/src/generic/mem/ram2p1r1wbe.sv index 196aa0875..95840c2cc 100644 --- a/src/generic/mem/ram2p1r1wbe.sv +++ b/src/generic/mem/ram2p1r1wbe.sv @@ -2,7 +2,7 @@ // ram2p1r1wbe.sv // 2 port sram. // -// Written: ross1728@gmail.com May 3, 2021 +// Written: rose@rosethompson.net May 3, 2021 // Two port SRAM 1 read port and 1 write port. // When clk rises Addr and LineWriteData are sampled. // Following the clk edge read data is output from the sampled Addr. diff --git a/src/generic/onehotdecoder.sv b/src/generic/onehotdecoder.sv index 9b25feb65..91873c8e8 100644 --- a/src/generic/onehotdecoder.sv +++ b/src/generic/onehotdecoder.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // onehotdecoder.sv // -// Written: ross1728@gmail.com July 09, 2021 +// Written: rose@rosethompson.net July 09, 2021 // Modified: // // Purpose: Bin to one hot decoder. Power of 2 only. diff --git a/src/ifu/bpred/RASPredictor.sv b/src/ifu/bpred/RASPredictor.sv index d72f0e0d8..3bef28881 100644 --- a/src/ifu/bpred/RASPredictor.sv +++ b/src/ifu/bpred/RASPredictor.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // RASPredictor.sv // -// Written: Rose Thomposn ross1728@gmail.com +// Written: Rose Thomposn rose@rosethompson.net // Created: 15 February 2021 // Modified: 25 January 2023 // diff --git a/src/ifu/bpred/bpred.sv b/src/ifu/bpred/bpred.sv index 8d6a55d75..8b8793f27 100644 --- a/src/ifu/bpred/bpred.sv +++ b/src/ifu/bpred/bpred.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // bpred.sv // -// Written: Rose Thomposn ross1728@gmail.com +// Written: Rose Thomposn rose@rosethompson.net // Created: 12 February 2021 // Modified: 19 January 2023 // diff --git a/src/ifu/bpred/btb.sv b/src/ifu/bpred/btb.sv index e0ee0aaf4..6c6ace763 100644 --- a/src/ifu/bpred/btb.sv +++ b/src/ifu/bpred/btb.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // btb.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: February 15, 2021 // Modified: 24 January 2023 // diff --git a/src/ifu/bpred/gshare.sv b/src/ifu/bpred/gshare.sv index 057993536..46702e6b1 100644 --- a/src/ifu/bpred/gshare.sv +++ b/src/ifu/bpred/gshare.sv @@ -2,7 +2,7 @@ // gshare.sv // // Written: Rose Thompson -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: 16 March 2021 // Adapted from ssanghai@hmc.edu (Shreya Sanghai) // Modified: 20 February 2023 diff --git a/src/ifu/bpred/gsharebasic.sv b/src/ifu/bpred/gsharebasic.sv index a0563d809..3f88494fe 100644 --- a/src/ifu/bpred/gsharebasic.sv +++ b/src/ifu/bpred/gsharebasic.sv @@ -2,7 +2,7 @@ // gsharebasic.sv // // Written: Rose Thompson -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: 16 March 2021 // Adapted from ssanghai@hmc.edu (Shreya Sanghai) global history predictor implementation. // Modified: 20 February 2023 diff --git a/src/ifu/bpred/icpred.sv b/src/ifu/bpred/icpred.sv index 01ebaca01..0b1992210 100644 --- a/src/ifu/bpred/icpred.sv +++ b/src/ifu/bpred/icpred.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // icpred.sv // -// Written: Rose Thomposn ross1728@gmail.com +// Written: Rose Thomposn rose@rosethompson.net // Created: February 26, 2023 // Modified: February 26, 2023 // diff --git a/src/ifu/bpred/localaheadbp.sv b/src/ifu/bpred/localaheadbp.sv index a2c7bda5a..e3d6ef8ed 100644 --- a/src/ifu/bpred/localaheadbp.sv +++ b/src/ifu/bpred/localaheadbp.sv @@ -2,7 +2,7 @@ // localaheadbp // // Written: Rose Thompson -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: 16 March 2021 // // Purpose: local history branch predictor with ahead pipelining and SRAM memories. diff --git a/src/ifu/bpred/localbpbasic.sv b/src/ifu/bpred/localbpbasic.sv index b5634ef8a..5b2334a3d 100644 --- a/src/ifu/bpred/localbpbasic.sv +++ b/src/ifu/bpred/localbpbasic.sv @@ -2,7 +2,7 @@ // localbpbasic // // Written: Rose Thompson -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: 16 March 2021 // // Purpose: Local history branch predictor. Basic implementation without any repair and flop memories. diff --git a/src/ifu/bpred/localrepairbp.sv b/src/ifu/bpred/localrepairbp.sv index 5bb614d7f..e15c77f3c 100644 --- a/src/ifu/bpred/localrepairbp.sv +++ b/src/ifu/bpred/localrepairbp.sv @@ -2,7 +2,7 @@ // localrepairbp // // Written: Rose Thompson -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: 15 April 2023 // // Purpose: Local history branch predictor with speculation and repair using CBH. diff --git a/src/ifu/bpred/satCounter2.sv b/src/ifu/bpred/satCounter2.sv index f59cef82b..90cdf4f58 100644 --- a/src/ifu/bpred/satCounter2.sv +++ b/src/ifu/bpred/satCounter2.sv @@ -2,7 +2,7 @@ // satCounter2.sv // // Written: Rose Thomposn -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: February 13, 2021 // Modified: // diff --git a/src/ifu/bpred/twoBitPredictor.sv b/src/ifu/bpred/twoBitPredictor.sv index 52a04d6e4..2277f8b9b 100644 --- a/src/ifu/bpred/twoBitPredictor.sv +++ b/src/ifu/bpred/twoBitPredictor.sv @@ -2,7 +2,7 @@ // twoBitPredictor.sv // // Written: Rose Thomposn -// Email: ross1728@gmail.com +// Email: rose@rosethompson.net // Created: February 14, 2021 // Modified: // diff --git a/src/ifu/irom.sv b/src/ifu/irom.sv index ebebfbe4a..f85b60a5d 100644 --- a/src/ifu/irom.sv +++ b/src/ifu/irom.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // irom.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 30 January 2022 // Modified: 18 January 2023 // diff --git a/src/ifu/spill.sv b/src/ifu/spill.sv index c3c518913..f073398f3 100644 --- a/src/ifu/spill.sv +++ b/src/ifu/spill.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // spill.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 28 January 2022 // Modified: 19 January 2023 // diff --git a/src/lsu/align.sv b/src/lsu/align.sv index db37f4a66..f1e2e1892 100644 --- a/src/lsu/align.sv +++ b/src/lsu/align.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // spill.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 26 October 2023 // Modified: 26 October 2023 // diff --git a/src/lsu/atomic.sv b/src/lsu/atomic.sv index 8ad9159ce..cd87d70ac 100644 --- a/src/lsu/atomic.sv +++ b/src/lsu/atomic.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // atomic.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 31 January 2022 // Modified: 18 January 2023 // diff --git a/src/lsu/dtim.sv b/src/lsu/dtim.sv index 3fb6c81f6..f6530edc8 100644 --- a/src/lsu/dtim.sv +++ b/src/lsu/dtim.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // dtim.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 30 January 2022 // Modified: 18 January 2023 // diff --git a/src/lsu/lsu.sv b/src/lsu/lsu.sv index 08e62f9ad..a1dd85d98 100644 --- a/src/lsu/lsu.sv +++ b/src/lsu/lsu.sv @@ -1,7 +1,7 @@ ///////////////////////////////////////////////////////////////////////////////////////////////////////// // lsu.sv // -// Written: David_Harris@hmc.edu, ross1728@gmail.com +// Written: David_Harris@hmc.edu, rose@rosethompson.net // Created: 9 January 2021 // Modified: 11 January 2023 // diff --git a/src/rvvi/csrindextoaddr.sv b/src/rvvi/csrindextoaddr.sv index 0a843f491..4612dd4ee 100644 --- a/src/rvvi/csrindextoaddr.sv +++ b/src/rvvi/csrindextoaddr.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // csrindextoaddr.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 24 January 2024 // Modified: 24 January 2024 // diff --git a/src/rvvi/packetizer.sv b/src/rvvi/packetizer.sv index 77c58f467..29a58d383 100644 --- a/src/rvvi/packetizer.sv +++ b/src/rvvi/packetizer.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // packetizer.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 21 May 2024 // Modified: 21 May 2024 // diff --git a/src/rvvi/priorityaomux.sv b/src/rvvi/priorityaomux.sv index d542c946f..7b119a81f 100644 --- a/src/rvvi/priorityaomux.sv +++ b/src/rvvi/priorityaomux.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // priorityaomux.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 24 January 2024 // Modified: 24 January 2024 // diff --git a/src/rvvi/regchangedetect.sv b/src/rvvi/regchangedetect.sv index 8becf867d..31d4ea1ec 100644 --- a/src/rvvi/regchangedetect.sv +++ b/src/rvvi/regchangedetect.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // regchangedetect.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 24 January 2024 // Modified: 24 January 2024 // diff --git a/src/rvvi/rvvisynth.sv b/src/rvvi/rvvisynth.sv index aa1c55aef..3e8170c93 100644 --- a/src/rvvi/rvvisynth.sv +++ b/src/rvvi/rvvisynth.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // rvvisynth.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: 23 January 2024 // Modified: 23 January 2024 // diff --git a/src/rvvi/triggergen.sv b/src/rvvi/triggergen.sv index 0a4269024..a4e74de91 100644 --- a/src/rvvi/triggergen.sv +++ b/src/rvvi/triggergen.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // triggergen.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Created: June 26, 2024 // Modified: June 26, 2024 // diff --git a/testbench/common/DCacheFlushFSM.sv b/testbench/common/DCacheFlushFSM.sv index cde584af2..5764ce26b 100644 --- a/testbench/common/DCacheFlushFSM.sv +++ b/testbench/common/DCacheFlushFSM.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // DCacheFlushFSM.sv // -// Written: David Harris David_Harris@hmc.edu and Rose Thompson ross1728@gmail.com +// Written: David Harris David_Harris@hmc.edu and Rose Thompson rose@rosethompson.net // Modified: 14 June 2023 // // Purpose: The L1 data cache and any feature L2 or high cache will not necessary writeback all dirty diff --git a/testbench/common/functionName.sv b/testbench/common/functionName.sv index eac58f40a..5a14c84a4 100644 --- a/testbench/common/functionName.sv +++ b/testbench/common/functionName.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // functionName.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // // Purpose: decode name of function // diff --git a/testbench/common/loggers.sv b/testbench/common/loggers.sv index a9edb7892..6b026257a 100644 --- a/testbench/common/loggers.sv +++ b/testbench/common/loggers.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // loggers.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Modified: 14 June 2023 // // Purpose: Log branch instructions, log instruction fetches, diff --git a/testbench/common/rvvitbwrapper.sv b/testbench/common/rvvitbwrapper.sv index bd964d40d..f9c1f316c 100644 --- a/testbench/common/rvvitbwrapper.sv +++ b/testbench/common/rvvitbwrapper.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // loggers.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Modified: 24 July 2024 // // Purpose: Wraps all the synthesizable rvvi hardware into a single module for the testbench. diff --git a/testbench/common/watchdog.sv b/testbench/common/watchdog.sv index 9dbf6fa8b..f4b02a2e3 100644 --- a/testbench/common/watchdog.sv +++ b/testbench/common/watchdog.sv @@ -1,7 +1,7 @@ /////////////////////////////////////////// // watchdog.sv // -// Written: Rose Thompson ross1728@gmail.com +// Written: Rose Thompson rose@rosethompson.net // Modified: 14 June 2023 // // Purpose: Detects if the processor is stuck and halts the simulation diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cbom-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cbom-01.S index 2edd1fc55..f3e3846f3 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cbom-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cbom-01.S @@ -3,7 +3,7 @@ // WALLY-cache-management-tests // invalidate, clean, and flush // -// Author: Rose Thompson +// Author: Rose Thompson // // Created 18 August 2023 // diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cboz-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cboz-01.S index ceb3c3603..2df8c246f 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cboz-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-cboz-01.S @@ -3,7 +3,7 @@ // WALLY-cache-management-tests // invalidate, clean, and flush // -// Author: Rose Thompson +// Author: Rose Thompson // // Created 22 August 2023 // diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S index 31b11874b..e0c724aec 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S @@ -3,7 +3,7 @@ // WALLY-cache-management-tests // invalidate, clean, and flush // -// Author: Rose Thompson +// Author: Rose Thompson // // Created 18 August 2023 // diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cboz-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cboz-01.S index 97c3946eb..0e615a943 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cboz-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cboz-01.S @@ -3,7 +3,7 @@ // WALLY-cache-management-tests // invalidate, clean, and flush // -// Author: Rose Thompson +// Author: Rose Thompson // // Created 22 August 2023 //