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Maybe I finally have the ahead pipelined local history predictor working.

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This commit is contained in:
Ross Thompson 2023-05-04 14:11:34 -05:00
parent afafa9718d
commit 8da2b18543
2 changed files with 9 additions and 9 deletions
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2
src/ifu/bpred/bpred.sv
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@ -135,7 +135,7 @@ module bpred (
end else if (`BPRED_TYPE == "BP_LOCAL_AHEAD") begin:Predictor end else if (`BPRED_TYPE == "BP_LOCAL_AHEAD") begin:Predictor
localaheadbp #(`BPRED_NUM_LHR, `BPRED_SIZE) DirPredictor(.clk, .reset, localaheadbp #(`BPRED_NUM_LHR, `BPRED_SIZE) DirPredictor(.clk, .reset,
.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
.PCNextF, .PCM, .BPDirPredD(BPDirPredF), .BPDirPredWrongE, .PCNextF, .PCM, .BPDirPredF(BPDirPredF), .BPDirPredWrongE,
.BranchE, .BranchM, .PCSrcE); .BranchE, .BranchM, .PCSrcE);
end end

16
src/ifu/bpred/localaheadbp.sv
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@ -35,7 +35,7 @@ module localaheadbp #(parameter m = 6, // 2^m = number of local history branches
input logic reset, input logic reset,
input logic StallF, StallD, StallE, StallM, StallW, input logic StallF, StallD, StallE, StallM, StallW,
input logic FlushD, FlushE, FlushM, FlushW, input logic FlushD, FlushE, FlushM, FlushW,
output logic [1:0] BPDirPredD, output logic [1:0] BPDirPredF,
output logic BPDirPredWrongE, output logic BPDirPredWrongE,
// update // update
input logic [`XLEN-1:0] PCNextF, PCM, input logic [`XLEN-1:0] PCNextF, PCM,
@ -43,8 +43,8 @@ module localaheadbp #(parameter m = 6, // 2^m = number of local history branches
); );
logic [k-1:0] IndexNextF, IndexM; logic [k-1:0] IndexNextF, IndexM;
//logic [1:0] BPDirPredD, BPDirPredE; logic [1:0] BPDirPredD, BPDirPredE;
logic [1:0] BPDirPredE; //logic [1:0] BPDirPredE;
logic [1:0] NewBPDirPredE, NewBPDirPredM; logic [1:0] NewBPDirPredE, NewBPDirPredM;
logic [k-1:0] LHRF, LHRD, LHRE, LHRM, LHRW, LHRNextF; logic [k-1:0] LHRF, LHRD, LHRE, LHRM, LHRW, LHRNextF;
@ -58,18 +58,18 @@ module localaheadbp #(parameter m = 6, // 2^m = number of local history branches
logic UpdateM; logic UpdateM;
//assign IndexNextF = LHR; //assign IndexNextF = LHR;
assign IndexM = LHRM; assign IndexM = LHRW;
ram2p1r1wbe #(2**k, 2) PHT(.clk(clk), ram2p1r1wbe #(2**k, 2) PHT(.clk(clk),
.ce1(~StallF), .ce2(~StallW & ~FlushW), .ce1(~StallF), .ce2(~StallW & ~FlushW),
.ra1(LHRF), .ra1(LHRF),
.rd1(BPDirPredD), .rd1(BPDirPredF),
.wa2(IndexM), .wa2(IndexM),
.wd2(NewBPDirPredM), .wd2(NewBPDirPredM),
.we2(BranchM), .we2(BranchM),
.bwe2(1'b1)); .bwe2(1'b1));
//flopenrc #(2) PredictionRegD(clk, reset, FlushD, ~StallD, BPDirPredF, BPDirPredD); flopenrc #(2) PredictionRegD(clk, reset, FlushD, ~StallD, BPDirPredF, BPDirPredD);
flopenrc #(2) PredictionRegE(clk, reset, FlushE, ~StallE, BPDirPredD, BPDirPredE); flopenrc #(2) PredictionRegE(clk, reset, FlushE, ~StallE, BPDirPredD, BPDirPredE);
satCounter2 BPDirUpdateE(.BrDir(PCSrcE), .OldState(BPDirPredE), .NewState(NewBPDirPredE)); satCounter2 BPDirUpdateE(.BrDir(PCSrcE), .OldState(BPDirPredE), .NewState(NewBPDirPredE));
@ -83,7 +83,7 @@ module localaheadbp #(parameter m = 6, // 2^m = number of local history branches
// GHR is both read and update in M. GHR is still pipelined so that the PHT is updated with the correct // GHR is both read and update in M. GHR is still pipelined so that the PHT is updated with the correct
// GHR. Local history in contrast must pipeline the specific history register read during F and then update // GHR. Local history in contrast must pipeline the specific history register read during F and then update
// that same one in M. This implementation does not forward if a branch matches in the D, E, or M stages. // that same one in M. This implementation does not forward if a branch matches in the D, E, or M stages.
assign LHRNextW = BranchM ? {PCSrcM, LHRM[k-1:1]} : LHRM; assign LHRNextW = BranchM ? {PCSrcM, LHRW[k-1:1]} : LHRW;
// this is local history // this is local history
//genvar index; //genvar index;
@ -107,7 +107,7 @@ module localaheadbp #(parameter m = 6, // 2^m = number of local history branches
flopenrc #(k) LHRDReg(clk, reset, FlushD, ~StallD, LHRF, LHRD); flopenrc #(k) LHRDReg(clk, reset, FlushD, ~StallD, LHRF, LHRD);
flopenrc #(k) LHREReg(clk, reset, FlushE, ~StallE, LHRD, LHRE); flopenrc #(k) LHREReg(clk, reset, FlushE, ~StallE, LHRD, LHRE);
flopenrc #(k) LHRMReg(clk, reset, FlushM, ~StallM, LHRE, LHRM); flopenrc #(k) LHRMReg(clk, reset, FlushM, ~StallM, LHRE, LHRM);
flopenrc #(k) LHRWReg(clk, reset, FlushW, ~StallW, LHRNextW, LHRW); flopenrc #(k) LHRWReg(clk, reset, FlushW, ~StallW, LHRM, LHRW);
flopenr #(`XLEN) PCWReg(clk, reset, ~StallW, PCM, PCW); flopenr #(`XLEN) PCWReg(clk, reset, ~StallW, PCM, PCW);