diff --git a/src/fpu/divremsqrt/divremsqrtround.sv b/src/fpu/divremsqrt/divremsqrtround.sv
index c199f25b6..2911bd920 100644
--- a/src/fpu/divremsqrt/divremsqrtround.sv
+++ b/src/fpu/divremsqrt/divremsqrtround.sv
@@ -167,7 +167,7 @@ module divremsqrtround import cvw::*;  #(parameter cvw_t P)  (
 
   // only add the Addend sticky if doing an FMA opperation
   //      - the shifter shifts too far left when there's an underflow (shifting out all possible sticky bits)
-  assign Sticky = DivSticky&DivOp;
+  assign Sticky = DivSticky&DivOp | NormSticky;