From 8cb433cb66045512b885d1f08335c8c4d39bc1b9 Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Sun, 19 Nov 2023 19:33:57 -0800
Subject: [PATCH] Commented IROM preloading

---
 addins/riscv-arch-test     | 2 +-
 src/generic/mem/rom1p1r.sv | 2 +-
 src/ifu/irom.sv            | 4 +++-
 synthDC/wallySynthAll.sh   | 7 ++++---
 4 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/addins/riscv-arch-test b/addins/riscv-arch-test
index 9f9bdd62d..eb0a38922 160000
--- a/addins/riscv-arch-test
+++ b/addins/riscv-arch-test
@@ -1 +1 @@
-Subproject commit 9f9bdd62d3e37fcd8ad1b1a39d71694ccf1d74f3
+Subproject commit eb0a3892215ad2384702db02da1551a59701ec67
diff --git a/src/generic/mem/rom1p1r.sv b/src/generic/mem/rom1p1r.sv
index 5a45e354a..617a779ff 100644
--- a/src/generic/mem/rom1p1r.sv
+++ b/src/generic/mem/rom1p1r.sv
@@ -47,7 +47,7 @@ module rom1p1r #(parameter ADDR_WIDTH = 8, DATA_WIDTH = 32, PRELOAD_ENABLED = 0)
 
   initial begin
     if (PRELOAD_ENABLED) begin
-      $readmemh("../../../fpga/src/boot.mem", ROM, 0);
+      $readmemh("$WALLY/fpga/src/boot.mem", ROM, 0);
     end
   end
   
diff --git a/src/ifu/irom.sv b/src/ifu/irom.sv
index 0d4286e43..0b29c72cf 100644
--- a/src/ifu/irom.sv
+++ b/src/ifu/irom.sv
@@ -39,7 +39,9 @@ module irom import cvw::*;  #(parameter cvw_t P) (
   logic [31:0]       RawIROMInstrF;
   logic [2:1]        AdrD;
 
-  rom1p1r #(ADDR_WDITH, P.XLEN) rom(.clk, .ce, .addr(Adr[ADDR_WDITH+OFFSET-1:OFFSET]), .dout(IROMInstrFFull));
+  // preload IROM with the FPGA bootloader by default so that it syntehsizes to something, avoiding having the IEU optimized away because instructions are all 0
+  // the testbench replaces these dummy contents with the actual program of interest during simulation
+  rom1p1r #(ADDR_WDITH, P.XLEN, 1) rom(.clk, .ce, .addr(Adr[ADDR_WDITH+OFFSET-1:OFFSET]), .dout(IROMInstrFFull));
   if (P.XLEN == 32) assign RawIROMInstrF = IROMInstrFFull;
   else              begin
   // IROM is aligned to XLEN words, but instructions are 32 bits.  Select between the two
diff --git a/synthDC/wallySynthAll.sh b/synthDC/wallySynthAll.sh
index 9c085601c..9af40a379 100755
--- a/synthDC/wallySynthAll.sh
+++ b/synthDC/wallySynthAll.sh
@@ -1,7 +1,8 @@
 # Run all Wally synthesis experiments from chapter 8
-./wallySynth.py --freqsweep 330 --tech sky130 
-./wallySynth.py --freqsweep 870 --tech sky90 
-./wallySynth.py --freqsweep 2800 --tech tsmc28psyn --usesram
+# However, trying to run the freqsweeps at the same time maxes out licenses and some runs fail
+#./wallySynth.py --freqsweep 330 --tech sky130 
+#./wallySynth.py --freqsweep 870 --tech sky90 
+#./wallySynth.py --freqsweep 2800 --tech tsmc28psyn --usesram
 ./wallySynth.py --configsweep --tech sky130 --targetfreq 330
 ./wallySynth.py --configsweep --tech sky90 --targetfreq 870
 ./wallySynth.py --configsweep --tech tsmc28psyn --targetfreq 2800 --usesram