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https://github.com/openhwgroup/cvw
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I think ahead pipelining is working for local history.
This commit is contained in:
Ross Thompson
parent
414c79b923
commit
8b0791b6b5
@ -279,12 +279,13 @@ if(sys.argv[1] == '-b'):
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dct[PredType] = (currSize, currPercent)
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print(dct)
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fig, axes = plt.subplots()
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marker={'twobit' : '^', 'gshare' : 'o', 'global' : 's', 'gshareBasic' : '*', 'globalBasic' : 'x', 'btb': 'x', 'twobitCModel' : 'x', 'gshareCModel' : '*'}
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colors={'twobit' : 'black', 'gshare' : 'blue', 'global' : 'dodgerblue', 'gshareBasic' : 'turquoise', 'globalBasic' : 'lightsteelblue', 'btb' : 'blue', 'twobitCModel' : 'gray', 'gshareCModel' : 'dodgerblue'}
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marker={'twobit' : '^', 'gshare' : 'o', 'global' : 's', 'gshareBasic' : '*', 'globalBasic' : 'x', 'btb': 'x', 'twobitCModel' : 'x', 'gshareCModel' : '*', 'tenlocal' : '.', 'eightlocal' : ',', 'fourlocal' : 'x'}
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colors={'twobit' : 'black', 'gshare' : 'blue', 'global' : 'dodgerblue', 'gshareBasic' : 'turquoise', 'globalBasic' : 'lightsteelblue', 'btb' : 'blue', 'twobitCModel' : 'gray', 'gshareCModel' : 'dodgerblue', 'tenlocal' : 'lightblue', 'eightlocal' : 'lightblue', 'fourlocal' : 'lightblue'}
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for cat in dct:
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(x, y) = dct[cat]
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x=[int(2**int(v)) for v in x]
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print(x, y)
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#print(x, y)
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print(cat)
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axes.plot(x,y, color=colors[cat])
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axes.scatter(x,y, label=cat, marker=marker[cat], color=colors[cat])
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#plt.scatter(x, y, label=cat)
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@ -46,18 +46,33 @@ configs = [
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)
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]
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# bpdSize = [6, 8, 10, 12, 14, 16]
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# bpdType = ['twobit', 'gshare', 'global', 'gshare_basic', 'global_basic', 'local_basic']
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# for CurrBPType in bpdType:
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# for CurrBPSize in bpdSize:
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# name = CurrBPType+str(CurrBPSize)
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# configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_TYPE=\"BP_" + CurrBPType.upper() + "\" +define+BPRED_SIZE=" + str(CurrBPSize)
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# tc = TestCase(
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# name=name,
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# variant="rv32gc",
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# cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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# grepstr="")
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# configs.append(tc)
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bpdSize = [6, 8, 10, 12, 14, 16]
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bpdType = ['twobit', 'gshare', 'global', 'gshare_basic', 'global_basic']
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LHRSize = [4, 8, 10]
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bpdType = ['local_basic']
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for CurrBPType in bpdType:
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for CurrBPSize in bpdSize:
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name = CurrBPType+str(CurrBPSize)
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configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_TYPE=\"BP_" + CurrBPType.upper() + "\" +define+BPRED_SIZE=" + str(CurrBPSize)
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tc = TestCase(
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name=name,
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variant="rv32gc",
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cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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grepstr="")
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configs.append(tc)
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for CurrLHRSize in LHRSize:
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name = str(CurrLHRSize)+CurrBPType+str(CurrBPSize)
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configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_TYPE=\"BP_" + CurrBPType.upper() + "\" +define+BPRED_SIZE=" + str(CurrBPSize) + " +define+BPRED_NUM_LHR=" + str(CurrLHRSize) + " "
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tc = TestCase(
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name=name,
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variant="rv32gc",
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cmd="vsim > {} -c <<!\ndo wally-batch.do rv32gc configOptions " + name + " embench " + configOptions,
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grepstr="")
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configs.append(tc)
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import os
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from multiprocessing import Pool, TimeoutError
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@ -128,8 +128,13 @@ module bpred (
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.BranchE, .BranchM, .PCSrcE);
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end else if (`BPRED_TYPE == "BP_LOCAL_BASIC") begin:Predictor
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localbpbasic #(`BPRED_NUM_LHR, `BPRED_SIZE)
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DirPredictor(.clk, .reset, .StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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localbpbasic #(`BPRED_NUM_LHR, `BPRED_SIZE) DirPredictor(.clk, .reset,
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.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end else if (`BPRED_TYPE == "BP_LOCAL_AHEAD") begin:Predictor
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localaheadbp #(`BPRED_NUM_LHR, `BPRED_SIZE) DirPredictor(.clk, .reset,
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.StallF, .StallD, .StallE, .StallM, .StallW, .FlushD, .FlushE, .FlushM, .FlushW,
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.PCNextF, .PCM, .BPDirPredF, .BPDirPredWrongE,
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.BranchE, .BranchM, .PCSrcE);
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end
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111
src/ifu/bpred/localaheadbp.sv
Normal file
111
src/ifu/bpred/localaheadbp.sv
Normal file
@ -0,0 +1,111 @@
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///////////////////////////////////////////
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// gsharebasic.sv
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//
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// Written: Ross Thompson
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// Email: ross1728@gmail.com
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// Created: 16 March 2021
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// Adapted from ssanghai@hmc.edu (Shreya Sanghai) global history predictor implementation.
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// Modified: 20 February 2023
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//
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// Purpose: Global History Branch predictor with parameterized global history register
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module localaheadbp #(parameter m = 6, // 2^m = number of local history branches
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parameter k = 10) ( // number of past branches stored
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input logic clk,
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input logic reset,
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input logic StallF, StallD, StallE, StallM, StallW,
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input logic FlushD, FlushE, FlushM, FlushW,
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output logic [1:0] BPDirPredF,
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output logic BPDirPredWrongE,
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// update
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input logic [`XLEN-1:0] PCNextF, PCM,
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input logic BranchE, BranchM, PCSrcE
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);
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logic [k-1:0] IndexNextF, IndexM;
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logic [1:0] BPDirPredD, BPDirPredE;
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logic [1:0] NewBPDirPredE, NewBPDirPredM;
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logic [k-1:0] LHRF, LHRD, LHRE, LHRM, LHRNextF;
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logic [k-1:0] LHRNextW;
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logic PCSrcM;
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logic [2**m-1:0][k-1:0] LHRArray;
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logic [m-1:0] IndexLHRNextF, IndexLHRM;
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logic [`XLEN-1:0] PCW;
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logic UpdateM;
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//assign IndexNextF = LHR;
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assign IndexM = LHRM;
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ram2p1r1wbe #(2**k, 2) PHT(.clk(clk),
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.ce1(~StallF), .ce2(~StallW & ~FlushW),
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.ra1(LHRNextF),
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.rd1(BPDirPredF),
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.wa2(IndexM),
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.wd2(NewBPDirPredM),
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.we2(BranchM),
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.bwe2(1'b1));
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flopenrc #(2) PredictionRegD(clk, reset, FlushD, ~StallD, BPDirPredF, BPDirPredD);
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flopenrc #(2) PredictionRegE(clk, reset, FlushE, ~StallE, BPDirPredD, BPDirPredE);
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satCounter2 BPDirUpdateE(.BrDir(PCSrcE), .OldState(BPDirPredE), .NewState(NewBPDirPredE));
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flopenrc #(2) NewPredictionRegM(clk, reset, FlushM, ~StallM, NewBPDirPredE, NewBPDirPredM);
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assign BPDirPredWrongE = PCSrcE != BPDirPredE[1] & BranchE;
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// This is the main difference between global and local history basic implementations. In global,
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// the ghr wraps back into itself directly without
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// being pipelined. I.E. GHR is not read in F and then pipelined to M where it is updated. Instead
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// GHR is both read and update in M. GHR is still pipelined so that the PHT is updated with the correct
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// GHR. Local history in contrast must pipeline the specific history register read during F and then update
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// that same one in M. This implementation does not forward if a branch matches in the D, E, or M stages.
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assign LHRNextW = BranchM ? {PCSrcM, LHRM[k-1:1]} : LHRM;
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// this is local history
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//genvar index;
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//assign UpdateM = BranchM & ~StallW & ~FlushW;
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assign IndexLHRM = {PCW[m+1] ^ PCW[1], PCW[m:2]};
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assign IndexLHRNextF = {PCNextF[m+1] ^ PCNextF[1], PCNextF[m:2]};
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ram2p1r1wbe #(2**m, k) BHT(.clk(clk),
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.ce1(~StallF), .ce2(~StallW & ~FlushW),
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.ra1(IndexLHRNextF),
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.rd1(LHRNextF),
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.wa2(IndexLHRM),
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.wd2(LHRNextW),
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.we2(BranchM),
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.bwe2('1));
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flopenrc #(1) PCSrcMReg(clk, reset, FlushM, ~StallM, PCSrcE, PCSrcM);
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flopenrc #(k) LHRFReg(clk, reset, FlushD, ~StallF, LHRNextF, LHRF);
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flopenrc #(k) LHRDReg(clk, reset, FlushD, ~StallD, LHRF, LHRD);
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flopenrc #(k) LHREReg(clk, reset, FlushE, ~StallE, LHRD, LHRE);
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flopenrc #(k) LHRMReg(clk, reset, FlushM, ~StallM, LHRE, LHRM);
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flopenr #(`XLEN) PCWReg(clk, reset, ~StallW, PCM, PCW);
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endmodule
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@ -74,10 +74,10 @@ module localbpbasic #(parameter m = 6, // 2^m = number of local history branches
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assign BPDirPredWrongE = PCSrcE != BPDirPredE[1] & BranchE;
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// this is the main difference between global and local history basic implementations rather than
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// having multiple history registers. In global, the ghr wraps back into itself directly without
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// being pipelined. IE. GHR is not read in F and then pipelined to M where it is updated. Instead
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// GHR is just read in M and updated. GHR is still pipelined so that the PHT is updated with the correct
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// This is the main difference between global and local history basic implementations. In global,
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// the ghr wraps back into itself directly without
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// being pipelined. I.E. GHR is not read in F and then pipelined to M where it is updated. Instead
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// GHR is both read and update in M. GHR is still pipelined so that the PHT is updated with the correct
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// GHR. Local history in contrast must pipeline the specific history register read during F and then update
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// that same one in M. This implementation does not forward if a branch matches in the D, E, or M stages.
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assign LHRNextW = BranchM ? {PCSrcM, LHRM[k-1:1]} : LHRM;
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@ -28,7 +28,7 @@
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`include "wally-config.vh"
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`include "tests.vh"
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`define PrintHPMCounters 0
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`define PrintHPMCounters 1
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`define BPRED_LOGGER 0
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`define I_CACHE_ADDR_LOGGER 0
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`define D_CACHE_ADDR_LOGGER 0
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@ -536,6 +536,21 @@ module testbench;
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if (`BPRED_SUPPORTED) begin
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integer adrindex;
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// local history only
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if (`BPRED_TYPE == "BP_LOCAL_AHEAD") begin
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always @(*) begin
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if(reset) begin
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for(adrindex = 0; adrindex < 2**`BPRED_NUM_LHR; adrindex++) begin
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force dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex] = 0;
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end
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#1;
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for(adrindex = 0; adrindex < 2**`BPRED_NUM_LHR; adrindex++) begin
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release dut.core.ifu.bpred.bpred.Predictor.DirPredictor.BHT.mem[adrindex];
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end
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end
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end
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end
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always @(*) begin
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if(reset) begin
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for(adrindex = 0; adrindex < 2**`BTB_SIZE; adrindex++) begin
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