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AES32 sharing logic

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This commit is contained in:
David Harris 2024-03-11 01:36:46 -07:00
parent a714904696
commit 8af25a45e6
3 changed files with 25 additions and 28 deletions
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15
src/ieu/aes_instructions/aes32d.sv
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@ -26,23 +26,16 @@
////////////////////////////////////////////////////////////////////////////////////////////////
module aes32d(
input logic [1:0] bs,
input logic [31:0] rs1,
input logic [31:0] rs2,
input logic [7:0] SboxIn,
input logic finalround,
output logic [31:0] result
);
logic [4:0] shamt;
logic [7:0] SboxIn, SboxOut;
logic [31:0] so, mixed, rotin, rotout;
logic [7:0] SboxOut;
logic [31:0] so, mixed;
assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // select byte bs of rs2
aesinvsbox inv_sbox(SboxIn, SboxOut); // Apply inverse sbox to si
assign so = {24'h0, SboxOut}; // Pad output of inverse substitution box
aesinvmixcolumns mix(so, mixed); // Run so through the mixword AES function
mux2 #(32) rmux(mixed, so, finalround, rotin); // on final round, skip mixcolumns
rotate #(32) rot(rotin, shamt, rotout); // Rotate left by shamt (bs * 8)
assign result = rs1 ^ rotout; // xor with running value
mux2 #(32) rmux(mixed, so, finalround, result); // on final round, skip mixcolumns
endmodule

15
src/ieu/aes_instructions/aes32e.sv
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@ -26,23 +26,16 @@
////////////////////////////////////////////////////////////////////////////////////////////////
module aes32e(
input logic [1:0] bs,
input logic [31:0] rs1,
input logic [31:0] rs2,
input logic [7:0] SboxIn,
input logic finalround,
output logic [31:0] result
);
logic [4:0] shamt;
logic [7:0] SboxIn, SboxOut;
logic [31:0] so, mixed, rotin, rotout;
logic [7:0] SboxOut;
logic [31:0] so, mixed;
assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // select byte bs of rs2
aessbox sbox(SboxIn, SboxOut); // Substitute
assign so = {24'h0, SboxOut}; // Pad sbox output
aesmixcolumns mwd(so, mixed); // Mix Word using aesmixword component
mux2 #(32) rmux(mixed, so, finalround, rotin); // on final round, skip mixcolumns
rotate #(32) mrot(rotin, shamt, rotout); // Rotate the mixcolumns output left by shamt (bs * 8)
assign result = rs1 ^ rotout; // xor with running value
mux2 #(32) rmux(mixed, so, finalround, result); // on final round, skip mixcolumns
endmodule

23
src/ieu/kmu/zknde32.sv
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@ -34,16 +34,27 @@ module zknde32 import cvw::*; #(parameter cvw_t P) (
output logic [31:0] ZKNDEResult
);
logic [31:0] ZKNEResult, ZKNDResult;
logic [4:0] shamt;
logic [7:0] SboxIn;
logic [31:0] ZKNEResult, ZKNDResult, rotin, rotout;
if (P.ZKND_SUPPORTED) aes32d aes32d(.bs(Funct7[6:5]), .rs1(A), .rs2(B), .finalround(ZKNSelect[2]), .result(ZKNDResult));
if (P.ZKNE_SUPPORTED) aes32e aes32e(.bs(Funct7[6:5]), .rs1(A), .rs2(B), .finalround(ZKNSelect[2]), .result(ZKNEResult));
// Initial shamt and Sbox input selection steps shared between encrypt and decrypt
assign shamt = {Funct7[6:5], 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = B[shamt +: 8]; // select byte bs of rs2
// Handle logic specific to encrypt or decrypt
if (P.ZKND_SUPPORTED) aes32d aes32d(.SboxIn, .finalround(ZKNSelect[2]), .result(ZKNDResult));
if (P.ZKNE_SUPPORTED) aes32e aes32e(.SboxIn, .finalround(ZKNSelect[2]), .result(ZKNEResult));
// Mux result if both decrypt and encrypt are supported; otherwise, choose the only result
if (P.ZKND_SUPPORTED & P.ZKNE_SUPPORTED)
mux2 #(32) zknmux(ZKNDResult, ZKNEResult, ZKNSelect[0], ZKNDEResult);
mux2 #(32) zknmux(ZKNDResult, ZKNEResult, ZKNSelect[0], rotin);
else if (P.ZKND_SUPPORTED)
assign ZKNDEResult = ZKNDResult;
assign rotin = ZKNDResult;
else
assign ZKNDEResult = ZKNEResult;
assign rotin = ZKNEResult;
// final rotate and XOR steps shared between encrypt and decrypt
rotate #(32) mrot(rotin, shamt, rotout); // Rotate the mixcolumns output left by shamt (bs * 8)
assign ZKNDEResult = A ^ rotout; // xor with running value
endmodule