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	Minor optimization to btb.
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				@ -149,6 +149,7 @@ module bpred (
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          .PredValidF,
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          .PredictionInstrClassWrongE,
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          .IEUAdrE,
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          .InstrClassD,
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          .InstrClassE);
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  // the branch predictor needs a compact decoding of the instruction class.
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@ -41,6 +41,7 @@ module btb #(parameter int Depth = 10 ) (
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  // update
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  input  logic             PredictionInstrClassWrongE,             // BTB's instruction class guess was wrong
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  input  logic [`XLEN-1:0] IEUAdrE,                                // Branch/jump target address to insert into btb
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  input  logic [3:0]       InstrClassD,                            // Instruction class to insert into btb
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  input  logic [3:0]       InstrClassE                             // Instruction class to insert into btb
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);
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@ -71,7 +72,7 @@ module btb #(parameter int Depth = 10 ) (
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  assign ResetPC = `RESET_VECTOR;
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  assign PCNextFIndex = reset ? ResetPC[Depth+1:2] : {PCNextF[Depth+1] ^ PCNextF[1], PCNextF[Depth:2]}; 
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  assign MatchF = PCNextFIndex == PCFIndex;
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  assign MatchF = PCNextFIndex == PCFIndex & PredValidF;
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  assign MatchD = PCNextFIndex == PCDIndex;
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  assign MatchE = PCNextFIndex == PCEIndex;
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  assign MatchNextX = MatchF | MatchD | MatchE;
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@ -79,7 +80,7 @@ module btb #(parameter int Depth = 10 ) (
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  flopenr #(1) MatchReg(clk, reset, ~StallF, MatchNextX, MatchXF);
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  assign ForwardBTBPrediction = MatchF ? {BTBPredInstrClassF, PredPCF} :
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                                MatchD ? {PredInstrClassD, PredPCD} :
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                                MatchD ? {InstrClassD, PredPCD} :
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                                {InstrClassE, IEUAdrE} ;
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  flopenr #(`XLEN+4) ForwardBTBPredicitonReg(clk, reset, ~StallF, ForwardBTBPrediction, ForwardBTBPredictionF);
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@ -104,6 +105,6 @@ module btb #(parameter int Depth = 10 ) (
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    .clk, .ce1(~StallF | reset), .ra1(PCNextFIndex), .rd1(TableBTBPredictionF),
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     .ce2(~StallM & ~FlushM), .wa2(PCEIndex), .wd2({InstrClassE, IEUAdrE}), .we2(UpdateEn), .bwe2('1));
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  flopenrc #(`XLEN+4) BTBD(clk, reset, FlushD, ~StallD, {BTBPredInstrClassF, PredPCF}, {PredInstrClassD, PredPCD});
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  flopenrc #(`XLEN) BTBD(clk, reset, FlushD, ~StallD, PredPCF, PredPCD);
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endmodule
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