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Update VM sv32 test list
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parent
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@ -241,22 +241,30 @@ string arch64pmp[] = '{
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string arch32vm_sv32[] = '{
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`RISCVARCHTEST,
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"rv32i_m/vm_sv32/src/mstatus_tvm_test.S",
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"rv32i_m/vm_sv32/src/pmp_check_on_pa_S_mode.S",
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"rv32i_m/vm_sv32/src/pmp_check_on_pa_U_mode.S",
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"rv32i_m/vm_sv32/src/pmp_check_on_pte_S_mode.S",
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"rv32i_m/vm_sv32/src/pmp_check_on_pte_U_mode.S",
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"rv32i_m/vm_sv32/src/satp_access_tests.S",
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"rv32i_m/vm_sv32/src/vm_A_and_D_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_A_and_D_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_invalid_pte_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_invalid_pte_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_misaligned_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_misaligned_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_mprv_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_mprv_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_mprv_U_set_sum_set_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_mprv_U_set_sum_unset_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_mxr_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_mxr_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_nleaf_pte_level0_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_nleaf_pte_level0_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_reserved_pte_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_reserved_pte_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_reserved_rsw_pte_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_reserved_rsw_pte_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_reserved_rwx_pte_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_reserved_rwx_pte_U_mode.S",
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"rv32i_m/vm_sv32/src/vm_sum_set_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_sum_unset_S_mode.S",
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"rv32i_m/vm_sv32/src/vm_U_Bit_set_U_mode.S",
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