Combined byteop and revop logic

src/ieu/bmu/byteop.sv

@@ -1,9 +1,9 @@
 ///////////////////////////////////////////
 // byteop.sv
 //
-// Written: Kevin Kim <kekim@hmc.edu>
+// Written: Kevin Kim <kekim@hmc.edu>, kelvin.tran@okstate.edu
 // Created: 1 February 2023
-// Modified: 6 March 2023
+// Modified: 29 February 2024
 //
 // Purpose: RISCV bitmanip byte-wise operation unit
 //
@@ -12,7 +12,7 @@
 // A component of the CORE-V-WALLY configurable RISC-V project.
 // https://github.com/openhwgroup/cvw
 // 
-// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
 //
 // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 //
@@ -30,16 +30,24 @@
 
 module byteop #(parameter WIDTH=32) (
   input  logic [WIDTH-1:0] A,             // Operands
-  input  logic             ByteSelect,    // LSB of Immediate
+  input  logic [WIDTH-1:0] RevA,          // Reversed A
+  input  logic [1:0]       ByteSelect,    // LSB of Immediate
   output logic [WIDTH-1:0] ByteResult);   // rev8, orcb result
 
-  logic [WIDTH-1:0] OrcBResult, Rev8Result;
+  logic [WIDTH-1:0] OrcBResult, Rev8Result, Brev8Result;
   genvar i;
 
   for (i=0;i<WIDTH;i+=8) begin:loop
     assign OrcBResult[i+7:i] = {8{|A[i+7:i]}};
     assign Rev8Result[WIDTH-i-1:WIDTH-i-8] = A[i+7:i];
+    assign Brev8Result[i+7:i] = RevA[WIDTH-1-i:WIDTH-i-8];
   end
 
-  mux2 #(WIDTH) bytemux(Rev8Result, OrcBResult, ByteSelect, ByteResult);
+  // ByteOp Result Mux
+  always_comb begin
+    if (ByteSelect[0] == 1'b0)      ByteResult = Rev8Result;
+    else if (ByteSelect[1] == 1'b0) ByteResult = OrcBResult;
+    else                            ByteResult = Brev8Result;
+  end
+  
 endmodule

src/ieu/bmu/zbb.sv

@@ -46,7 +46,7 @@ module zbb #(parameter WIDTH=32) (
 
   mux2 #(1) ltmux(LT, LTU, BUnsigned , lt);
   cnt #(WIDTH) cnt(.A, .RevA, .B(B[1:0]), .W64, .CntResult);
-  byteop #(WIDTH) bu(.A, .ByteSelect(B[0]), .ByteResult);
+  byteop #(WIDTH) bu(.A, .RevA, .ByteSelect({B[10], B[0]}), .ByteResult);
   ext #(WIDTH) ext(.A, .ExtSelect({~B[2], {B[2] & B[0]}}), .ExtResult);
 
   // ZBBSelect[2] differentiates between min(u) vs max(u) instruction

src/ieu/kmu/revop.sv

@@ -1,44 +0,0 @@
-///////////////////////////////////////////
-// revop.sv
-//
-// Written: kelvin.tran@okstate.edu, james.stine@okstate.edu
-// Created: 5 October 2023
-//
-// Purpose: RISCV kbitmanip reverse byte-wise operation unit
-//
-// A component of the CORE-V-WALLY configurable RISC-V project.
-// https://github.com/openhwgroup/cvw
-// 
-// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
-//
-// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
-//
-// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
-// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
-// may obtain a copy of the License at
-//
-// https://solderpad.org/licenses/SHL-2.1/
-//
-// Unless required by applicable law or agreed to in writing, any work distributed under the 
-// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
-// either express or implied. See the License for the specific language governing permissions 
-// and limitations under the License.
-////////////////////////////////////////////////////////////////////////////////////////////////
-
-module revop #(parameter WIDTH=32) 
-   (input  logic [WIDTH-1:0] A,  // Operands
-    input logic [WIDTH-1:0]  RevA, // A Reversed
-    input logic 	     revType, // rev8 or brev8 (LSB of immediate)
-    output logic [WIDTH-1:0] RevResult); // results
-   
-   logic [WIDTH-1:0] 	     Rev8Result, Brev8Result;
-   genvar 		     i;
-   
-   for (i=0; i<WIDTH; i+=8) begin:loop
-      assign Rev8Result[WIDTH-i-1:WIDTH-i-8] = A[i+7:i];
-      assign Brev8Result[i+7:i] = RevA[WIDTH-1-i:WIDTH-i-8];
-   end
-   
-  mux2 #(WIDTH) revMux (Rev8Result, Brev8Result, revType, RevResult);
-   
-endmodule

src/ieu/kmu/zbkb.sv

@@ -32,15 +32,15 @@ module zbkb #(parameter WIDTH=32)
     input logic [2:0] 	     ZBKBSelect,
     output logic [WIDTH-1:0] ZBKBResult);
    
-   logic [WIDTH-1:0] 	     RevResult;    // rev8, brev8
+   logic [WIDTH-1:0] 	     ByteResult;    // rev8, brev8
    logic [WIDTH-1:0] 	     PackResult;   // pack, packh, packw (RB64 only)
    logic [WIDTH-1:0] 	     ZipResult;    // zip, unzip
    
-   revop #(WIDTH) rev(.A, .RevA, .revType(B[0]), .RevResult);
+   byteop #(WIDTH) rev(.A, .RevA, .ByteSelect({B[10], B[0]}), .ByteResult);
    packer #(WIDTH) pack(.A, .B, .PackSelect({ZBKBSelect[2], Funct3[1:0]}), .PackResult);
    zipper #(WIDTH) zip(.A, .ZipSelect(Funct3[2]), .ZipResult);
    
    // ZBKB Result Select Mux
-   mux3 #(WIDTH) zbkbresultmux(RevResult, PackResult, ZipResult, ZBKBSelect[1:0], ZBKBResult);
+   mux3 #(WIDTH) zbkbresultmux(ByteResult, PackResult, ZipResult, ZBKBSelect[1:0], ZBKBResult);
    
 endmodule