From 87d3869a6e0f1caf23af18fb99c1e8f39e4928f5 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Tue, 4 May 2021 11:05:01 -0500 Subject: [PATCH] Fixed icache pcmux control for handling miss spill miss. --- wally-pipelined/src/ifu/icache.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/wally-pipelined/src/ifu/icache.sv b/wally-pipelined/src/ifu/icache.sv index a6f841242..961fea8b7 100644 --- a/wally-pipelined/src/ifu/icache.sv +++ b/wally-pipelined/src/ifu/icache.sv @@ -284,7 +284,7 @@ module icachecontroller #(parameter LINESIZE = 256) ( NextState = STATE_MISS_FETCH_WDV; end else if (~hit & spill) begin CntReset = 1'b1; - PCMux = 2'b10; + PCMux = 2'b01; NextState = STATE_MISS_SPILL_FETCH_WDV; end else begin NextState = STATE_READY;