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Merge branch 'main' of github.com:openhwgroup/cvw

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This commit is contained in:
Jacob Pease 2023-08-28 11:13:01 -05:00
commit 875cd20fff
23 changed files with 589 additions and 354 deletions
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2
config/shared/parameter-defs.vh
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@ -3,7 +3,7 @@
`include "BranchPredictorType.vh"
parameter cvw_t P = '{
localparam cvw_t P = '{
FPGA : FPGA,
XLEN : XLEN,
IEEE754 : IEEE754,

2
src/mmu/hptw.sv
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@ -155,7 +155,7 @@ module hptw import cvw::*; #(parameter cvw_t P) (
assign AccessedPTE = {PTE[P.XLEN-1:8], (SetDirty | PTE[7]), 1'b1, PTE[5:0]}; // set accessed bit, conditionally set dirty bit
mux2 #(P.XLEN) NextPTEMux(ReadDataM, AccessedPTE, UpdatePTE, NextPTE);
flopenr #(P.PA_BITS) HPTWAdrWriteReg(clk, reset, SaveHPTWAdr, HPTWReadAdr, HPTWWriteAdr);
assign SaveHPTWAdr = WalkerState == L0_ADR;
assign SelHPTWWriteAdr = UpdatePTE | HPTWRW[0];
mux2 #(P.PA_BITS) HPTWWriteAdrMux(HPTWReadAdr, HPTWWriteAdr, SelHPTWWriteAdr, HPTWAdr);

12
src/mmu/tlb/tlb.sv
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@ -81,12 +81,11 @@ module tlb import cvw::*; #(parameter cvw_t P,
logic [P.VPN_BITS-1:0] VPN;
logic [P.PPN_BITS-1:0] PPN;
// Sections of the page table entry
logic [10:0] PTEAccessBits;
logic [11:0] PTEAccessBits;
logic [1:0] HitPageType;
logic CAMHit;
logic SV39Mode;
logic Misaligned;
logic BadPTEWrite; // trying to write malformed PTE
logic MegapageMisaligned;
logic PTE_N; // NAPOT page table entry
@ -105,16 +104,9 @@ module tlb import cvw::*; #(parameter cvw_t P,
assign VPN = VAdr[P.VPN_BITS+11:12];
// check if reserved, N, or PBMT bits are malformed when PTE is written in RV64
assign BadPTEWrite = (P.XLEN == 64) & TLBWrite & (
PTE[P.XLEN-1] & ~P.SVNAPOT_SUPPORTED | // N must be 0 if SVNAPOT is not supported
PTE[P.XLEN-2:P.XLEN-3] != 0 & ~P.SVPBMT_SUPPORTED | // PBMT must be 0 if SVBPMT is not supported
PTE[P.XLEN-2:P.XLEN-3] == 3 | // PBMT of 3 is reserved and never legal
PTE[P.XLEN-4:P.XLEN-10] != 0 ); // Reserved bits must be 0
tlbcontrol #(P, ITLB) tlbcontrol(.SATP_MODE, .VAdr, .STATUS_MXR, .STATUS_SUM, .STATUS_MPRV, .STATUS_MPP, .ENVCFG_PBMTE,
.PrivilegeModeW, .ReadAccess, .WriteAccess, .DisableTranslation, .TLBFlush,
.PTEAccessBits, .CAMHit, .Misaligned, .BadPTEWrite,
.PTEAccessBits, .CAMHit, .Misaligned,
.TLBMiss, .TLBHit, .TLBPageFault,
.UpdateDA, .SV39Mode, .Translate, .PTE_N, .PBMemoryType);

64
src/mmu/tlb/tlbcontrol.sv
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@ -36,10 +36,9 @@ module tlbcontrol import cvw::*; #(parameter cvw_t P, ITLB = 0) (
input logic ReadAccess, WriteAccess,
input logic DisableTranslation,
input logic TLBFlush, // Invalidate all TLB entries
input logic [10:0] PTEAccessBits,
input logic [11:0] PTEAccessBits,
input logic CAMHit,
input logic Misaligned,
input logic BadPTEWrite, // trying to write malformed PTE
output logic TLBMiss,
output logic TLBHit,
output logic TLBPageFault,
@ -53,13 +52,14 @@ module tlbcontrol import cvw::*; #(parameter cvw_t P, ITLB = 0) (
// Sections of the page table entry
logic [1:0] EffectivePrivilegeMode;
logic PTE_D, PTE_A, PTE_U, PTE_X, PTE_W, PTE_R, PTE_V; // Useful PTE Control Bits
logic [1:0] PTE_PBMT;
logic PTE_RESERVED, PTE_D, PTE_A, PTE_U, PTE_X, PTE_W, PTE_R, PTE_V; // Useful PTE Control Bits
logic UpperBitsUnequal;
logic TLBAccess;
logic ImproperPrivilege;
logic BadPBMT;
logic CausePageFault;
logic BadPBMT, BadNAPOT, BadReserved;
logic InvalidAccess;
logic PreUpdateDA, PrePageFault;
// Grab the sv mode from SATP and determine whether translation should occur
assign EffectivePrivilegeMode = (ITLB == 1) ? PrivilegeModeW : (STATUS_MPRV ? STATUS_MPP : PrivilegeModeW); // DTLB uses MPP mode when MPRV is 1
@ -72,24 +72,63 @@ module tlbcontrol import cvw::*; #(parameter cvw_t P, ITLB = 0) (
vm64check #(P) vm64check(.SATP_MODE, .VAdr, .SV39Mode, .UpperBitsUnequal);
// unswizzle useful PTE bits
assign PTE_N = PTEAccessBits[10];
assign PTE_PBMT = PTEAccessBits[9:8];
assign PTE_N = PTEAccessBits[11];
assign PTE_PBMT = PTEAccessBits[10:9];
assign PTE_RESERVED = PTEAccessBits[8];
assign {PTE_D, PTE_A} = PTEAccessBits[7:6];
assign {PTE_U, PTE_X, PTE_W, PTE_R, PTE_V} = PTEAccessBits[4:0];
// Page fault if PBMT is nonzero when SVPBMT is not supported and enabled
assign BadPBMT = PTE_PBMT != 0 & ~(P.SVPBMT_SUPPORTED & ENVCFG_PBMTE);
// Send PMA a 2-bit MemoryType that is PBMT during leaf page table accesses and 0 otherwise
assign PBMemoryType = PTE_PBMT & {2{Translate & TLBHit & P.SVPBMT_SUPPORTED}};
// check if reserved, N, or PBMT bits are malformed w in RV64
assign BadPBMT = PTE_PBMT != 0 & (~(P.SVPBMT_SUPPORTED & ENVCFG_PBMTE) |
{PTE_X, PTE_W, PTE_R} == 3'b000) | PTE_PBMT == 3; // PBMT must be zero if not supported or for non-leaf PTEs;
assign BadNAPOT = PTE_N & ~P.SVNAPOT_SUPPORTED; // N must be be 0 if CVNAPOT is not supported
assign BadReserved = PTE_RESERVED; // Reserved bits must be zero
// Check whether the access is allowed, page faulting if not.
if (ITLB == 1) begin:itlb // Instruction TLB fault checking
// User mode may only execute user mode pages, and supervisor mode may
// only execute non-user mode pages.
assign ImproperPrivilege = ((EffectivePrivilegeMode == P.U_MODE) & ~PTE_U) |
((EffectivePrivilegeMode == P.S_MODE) & PTE_U);
assign CausePageFault = ImproperPrivilege | ~PTE_X | UpperBitsUnequal | BadPTEWrite | BadPBMT | Misaligned | ~PTE_V | (~PTE_A & P.SVADU_SUPPORTED);
assign PreUpdateDA = ~PTE_A;
assign InvalidAccess = ~PTE_X;
end else begin:dtlb // Data TLB fault checking
logic InvalidRead, InvalidWrite;
// User mode may only load/store from user mode pages, and supervisor mode
// may only access user mode pages when STATUS_SUM is low.
assign ImproperPrivilege = ((EffectivePrivilegeMode == P.U_MODE) & ~PTE_U) |
((EffectivePrivilegeMode == P.S_MODE) & PTE_U & ~STATUS_SUM);
// Check for read error. Reads are invalid when the page is not readable
// (and executable pages are not readable) or when the page is neither
// readable nor executable (and executable pages are readable).
assign InvalidRead = ReadAccess & ~PTE_R & (~STATUS_MXR | ~PTE_X);
// Check for write error. Writes are invalid when the page's write bit is
// low.
assign InvalidWrite = WriteAccess & ~PTE_W;
assign InvalidAccess = InvalidRead | InvalidWrite;
assign PreUpdateDA = ~PTE_A | WriteAccess & ~PTE_D;
end
// Determine wheter to update DA bits. With SVADU, it is done in hardware
if (P.SVADU_SUPPORTED) assign UpdateDA = PreUpdateDA & Translate & TLBHit & ~TLBPageFault;
else assign UpdateDA = PreUpdateDA;
// Determine whether page fault occurs
assign PrePageFault = UpperBitsUnequal | Misaligned | ~PTE_V | ImproperPrivilege | (P.XLEN == 64 & (BadPBMT | BadNAPOT | BadReserved)) | (PreUpdateDA & ~P.SVADU_SUPPORTED);
assign TLBPageFault = Translate & TLBHit & (PrePageFault | InvalidAccess);
/*
// Check whether the access is allowed, page faulting if not.
if (ITLB == 1) begin:itlb // Instruction TLB fault checking
// User mode may only execute user mode pages, and supervisor mode may
// only execute non-user mode pages.
assign ImproperPrivilege = ((EffectivePrivilegeMode == P.U_MODE) & ~PTE_U) |
((EffectivePrivilegeMode == P.S_MODE) & PTE_U);
assign CausePageFault = ImproperPrivilege | ~PTE_X | UpperBitsUnequal | BadPTE | BadPBMT | Misaligned | ~PTE_V | (~PTE_A & P.SVADU_SUPPORTED);
assign TLBPageFault = Translate & TLBHit & CausePageFault;
// Determine wheter to update DA bits
if(P.SVADU_SUPPORTED) assign UpdateDA = Translate & TLBHit & ~PTE_A & ~TLBPageFault;
@ -110,13 +149,14 @@ module tlbcontrol import cvw::*; #(parameter cvw_t P, ITLB = 0) (
assign InvalidWrite = WriteAccess & ~PTE_W;
if(P.SVADU_SUPPORTED) begin : hptwwrites
assign UpdateDA = Translate & TLBHit & (~PTE_A | WriteAccess & ~PTE_D) & ~TLBPageFault;
assign TLBPageFault = (Translate & TLBHit & (ImproperPrivilege | InvalidRead | InvalidWrite | UpperBitsUnequal | Misaligned | ~PTE_V));
assign TLBPageFault = (Translate & TLBHit & (ImproperPrivilege | InvalidRead | InvalidWrite | UpperBitsUnequal | Misaligned | ~PTE_V)); // *** update to match
end else begin
// Fault for software handling if access bit is off or writing a page with dirty bit off
assign UpdateDA = ~PTE_A | WriteAccess & ~PTE_D;
assign TLBPageFault = (Translate & TLBHit & (ImproperPrivilege | InvalidRead | InvalidWrite | UpdateDA | UpperBitsUnequal | Misaligned | ~PTE_V));
end
end
*/
assign TLBHit = CAMHit & TLBAccess;
assign TLBMiss = ~CAMHit & TLBAccess & Translate ;

4
src/mmu/tlb/tlbram.sv
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@ -35,7 +35,7 @@ module tlbram import cvw::*; #(parameter cvw_t P,
input logic [P.XLEN-1:0] PTE,
input logic [TLB_ENTRIES-1:0] Matches, WriteEnables,
output logic [P.PPN_BITS-1:0] PPN,
output logic [10:0] PTEAccessBits,
output logic [11:0] PTEAccessBits,
output logic [TLB_ENTRIES-1:0] PTE_Gs,
output logic [TLB_ENTRIES-1:0] PTE_NAPOTs // entry is in NAPOT mode (N bit set and PPN[3:0] = 1000)
);
@ -50,6 +50,6 @@ module tlbram import cvw::*; #(parameter cvw_t P,
or_rows #(TLB_ENTRIES, P.XLEN) PTEOr(RamRead, PageTableEntry);
// Rename the bits read from the TLB RAM
assign PTEAccessBits = {PageTableEntry[P.XLEN-1:P.XLEN-3] & {3{P.XLEN == 64}}, PageTableEntry[7:0]}; // include N and PBMT bits
assign PTEAccessBits = {PageTableEntry[P.XLEN-1:P.XLEN-4] & {4{P.XLEN == 64}}, PageTableEntry[7:0]}; // for RV64 include N and PBMT bits and OR of reserved bitss
assign PPN = PageTableEntry[P.PPN_BITS+9:10];
endmodule

12
src/mmu/tlb/tlbramline.sv
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@ -39,11 +39,13 @@ module tlbramline import cvw::*; #(parameter cvw_t P)
if (P.XLEN == 64) begin // save 7 reserved bits
// could optimize out N and PBMT from d[63:61] if they aren't supported
logic [56:0] ptereg;
flopenr #(57) pteflop(clk, reset, we, {d[63:61], d[53:0]}, ptereg);
assign line = {ptereg[56:54], 7'b0, ptereg[53:0]};
end else // rv32
flopenr #(P.XLEN) pteflop(clk, reset, we, d, line);
logic [57:0] ptereg;
logic reserved;
assign reserved = |d[60:54]; // are any of the reserved bits nonzero?
flopenr #(58) pteflop(clk, reset, we, {d[63:61], reserved, d[53:0]}, ptereg);
assign line = {ptereg[57:54], 6'b0, ptereg[53:0]};
end else // rv32
flopenr #(P.XLEN) pteflop(clk, reset, we, d, line);
assign q = re ? line : 0;
assign PTE_G = line[5]; // send global bit to CAM as part of ASID matching

56
src/wrappers/wallypipelinedcorewrapper.sv Normal file
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@ -0,0 +1,56 @@
///////////////////////////////////////////
// wallypipelinedcorewrapper.sv
//
// Written: Kevin Kim kekim@hmc.edu 21 August 2023
// Modified:
//
// Purpose: A wrapper to set parameters. Vivado cannot set the top level parameters because it only supports verilog,
// not system verilog.
//
// A component of the Wally configurable RISC-V project.
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
//
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
// may obtain a copy of the License at
//
// https://solderpad.org/licenses/SHL-2.1/
//
// Unless required by applicable law or agreed to in writing, any work distributed under the
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
// either express or implied. See the License for the specific language governing permissions
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
//`include "BranchPredictorType.vh"
`include "config.vh"
import cvw::*;
`include "parameter-defs.vh"
module wallypipelinedcorewrapper (
input logic clk, reset,
// Privileged
input logic MTimerInt, MExtInt, SExtInt, MSwInt,
input logic [63:0] MTIME_CLINT,
// Bus Interface
input logic [P.XLEN-1:0] HRDATA,
input logic HREADY, HRESP,
output logic HCLK, HRESETn,
output logic [P.PA_BITS-1:0] HADDR,
output logic [32-1:0] HWDATA,
output logic [32/8-1:0] HWSTRB,
output logic HWRITE,
output logic [2:0] HSIZE,
output logic [2:0] HBURST,
output logic [3:0] HPROT,
output logic [1:0] HTRANS,
output logic HMASTLOCK
);
wallypipelinedcore #(P) core(.*);
endmodule

5
synthDC/scripts/synth.tcl
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@ -24,10 +24,9 @@ set saifpower $::env(SAIFPOWER)
set maxopt $::env(MAXOPT)
set drive $::env(DRIVE)
eval file copy -force [glob ${cfg}/*.vh] {$outputDir/hdl/}
eval file copy -force [glob ${cfg}/*.vh] {$outputDir/hdl/}
eval file copy -force [glob ${hdl_src}/cvw.sv] {$outputDir/hdl/}
eval file copy -force [glob ${hdl_src}/../fpga/src/wallypipelinedsocwrapper.sv] {$outputDir/hdl/}
#eval file copy -force [glob ${hdl_src}/../fpga/src/wallypipelinedsocwrapper.sv] {$outputDir/hdl/}
eval file copy -force [glob ${hdl_src}/*/*.sv] {$outputDir/hdl/}
eval file copy -force [glob ${hdl_src}/*/*/*.sv] {$outputDir/hdl/}
@ -76,7 +75,7 @@ if { [shell_is_in_topographical_mode] } {
#set alib_library_analysis_path ./$outputDir
define_design_lib WORK -path ./$outputDir/WORK
analyze -f sverilog -lib WORK $my_verilog_files
elaborate $my_toplevel -parameter P -lib WORK
elaborate $my_toplevel -lib WORK
# Set the current_design
current_design $my_toplevel

74
synthDC/scripts/wrapperGen.py Normal file
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@ -0,0 +1,74 @@
"""
wrapperGen.py
kekim@hmc.edu
script that generates top-level wrappers for verilog modules to synthesize
"""
import argparse
import os
#create argument parser
parser = argparse.ArgumentParser()
parser.add_argument("fin")
args=parser.parse_args()
fin = open(args.fin, "r")
lines = fin.readlines()
# keeps track of what line number the module header begins
lineModuleStart = 0
# keeps track of what line number the module header ends
lineModuleEnd = 0
# keeps track of module name
moduleName = ""
# string that will keep track of the running module header
buf = "import cvw::*;\n`include \"config.vh\"\n`include \"parameter-defs.vh\"\n"
# are we writing into the buffer
writeBuf=False
index=0
# string copy logic
for l in lines:
if l.find("module") == 0:
lineModuleStart = index
moduleName = l.split()[1]
writeBuf = True
buf += f"module {moduleName}wrapper (\n"
continue
if (writeBuf):
buf += l
if l.find (");") == 0:
lineModuleEnd = index
break
index+=1
# post-processing buffer: add DUT and endmodule lines
buf += f"\t{moduleName} #(P) dut(.*);\nendmodule"
# path to wrapper
wrapperPath = f"{os.getenv('WALLY')}/src/wrappers/{moduleName}wrapper.sv"
# clear wrappers directory
os.system(f"rm {os.getenv('WALLY')}/src/wrappers/*")
fout = open(wrapperPath, "w")
fout.write(buf)
fin.close()
fout.close()
print(buf)

2
testbench/tests.vh
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@ -1944,7 +1944,7 @@ string arch64zbs[] = '{
"rv64i_m/privilege/src/WALLY-misa-01.S",
// "rv64i_m/privilege/src/WALLY-mmu-sv39-01.S", // run this if SVADU_SUPPORTED = 0
// "rv64i_m/privilege/src/WALLY-mmu-sv48-01.S", // run this if SVADU_SUPPORTED = 0
"rv64i_m/privilege/src/WALLY-mmu-sv39-svadu-01.S", // run this if SVADU_SUPPORTED = 1
"rv64i_m/privilege/src/WALLY-mmu-sv39-svadu-svnapot-svpbmt-01.S", // run this if SVADU_SUPPORTED = 1
"rv64i_m/privilege/src/WALLY-mmu-sv48-svadu-01.S", // run this if SVADU_SUPPORTED = 1
"rv64i_m/privilege/src/WALLY-mtvec-01.S",
"rv64i_m/privilege/src/WALLY-pma-01.S",

6
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-mmu-sv32-01.reference_output
View File

@ -41,11 +41,11 @@ beef0110
00000bad
0000000f
beef0bb0
beef0077 # Test 12.3.1.4.1: successful read back of saved value with new memory mapping
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
beef0077 # Test 11.3.1.4.1: successful read back of saved value with new memory mapping
00000009 # Test 11.3.1.5.1: ecall from going to m mode from s mode
00000000 # previous value of mprv before being set
beef0099 # Read success from translated address when mprv=1, mpp=S and priv mode = m
0000000b # Test 12.3.1.5.2: ecall from going to S mode from m mode
0000000b # Test 11.3.1.5.2: ecall from going to S mode from m mode
00000009 # ecall from going straight back to m mode to access mstatus
00000000 # previous zeroed out value of mprv
0000000b # ecall from terminating tests in m mode

10
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-mmu-sv32-svadu-01.reference_output
View File

@ -35,13 +35,13 @@ beef0110
0000000f
0000000c
00000bad
beef0770 # Test 8.3.1.3.5: check successful read/write when A=0 and SVADU=1
beef0aa0 # Test 8.3.1.3.6: check successful read/write when D=0 and SVADU=1
beef0077 # Test 12.3.1.4.1: successful read back of saved value with new memory mapping
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
beef0770 # Test 11.3.1.3.5: check successful read/write when A=0 and SVADU=1
beef0aa0 # Test 11.3.1.3.6: check successful read/write when D=0 and SVADU=1
beef0077 # Test 11.3.1.4.1: successful read back of saved value with new memory mapping
00000009 # Test 11.3.1.5.1: ecall from going to m mode from s mode
00000000 # previous value of mprv before being set
beef0099 # Read success from translated address when mprv=1, mpp=S and priv mode = m
0000000b # Test 12.3.1.5.2: ecall from going to S mode from m mode
0000000b # Test 11.3.1.5.2: ecall from going to S mode from m mode
00000009 # ecall from going straight back to m mode to access mstatus
00000000 # previous zeroed out value of mprv
0000000b # ecall from terminating tests in m mode

78
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-mmu-sv32-01.S
View File

@ -1,6 +1,6 @@
///////////////////////////////////////////
//
// WALLY-MMU
// WALLY-MMU-SV32
//
// Author: David_Harris@hmc.edu and Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
@ -52,9 +52,9 @@ test_cases:
#
# ---------------------------------------------------------------------------------------------
# =========== test 8.3.1.1 Page Table Translation ===========
# =========== test 11.3.1.1 Page Table Translation ===========
# test 8.3.1.1.1 write page tables / entries to phyiscal memory
# test 11.3.1.1.1 write page tables / entries to phyiscal memory
# sv32 Page table (See Figure 12.12***):
# Level 1 page table, situated at 0x8000D000
.4byte 0x8000D000, 0x20004C01, write32_test # points to level 0 page table A
@ -78,19 +78,19 @@ test_cases:
.4byte 0x8000F000, 0x200000CF, write32_test # Vaddr 0x0 Paddr 0x80000000: aligned megapage
.4byte 0x8000F800, 0x200000CF, write32_test # Vaddr 0x80000000 Paddr 0x80000000: aligned megapage (program and data memory)
# test 8.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 8.3.1.1.3 and some other tests, specified in the comments.
# test 11.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 11.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it should fault before getting there.
.4byte 0x800AAAA8, 0xBEEF0055, write32_test # 8.3.1.1.4 megapage
.4byte 0x800FFAC0, 0xBEEF0033, write32_test # 8.3.1.3.2
.4byte 0x800E3130, 0xBEEF0077, write32_test # 8.3.1.3.2
.4byte 0x808017E0, 0xBEEF0099, write32_test # 8.3.1.1.4 kilopage
.4byte 0x80805EA0, 0xBEEF0440, write32_test # 8.3.1.3.3
.4byte 0x80803AA0, 0xBEEF0BB0, write32_test # 8.3.1.3.7
.4byte 0x800AAAA8, 0xBEEF0055, write32_test # 11.3.1.1.4 megapage
.4byte 0x800FFAC0, 0xBEEF0033, write32_test # 11.3.1.3.2
.4byte 0x800E3130, 0xBEEF0077, write32_test # 11.3.1.3.2
.4byte 0x808017E0, 0xBEEF0099, write32_test # 11.3.1.1.4 kilopage
.4byte 0x80805EA0, 0xBEEF0440, write32_test # 11.3.1.3.3
.4byte 0x80803AA0, 0xBEEF0BB0, write32_test # 11.3.1.3.7
.4byte 0x8000FFA0, 0x11100393, write32_test # write executable code for "li x7, 0x111; ret" to executable region.
.4byte 0x8000FFA4, 0x00008067, write32_test # Used for 8.3.1.3.1, 8.3.1.3.2
.4byte 0x8000FFA4, 0x00008067, write32_test # Used for 11.3.1.3.1, 11.3.1.3.2
# test 8.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
# test 11.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
.4byte 0x0, 0x0, goto_baremetal # satp.MODE = baremetal / no translation.
.4byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.4byte 0x800AAAA8, 0xBEEF0055, read32_test
@ -102,38 +102,38 @@ test_cases:
.4byte 0x8000FFA0, 0x11100393, read32_test
.4byte 0x8000FFA4, 0x00008067, read32_test
# test 8.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
# test 11.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
.4byte 0x8000D, 0x0, goto_sv32 # satp.MODE = sv32, Nothing written to output
.4byte 0x4AAAA8, 0xBEEF0055, read32_test # megapage at Vaddr 0x400000, Paddr 0x80000000
.4byte 0xBFF7E0, 0xBEEF0099, read32_test # kilopage at Vaddr 0xBFF000, Paddr 0x80201000
# =========== test 8.3.1.2 page fault tests ===========
# =========== test 11.3.1.2 page fault tests ===========
# test 8.3.1.2.1 load page fault if upper bits of Vaddr are not the same
# test 11.3.1.2.1 load page fault if upper bits of Vaddr are not the same
# Not tested in rv32/sv32
# test 8.3.1.2.2 load page fault when reading an address where the valid flag is zero
# test 11.3.1.2.2 load page fault when reading an address where the valid flag is zero
.4byte 0x6000, 0x0, read32_test
# test 8.3.1.2.3 store page fault if PTE has W and ~R flags set
# test 11.3.1.2.3 store page fault if PTE has W and ~R flags set
.4byte 0x2000, 0x0, write32_test
# test 8.3.1.2.4 Fault if last level PTE is a pointer
# test 11.3.1.2.4 Fault if last level PTE is a pointer
.4byte 0x0200, 0x0, read32_test
# test 8.3.1.2.5 load page fault on misaligned pages
# test 11.3.1.2.5 load page fault on misaligned pages
.4byte 0xC00000, 0x0, read32_test # misaligned megapage
# =========== test 8.3.1.3 PTE Protection flags ===========
# =========== test 11.3.1.3 PTE Protection flags ===========
# test 8.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 8.3.1.1.4
# test 11.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 11.3.1.1.4
.4byte 0x40FFA0, 0x111, executable_test # fetch success when U=0, priv=S
.4byte 0x80400000, 0x1, goto_u_mode # go to U mode, return to VPN 0x80400000 where PTE.U = 1. 0x9 written to output
.4byte 0xBFFC80, 0xBEEF0550, read32_test # load page fault when U=0, priv=U
.4byte 0x40FFA0, 0xbad, executable_test # instr page fault when U=0, priv=U
# test 8.3.1.3.2 User flag == 1
# test 11.3.1.3.2 User flag == 1
.4byte 0x804FFAC0, 0xBEEF0033, read32_test # read success when U=1, priv=U
.4byte 0x80000000, 0x1, goto_s_mode # go back to S mode, return to VPN 0x80000000 where PTE.U = 0. 0x8 written to output
.4byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11
@ -142,61 +142,61 @@ test_cases:
.4byte 0x0, 0x2, write_mxr_sum # set sstatus.[MXR, SUM] = 10.
.4byte 0x804FFAC0, 0xBEEF0033, read32_test # load page fault when U-1, priv=S, sstatus.SUM=0
# test 8.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 8.3.1.1.4
# test 11.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 11.3.1.1.4
.4byte 0x0, 0x1, write_mxr_sum # set sstatus.[MXR, SUM] = 01.
.4byte 0x5EA0, 0xBEEF0440, read32_test # load page fault when R=0, sstatus.MXR=0
.4byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11.
.4byte 0x5EA0, 0xBEEF0440, read32_test # read success when R=0, MXR=1, X=1
# test 8.3.1.3.4 Write flag
# test 11.3.1.3.4 Write flag
.4byte 0xBFF290, 0xBEEF0110, write32_test # write success when W=1
.4byte 0xBFF290, 0xBEEF0110, read32_test # check write success by reading
.4byte 0x5B78, 0xBEEF0CC0, write32_test # store page fault when W=0
# test 8.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 8.3.1.3.1
# test 11.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 11.3.1.3.1
.4byte 0xBFFDE0, 0xbad, executable_test # instr page fault when X=0
# In the following two tests, SVADU is not supported, so the software handles the A/D bits
# Since SVADU is 0, Accesses to A/D=0 causes a fault for the trap handler to fix those bits
# test 8.3.1.3.6 Accessed flag == 0
# test 11.3.1.3.6 Accessed flag == 0
.4byte 0x3020, 0xBEEF0770, write32_test # store page fault when A=0
.4byte 0x3808, 0xBEEF0990, read32_test # load page fault when A=0
# test 8.3.1.3.7 Dirty flag == 0
# test 11.3.1.3.7 Dirty flag == 0
.4byte 0x4658, 0xBEEF0AA0, write32_test # store page fault when D=0
.4byte 0x4AA0, 0xBEEF0BB0, read32_test # read success when D=0
# =========== test 8.3.1.4 SATP Register ===========
# =========== test 11.3.1.4 SATP Register ===========
# test 8.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
# test 11.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .4byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write32_test # write identical value to global PTE to make sure it's still in the TLB
.4byte 0x8000F, 0x11, goto_sv32 # go to SV39 on a second, very minimal page table
.4byte 0xE3130, 0xBEEF0077, read32_test # Read success of old written value from a new page table mapping
# test 8.3.1.4.2 Test Global mapping
# test 11.3.1.4.2 Test Global mapping
// ***.4byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read32_test # read success of global PTE undefined in current mapping.
# =========== test 8.3.1.5 STATUS Registers ===========
# =========== test 11.3.1.5 STATUS Registers ===========
# test 8.3.1.5.1 mstatus.mprv translation
# test 11.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.4byte 0x8000D, 0x0, goto_sv32 // go back to old, extensive page table
.4byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.4byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.4byte 0xBFF7E0, 0xBEEF0099, read32_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 8.3.1.5.2 mstatus.mprv clearing
# test 11.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.4byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.4byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.4byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 8.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 8.3.1.3.3
# test 11.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 11.3.1.3.3
# terminate tests
.4byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

76
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-mmu-sv32-svadu-01.S
View File

@ -1,6 +1,6 @@
///////////////////////////////////////////
//
// WALLY-MMU
// WALLY-MMU-SV32
//
// Author: David_Harris@hmc.edu and Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
@ -52,9 +52,9 @@ test_cases:
#
# ---------------------------------------------------------------------------------------------
# =========== test 8.3.1.1 Page Table Translation ===========
# =========== test 11.3.1.1 Page Table Translation ===========
# test 8.3.1.1.1 write page tables / entries to phyiscal memory
# test 11.3.1.1.1 write page tables / entries to phyiscal memory
# sv32 Page table (See Figure 12.12***):
# Level 1 page table, situated at 0x8000D000
.4byte 0x8000D000, 0x20004C01, write32_test # points to level 0 page table A
@ -78,18 +78,18 @@ test_cases:
.4byte 0x8000F000, 0x200000CF, write32_test # Vaddr 0x0 Paddr 0x80000000: aligned megapage
.4byte 0x8000F800, 0x200000CF, write32_test # Vaddr 0x80000000 Paddr 0x80000000: aligned megapage (program and data memory)
# test 8.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 8.3.1.1.3 and some other tests, specified in the comments.
# test 11.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 11.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it should fault before getting there.
.4byte 0x800AAAA8, 0xBEEF0055, write32_test # 8.3.1.1.4 megapage
.4byte 0x800FFAC0, 0xBEEF0033, write32_test # 8.3.1.3.2
.4byte 0x800E3130, 0xBEEF0077, write32_test # 8.3.1.3.2
.4byte 0x808017E0, 0xBEEF0099, write32_test # 8.3.1.1.4 kilopage
.4byte 0x80805EA0, 0xBEEF0440, write32_test # 8.3.1.3.3
.4byte 0x800AAAA8, 0xBEEF0055, write32_test # 11.3.1.1.4 megapage
.4byte 0x800FFAC0, 0xBEEF0033, write32_test # 11.3.1.3.2
.4byte 0x800E3130, 0xBEEF0077, write32_test # 11.3.1.3.2
.4byte 0x808017E0, 0xBEEF0099, write32_test # 11.3.1.1.4 kilopage
.4byte 0x80805EA0, 0xBEEF0440, write32_test # 11.3.1.3.3
.4byte 0x8000FFA0, 0x11100393, write32_test # write executable code for "li x7, 0x111; ret" to executable region.
.4byte 0x8000FFA4, 0x00008067, write32_test # Used for 8.3.1.3.1, 8.3.1.3.2
.4byte 0x8000FFA4, 0x00008067, write32_test # Used for 11.3.1.3.1, 11.3.1.3.2
# test 8.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
# test 11.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
.4byte 0x0, 0x0, goto_baremetal # satp.MODE = baremetal / no translation.
.4byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.4byte 0x800AAAA8, 0xBEEF0055, read32_test
@ -100,38 +100,38 @@ test_cases:
.4byte 0x8000FFA0, 0x11100393, read32_test
.4byte 0x8000FFA4, 0x00008067, read32_test
# test 8.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
# test 11.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
.4byte 0x8000D, 0x0, goto_sv32 # satp.MODE = sv32, Nothing written to output
.4byte 0x4AAAA8, 0xBEEF0055, read32_test # megapage at Vaddr 0x400000, Paddr 0x80000000
.4byte 0xBFF7E0, 0xBEEF0099, read32_test # kilopage at Vaddr 0xBFF000, Paddr 0x80201000
# =========== test 8.3.1.2 page fault tests ===========
# =========== test 11.3.1.2 page fault tests ===========
# test 8.3.1.2.1 load page fault if upper bits of Vaddr are not the same
# test 11.3.1.2.1 load page fault if upper bits of Vaddr are not the same
# Not tested in rv32/sv32
# test 8.3.1.2.2 load page fault when reading an address where the valid flag is zero
# test 11.3.1.2.2 load page fault when reading an address where the valid flag is zero
.4byte 0x6000, 0x0, read32_test
# test 8.3.1.2.3 store page fault if PTE has W and ~R flags set
# test 11.3.1.2.3 store page fault if PTE has W and ~R flags set
.4byte 0x2000, 0x0, write32_test
# test 8.3.1.2.4 Fault if last level PTE is a pointer
# test 11.3.1.2.4 Fault if last level PTE is a pointer
.4byte 0x0200, 0x0, read32_test
# test 8.3.1.2.5 load page fault on misaligned pages
# test 11.3.1.2.5 load page fault on misaligned pages
.4byte 0xC00000, 0x0, read32_test # misaligned megapage
# =========== test 8.3.1.3 PTE Protection flags ===========
# =========== test 11.3.1.3 PTE Protection flags ===========
# test 8.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 8.3.1.1.4
# test 11.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 11.3.1.1.4
.4byte 0x40FFA0, 0x111, executable_test # fetch success when U=0, priv=S
.4byte 0x80400000, 0x1, goto_u_mode # go to U mode, return to VPN 0x80400000 where PTE.U = 1. 0x9 written to output
.4byte 0xBFFC80, 0xBEEF0550, read32_test # load page fault when U=0, priv=U
.4byte 0x40FFA0, 0xbad, executable_test # instr page fault when U=0, priv=U
# test 8.3.1.3.2 User flag == 1
# test 11.3.1.3.2 User flag == 1
.4byte 0x804FFAC0, 0xBEEF0033, read32_test # read success when U=1, priv=U
.4byte 0x80000000, 0x1, goto_s_mode # go back to S mode, return to VPN 0x80000000 where PTE.U = 0. 0x8 written to output
.4byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11
@ -140,61 +140,61 @@ test_cases:
.4byte 0x0, 0x2, write_mxr_sum # set sstatus.[MXR, SUM] = 10.
.4byte 0x804FFAC0, 0xBEEF0033, read32_test # load page fault when U-1, priv=S, sstatus.SUM=0
# test 8.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 8.3.1.1.4
# test 11.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 11.3.1.1.4
.4byte 0x0, 0x1, write_mxr_sum # set sstatus.[MXR, SUM] = 01.
.4byte 0x5EA0, 0xBEEF0440, read32_test # load page fault when R=0, sstatus.MXR=0
.4byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11.
.4byte 0x5EA0, 0xBEEF0440, read32_test # read success when R=0, MXR=1, X=1
# test 8.3.1.3.4 Write flag
# test 11.3.1.3.4 Write flag
.4byte 0xBFF290, 0xBEEF0110, write32_test # write success when W=1
.4byte 0xBFF290, 0xBEEF0110, read32_test # check write success by reading
.4byte 0x5B78, 0xBEEF0CC0, write32_test # store page fault when W=0
# test 8.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 8.3.1.3.1
# test 11.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 11.3.1.3.1
.4byte 0xBFFDE0, 0xbad, executable_test # instr page fault when X=0
# In the following two tests, SVADU is supported, so the hardware handles the A/D bits
# Since SVADU is 1, there are no faults when A/D=0
# test 8.3.1.3.6 Accessed flag == 0
# test 11.3.1.3.6 Accessed flag == 0
.4byte 0x3020, 0xBEEF0770, write32_test # Write success when A=0 and SVADU is enabled
.4byte 0x3020, 0xBEEF0770, read32_test # Read success when A=0 and SVADU is enabled
# test 8.3.1.3.7 Dirty flag == 0
# test 11.3.1.3.7 Dirty flag == 0
.4byte 0x4658, 0xBEEF0AA0, write32_test # write successs when D=0 and SVADU is enabled
.4byte 0x4658, 0xBEEF0AA0, read32_test # read success when D=0
# =========== test 8.3.1.4 SATP Register ===========
# =========== test 11.3.1.4 SATP Register ===========
# test 8.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
# test 11.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .4byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write32_test # write identical value to global PTE to make sure it's still in the TLB
.4byte 0x8000F, 0x11, goto_sv32 # go to SV39 on a second, very minimal page table
.4byte 0xE3130, 0xBEEF0077, read32_test # Read success of old written value from a new page table mapping
# test 8.3.1.4.2 Test Global mapping
# test 11.3.1.4.2 Test Global mapping
// ***.4byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read32_test # read success of global PTE undefined in current mapping.
# =========== test 8.3.1.5 STATUS Registers ===========
# =========== test 11.3.1.5 STATUS Registers ===========
# test 8.3.1.5.1 mstatus.mprv translation
# test 11.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.4byte 0x8000D, 0x0, goto_sv32 // go back to old, extensive page table
.4byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.4byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.4byte 0xBFF7E0, 0xBEEF0099, read32_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 8.3.1.5.2 mstatus.mprv clearing
# test 11.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.4byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.4byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.4byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 8.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 8.3.1.3.3
# test 11.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 11.3.1.3.3
# terminate tests
.4byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

38
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-mmu-sv39-01.reference_output
View File

@ -1,4 +1,4 @@
0000000b # Test 12.3.1.1.3: ecall from going to S mode from M mode
0000000b # Test 11.3.1.1.3: ecall from going to S mode from M mode
00000000
beef0000 # Read test success from confirming writes of known values
0000dead
@ -14,13 +14,13 @@ beef0440 # Read test success from confirming writes of known values
0330dead
beef0bb0 # Read test success from confirming writes of known values
0440dead
beef0000 # Test 12.3.1.1.4: Read test success from checking translation works
beef0000 # Test 11.3.1.1.4: Read test success from checking translation works
0000dead
beef0055 # Read test success from checking translation works
0880dead
beef0099 # Read test success from checking translation works
0220dead
0000000d # Test 12.3.1.2.1: Read test with page fault from upper vaddr bits not the same
0000000d # Test 11.3.1.2.1: Read test with page fault from upper vaddr bits not the same
00000000
00000bad
00000000
@ -28,17 +28,17 @@ beef0099 # Read test success from checking translation works
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.2: read test with page fault
0000000d # Test 11.3.1.2.2: read test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.2.3: write test with page fault
0000000f # Test 11.3.1.2.3: write test with page fault
00000000
0000000d # Test 12.3.1.2.4: read test with page fault
0000000d # Test 11.3.1.2.4: read test with page fault
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.5: 2 read tests with page faults
0000000d # Test 11.3.1.2.5: 2 read tests with page faults
00000000
00000bad
00000000
@ -46,7 +46,7 @@ beef0099 # Read test success from checking translation works
00000000
00000bad
00000000
00000111 # Test 12.3.1.3.1: execute test success
00000111 # Test 11.3.1.3.1: execute test success
00000000
00000009 # ecall from going to U mode from S mode
00000000
@ -58,7 +58,7 @@ beef0099 # Read test success from checking translation works
00000000
00000bad
00000000
beef0033 # Test 12.3.1.3.2: read test success
beef0033 # Test 11.3.1.3.2: read test success
0990dead
00000008 # ecall from going to S mode from U mode
00000000
@ -72,39 +72,43 @@ beef0077 # read test success
00000000
00000bad
00000000
0000000d # Test 12.3.1.3.3: read test with page fault
0000000d # Test 11.3.1.3.3: read test with page fault
00000000
00000bad
00000000
beef0440 # read test success
0330dead
beef0110 # Test 12.3.1.3.4: read test success
beef0110 # Test 11.3.1.3.4: read test success
0440dead
0000000f # write test with page fault
00000000
0000000c # Test 12.3.1.3.5: execute test with page fault
0000000c # Test 11.3.1.3.5: execute test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.3.6: write test with page fault
0000000f # Test 11.3.1.3.6: write test with page fault
00000000
0000000d # read test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.3.7: write test with page fault
0000000f # Test 11.3.1.3.7: write test with page fault
00000000
beef0bb0 # read test success
0440dead
beef0000 # Test 12.3.1.4.1: read test success from new page table mapping
0000000c # Test 11.3.1.3.8: read test with page fault for nonzero reserved bit
00000000
00000bad
00000000
beef0000 # Test 11.3.1.4.1: read test success from new page table mapping
0000dead
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000009 # Test 11.3.1.5.1: ecall from going to m mode from s mode
00000000
00000000 # previous mprv value before writing 1 to it.
00000000
beef0099 # Read test success when mprv=1 So translation should occur
0220dead # even though we're in M mode with translation off
0000000b # Test 12.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
0000000b # Test 11.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
00000000
00000009 # ecall from going to m mode from s mode (so we can access mstatus)
00000000

52
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-mmu-sv39-svadu-01.reference_output → tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-mmu-sv39-svadu-svnapot-svpbmt-01.reference_output
View File

@ -1,4 +1,4 @@
0000000b # Test 12.3.1.1.3: ecall from going to S mode from M mode
0000000b # Test 11.3.1.1.3: ecall from going to S mode from M mode
00000000
beef0000 # Read test success from confirming writes of known values
0000dead
@ -12,13 +12,13 @@ beef0099 # Read test success from confirming writes of known values
0220dead
beef0440 # Read test success from confirming writes of known values
0330dead
beef0000 # Test 12.3.1.1.4: Read test success from checking translation works
beef0000 # Test 11.3.1.1.4: Read test success from checking translation works
0000dead
beef0055 # Read test success from checking translation works
0880dead
beef0099 # Read test success from checking translation works
0220dead
0000000d # Test 12.3.1.2.1: Read test with page fault from upper vaddr bits not the same
0000000d # Test 11.3.1.2.1: Read test with page fault from upper vaddr bits not the same
00000000
00000bad
00000000
@ -26,17 +26,17 @@ beef0099 # Read test success from checking translation works
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.2: read test with page fault
0000000d # Test 11.3.1.2.2: read test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.2.3: write test with page fault
0000000f # Test 11.3.1.2.3: write test with page fault
00000000
0000000d # Test 12.3.1.2.4: read test with page fault
0000000d # Test 11.3.1.2.4: read test with page fault
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.5: 2 read tests with page faults
0000000d # Test 11.3.1.2.5: 2 read tests with page faults
00000000
00000bad
00000000
@ -44,7 +44,7 @@ beef0099 # Read test success from checking translation works
00000000
00000bad
00000000
00000111 # Test 12.3.1.3.1: execute test success
00000111 # Test 11.3.1.3.1: execute test success
00000000
00000009 # ecall from going to U mode from S mode
00000000
@ -56,7 +56,7 @@ beef0099 # Read test success from checking translation works
00000000
00000bad
00000000
beef0033 # Test 12.3.1.3.2: read test success
beef0033 # Test 11.3.1.3.2: read test success
0990dead
00000008 # ecall from going to S mode from U mode
00000000
@ -70,33 +70,51 @@ beef0077 # read test success
00000000
00000bad
00000000
0000000d # Test 12.3.1.3.3: read test with page fault
0000000d # Test 11.3.1.3.3: read test with page fault
00000000
00000bad
00000000
beef0440 # read test success
0330dead
beef0110 # Test 12.3.1.3.4: read test success
beef0110 # Test 11.3.1.3.4: read test success
0440dead
0000000f # write test with page fault
00000000
0000000c # Test 12.3.1.3.5: execute test with page fault
0000000c # Test 11.3.1.3.5: execute test with page fault
00000000
00000bad
00000000
beef0770 # Test 8.3.1.3.5: check successful read/write when A=0 and SVADU=1
beef0770 # Test 11.3.1.3.6: check successful read/write when A=0 and SVADU=1
0990dead
beef0aa0 # Test 8.3.1.3.6: check successful read/write when D=0 and SVADU=1
beef0aa0 # Test 11.3.1.3.7: check successful read/write when D=0 and SVADU=1
0440dead
beef0000 # Test 12.3.1.4.1: read test success from new page table mapping
0000000d # Test 11.3.1.3.8: read test with page fault for nonzero reserved bit
00000000
00000bad
00000000
BEEF0660 # Test 11.3.1.3.9: NAPOT read
0550DEAD
0000000f # Test 11.3.1.3.10: PBMT; write page fault because menvcfg.PBMTE = 0
00000000
00000009 # ecall from going to M mode from S mode
00000000
0000000B # ecall from going to S mode from M mode
00000000
56567878 # write with PBMT = 1
12123434
56567878 # write with PBMT = 2
23123434
0000000f # write page fault because PBMT = 3
00000000
beef0000 # Test 11.3.1.4.1: read test success from new page table mapping
0000dead
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000009 # Test 11.3.1.5.1: ecall from going to m mode from s mode
00000000
00000000 # previous mprv value before writing 1 to it.
00000000
beef0099 # Read test success when mprv=1 So translation should occur
0220dead # even though we're in M mode with translation off
0000000b # Test 12.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
0000000b # Test 11.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
00000000
00000009 # ecall from going to m mode from s mode (so we can access mstatus)
00000000

34
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-mmu-sv48-01.reference_output
View File

@ -1,4 +1,4 @@
0000000b # Test 12.3.1.1.3: ecall from going to S mode from M mode
0000000b # Test 11.3.1.1.3: ecall from going to S mode from M mode
00000000
beef0cc0 # 8 read test successes
0ee0dead
@ -16,7 +16,7 @@ beef0440 # read 7
0330dead
beef0bb0 # read 8
0440dead
beef0cc0 # Test 12.3.1.1.4: 4 read test successes
beef0cc0 # Test 11.3.1.1.4: 4 read test successes
0ee0dead
beef0000 # read 2
0000dead
@ -24,7 +24,7 @@ beef0055 # read 3
0880dead
beef0099 # read 4
0220dead
0000000d # Test 12.3.1.2.1: 2 read tests with page fault
0000000d # Test 11.3.1.2.1: 2 read tests with page fault
00000000
00000bad
00000000
@ -32,17 +32,17 @@ beef0099 # read 4
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.2: read test with page fault
0000000d # Test 11.3.1.2.2: read test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.2.3: write test with page fault
0000000f # Test 11.3.1.2.3: write test with page fault
00000000
0000000d # Test 12.3.1.2.4: read test with page fault
0000000d # Test 11.3.1.2.4: read test with page fault
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.5: 3 read tests with page fault
0000000d # Test 11.3.1.2.5: 3 read tests with page fault
00000000
00000bad
00000000
@ -54,7 +54,7 @@ beef0099 # read 4
00000000
00000bad
00000000
00000111 # Test 12.3.1.3.1: Execute test success
00000111 # Test 11.3.1.3.1: Execute test success
00000000
00000009 # ecall from going to U mode from S mode
00000000
@ -66,7 +66,7 @@ beef0099 # read 4
00000000
00000bad
00000000
beef0033 # Test 12.3.1.3.2: read test success
beef0033 # Test 11.3.1.3.2: read test success
0990dead
00000008 # ecall from going to S mode from U mode
00000000
@ -80,39 +80,39 @@ beef0077 # read test success
00000000
00000bad
00000000
0000000d # Test 12.3.1.3.3: read test with page fault
0000000d # Test 11.3.1.3.3: read test with page fault
00000000
00000bad
00000000
beef0440 # read test success
0330dead
beef0110 # Test 12.3.1.3.4: read test success
beef0110 # Test 11.3.1.3.4: read test success
0440dead
0000000f # write test with page fault
00000000
0000000c # Test 12.3.1.3.5: executable test with page fault
0000000c # Test 11.3.1.3.5: executable test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.3.6: write test with page fault
0000000f # Test 11.3.1.3.6: write test with page fault
00000000
0000000d # read test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.3.7: write test with page fault
0000000f # Test 11.3.1.3.7: write test with page fault
00000000
beef0bb0 # read test success
0440dead
beef0000 # Test 12.3.1.4.1: read test success on new page table mapping
beef0000 # Test 11.3.1.4.1: read test success on new page table mapping
0000dead
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000009 # Test 11.3.1.5.1: ecall from going to m mode from s mode
00000000
00000000 # previous value of mprv before write
00000000
beef0099 # Read test success when mprv=1 So translation should occur
0220dead # even though we're in M mode with translation off
0000000b # Test 12.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
0000000b # Test 11.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
00000000
00000009 # ecall from going to m mode from s mode (so we can access mstatus)
00000000

34
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-mmu-sv48-svadu-01.reference_output
View File

@ -1,4 +1,4 @@
0000000b # Test 12.3.1.1.3: ecall from going to S mode from M mode
0000000b # Test 11.3.1.1.3: ecall from going to S mode from M mode
00000000
beef0cc0 # 8 read test successes
0ee0dead
@ -14,7 +14,7 @@ beef0099 # read 6
0220dead
beef0440 # read 7
0330dead
beef0cc0 # Test 12.3.1.1.4: 4 read test successes
beef0cc0 # Test 11.3.1.1.4: 4 read test successes
0ee0dead
beef0000 # read 2
0000dead
@ -22,7 +22,7 @@ beef0055 # read 3
0880dead
beef0099 # read 4
0220dead
0000000d # Test 12.3.1.2.1: 2 read tests with page fault
0000000d # Test 11.3.1.2.1: 2 read tests with page fault
00000000
00000bad
00000000
@ -30,17 +30,17 @@ beef0099 # read 4
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.2: read test with page fault
0000000d # Test 11.3.1.2.2: read test with page fault
00000000
00000bad
00000000
0000000f # Test 12.3.1.2.3: write test with page fault
0000000f # Test 11.3.1.2.3: write test with page fault
00000000
0000000d # Test 12.3.1.2.4: read test with page fault
0000000d # Test 11.3.1.2.4: read test with page fault
00000000
00000bad
00000000
0000000d # Test 12.3.1.2.5: 3 read tests with page fault
0000000d # Test 11.3.1.2.5: 3 read tests with page fault
00000000
00000bad
00000000
@ -52,7 +52,7 @@ beef0099 # read 4
00000000
00000bad
00000000
00000111 # Test 12.3.1.3.1: Execute test success
00000111 # Test 11.3.1.3.1: Execute test success
00000000
00000009 # ecall from going to U mode from S mode
00000000
@ -64,7 +64,7 @@ beef0099 # read 4
00000000
00000bad
00000000
beef0033 # Test 12.3.1.3.2: read test success
beef0033 # Test 11.3.1.3.2: read test success
0990dead
00000008 # ecall from going to S mode from U mode
00000000
@ -78,33 +78,33 @@ beef0077 # read test success
00000000
00000bad
00000000
0000000d # Test 12.3.1.3.3: read test with page fault
0000000d # Test 11.3.1.3.3: read test with page fault
00000000
00000bad
00000000
beef0440 # read test success
0330dead
beef0110 # Test 12.3.1.3.4: read test success
beef0110 # Test 11.3.1.3.4: read test success
0440dead
0000000f # write test with page fault
00000000
0000000c # Test 12.3.1.3.5: executable test with page fault
0000000c # Test 11.3.1.3.5: executable test with page fault
00000000
00000bad
00000000
beef0770 # Test 8.3.1.3.5: check successful read/write when A=0 and SVADU=1
beef0770 # Test 11.3.1.3.5: check successful read/write when A=0 and SVADU=1
0990dead
beef0aa0 # Test 8.3.1.3.6: check successful read/write when D=0 and SVADU=1
beef0aa0 # Test 11.3.1.3.6: check successful read/write when D=0 and SVADU=1
0440dead
beef0000 # Test 12.3.1.4.1: read test success on new page table mapping
beef0000 # Test 11.3.1.4.1: read test success on new page table mapping
0000dead
00000009 # Test 12.3.1.5.1: ecall from going to m mode from s mode
00000009 # Test 11.3.1.5.1: ecall from going to m mode from s mode
00000000
00000000 # previous value of mprv before write
00000000
beef0099 # Read test success when mprv=1 So translation should occur
0220dead # even though we're in M mode with translation off
0000000b # Test 12.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
0000000b # Test 11.3.1.5.2 ecall from going to s mode from m mode (zeroing mprv)
00000000
00000009 # ecall from going to m mode from s mode (so we can access mstatus)
00000000

6
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.h
View File

@ -1362,6 +1362,12 @@ write_mideleg:
csrw mideleg, t4
j test_loop
write_menvcfg:
// writes the value in t4 to the menvcfg register
// Doesn't log anything
csrw menvcfg, t4
j test_loop
executable_test:
// Execute the code at the address in t3, returning the value in t2.
// Assumes the code modifies t2, to become the value stored in t4 for this test.

86
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv39-01.S
View File

@ -1,6 +1,6 @@
///////////////////////////////////////////
//
// WALLY-MMU
// WALLY-MMU-SV39
//
// Author: David_Harris@hmc.edu and Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
@ -52,9 +52,9 @@ test_cases:
#
# ---------------------------------------------------------------------------------------------
# =========== test 8.3.1.1 Page Table Translation ===========
# =========== test 11.3.1.1 Page Table Translation ===========
# test 8.3.1.1.1 write page tables / entries to phyiscal memory
# test 11.3.1.1.1 write page tables / entries to phyiscal memory
# sv39 page table (See Figure 12.12***):
# Level 2 page table, situated at 0x8000D000
.8byte 0x000000008000D000, 0x0000000020004C01, write64_test# points to level 1 page table A
@ -82,6 +82,7 @@ test_cases:
.8byte 0x0000000080018020, 0x0000000020080C57, write64_test# Vaddr 0x4000 Paddr 0x80203000: D=0, should cause write fault
.8byte 0x0000000080018028, 0x00000000200814C7, write64_test# Vaddr 0x5000 Paddr 0x80205000: X=0, fetches should fault
.8byte 0x0000000080018030, 0x00000000200814C0, write64_test# Vaddr 0x6000: invalid page
.8byte 0x0000000080018038, 0x01000000200800DF, write64_test# Vaddr 0x7000, Paddr = 0x80200000, bad reserved bit
# Level 0 page table B
.8byte 0x0000000080016FF8, 0x00000000200804CF, write64_test# Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000 aligned kilopage
@ -89,20 +90,20 @@ test_cases:
.8byte 0x8FFFF000, 0x200000CF, write64_test# Vaddr 0x0, Paddr 0x80000000 aligned gigapage
.8byte 0x8FFFF010, 0x200000CF, write64_test# Vaddr 0x8000_0000, Paddr 0x80000000: aligned gigapage (program and data memory so we can execute without jumping around)
# test 8.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 8.3.1.1.3 and some other tests, specified in the comments.
# test 11.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 11.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it shuold fault before getting there.
.8byte 0x80200AB0, 0x0000DEADBEEF0000, write64_test# 8.3.1.1.4 and 8.3.1.4.1
.8byte 0x800FFAB8, 0x0880DEADBEEF0055, write64_test# 8.3.1.1.4
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test# 8.3.1.3.2
.8byte 0x80203130, 0x0110DEADBEEF0077, write64_test# 8.3.1.3.2
.8byte 0x80099000, 0x0000806711100393, write64_test# 8.3.1.3.1 and 8.3.1.3.2 write executable code for "li x7, 0x111; ret"
.8byte 0x80205AA0, 0x0000806711100393, write64_test# 8.3.1.3.5 write same executable code
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test# 8.3.1.1.4
.8byte 0x84212348, 0x0330DEADBEEF0440, write64_test# 8.3.1.3.3
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, write64_test# 8.3.1.3.7
.8byte 0x80200AB0, 0x0000DEADBEEF0000, write64_test# 11.3.1.1.4 and 11.3.1.4.1
.8byte 0x800FFAB8, 0x0880DEADBEEF0055, write64_test# 11.3.1.1.4
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test# 11.3.1.3.2
.8byte 0x80203130, 0x0110DEADBEEF0077, write64_test# 11.3.1.3.2
.8byte 0x80099000, 0x0000806711100393, write64_test# 11.3.1.3.1 and 11.3.1.3.2 write executable code for "li x7, 0x111; ret"
.8byte 0x80205AA0, 0x0000806711100393, write64_test# 11.3.1.3.5 write same executable code
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test# 11.3.1.1.4
.8byte 0x84212348, 0x0330DEADBEEF0440, write64_test# 11.3.1.3.3
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, write64_test# 11.3.1.3.7
# test 8.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
# test 11.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
.8byte 0x0, 0x0, goto_baremetal# satp.MODE = baremetal / no translation.
.8byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.8byte 0x80200AB0, 0x0000DEADBEEF0000, read64_test
@ -113,42 +114,42 @@ test_cases:
.8byte 0x84212348, 0x0330DEADBEEF0440, read64_test
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, read64_test
# test 8.3.1.1.4 check translation works in sv39, read the same values from previous tests, this time with Vaddrs
# test 11.3.1.1.4 check translation works in sv39, read the same values from previous tests, this time with Vaddrs
.8byte 0x8000D, 0x0, goto_sv39 # satp.MODE = sv39, with base page table PPN = 0x8000D and ASID = 0. current VPN: gigapage at 0x80000000.
.8byte 0x80200AB0, 0x0000DEADBEEF0000, read64_test # gigapage at Vaddr 0x80000000, Paddr 0x80000000
.8byte 0x400FFAB8, 0x0880DEADBEEF0055, read64_test # megapage at Vaddr 0x40400000, Paddr 0x80000000
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test # kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000
# =========== test 8.3.1.2 page fault tests ===========
# =========== test 11.3.1.2 page fault tests ===========
# test 8.3.1.2.1 load page fault if upper bits of Vaddr are not the same
# test 11.3.1.2.1 load page fault if upper bits of Vaddr are not the same
.8byte 0x0010000080000AB0, 0x0, read64_test# gigapage at Vaddr 0x80000000, Paddr 0x80000000, bad 1 in upper bits
.8byte 0xFF0FFFFFFFFFF888, 0x0, read64_test# kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000, bad 0000 in upper bits
# test 8.3.1.2.2 load page fault when reading an address where the valid flag is zero
# test 11.3.1.2.2 load page fault when reading an address where the valid flag is zero
.8byte 0x6000, 0x0, read64_test
# test 8.3.1.2.3 store page fault if PTE has W and ~R flags set
# test 11.3.1.2.3 store page fault if PTE has W and ~R flags set
.8byte 0x2000, 0x0, write64_test
# test 8.3.1.2.4 Fault if last level PTE is a pointer
# test 11.3.1.2.4 Fault if last level PTE is a pointer
.8byte 0x0020, 0x0, read64_test
# test 8.3.1.2.5 load page fault on misaligned pages
# test 11.3.1.2.5 load page fault on misaligned pages
.8byte 0xC0000000, 0x0, read64_test# misaligned gigapage
.8byte 0x40200000, 0x0, read64_test# misaligned megapage
# =========== test 8.3.1.3 PTE Protection flags ===========
# =========== test 11.3.1.3 PTE Protection flags ===========
# test 8.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 8.3.1.1.4
# test 11.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 11.3.1.1.4
.8byte 0x40099000, 0x111, executable_test # execute success when U=0, priv=S
.8byte 0x40400000, 0x2, goto_u_mode # go to U mode, return to megapage at 0x40400000 where U = 1. 0x9 written to output
.8byte 0xFFFFFFFFFFFFFC80, 0x0880DEADBEEF0550, read64_test # load page fault when U=0, priv=U
.8byte 0x40099000, 0xbad, executable_test # execute fault when U=0, priv=U
# test 8.3.1.3.2 User flag == 1
# test 11.3.1.3.2 User flag == 1
.8byte 0x1AC0, 0x0990DEADBEEF0033, read64_test # read success when U=1, priv=U
.8byte 0x80000000, 0x1, goto_s_mode # go back to S mode, return to gigapage at 0x80000000 where U = 0. 0x8 written to output
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11
@ -157,61 +158,64 @@ test_cases:
.8byte 0x0, 0x2, write_mxr_sum # set sstatus.[MXR, SUM] = 10.
.8byte 0x1AC0, 0x0990DEADBEEF0033, read64_test # load page fault when U-1, priv=S, sstatus.SUM=0
# test 8.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 8.3.1.1.4
# test 11.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 11.3.1.1.4
.8byte 0x0, 0x1, write_mxr_sum # set sstatus.[MXR, SUM] = 01.
.8byte 0x40612348, 0x0330DEADBEEF0440, read64_test # load page fault when R=0, sstatus.MXR=0
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11.
.8byte 0x40612348, 0x0330DEADBEEF0440, read64_test # read success when MXR=1, X=1
# test 8.3.1.3.4 Write flag
# test 11.3.1.3.4 Write flag
.8byte 0x80AAAAA0, 0x0440DEADBEEF0110, write64_test# write success when W=1
.8byte 0x80AAAAA0, 0x0440DEADBEEF0110, read64_test# check write success by reading the same address
.8byte 0x40000000, 0x0220DEADBEEF0BB0, write64_test# store page fault when W=0
# test 8.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 8.3.1.3.1
# test 11.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 11.3.1.3.1
.8byte 0x5AA0, 0x1, executable_test # instr page fault when X=0
# In the following two tests, SVADU is not supported, so the software handles the A/D bits
# Since SVADU is 0, Accesses to A/D=0 causes a fault for the trap handler to fix those bits
# test 8.3.1.3.6 Accessed flag == 0
# test 11.3.1.3.6 Accessed flag == 0
.8byte 0x36D0, 0x0990DEADBEEF0770, write64_test# store page fault when A=0
.8byte 0x3AB8, 0x0990DEADBEEF0990, read64_test# load page fault when A=0
# test 8.3.1.3.7 Dirty flag == 0
# test 11.3.1.3.7 Dirty flag == 0
.8byte 0x4658, 0x0440DEADBEEF0AA0, write64_test# store page fault when D=0
.8byte 0x4AA0, 0x0440DEADBEEF0BB0, read64_test# read success when D=0
# =========== test 8.3.1.4 SATP Register ===========
# test 11.3.1.3.8 Reserved bits nonzero
.8byte 0x7AA0, 0x123456789ABCDEF, read64_test # load page fault because reserved is nonzero
# test 8.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
# =========== test 11.3.1.4 SATP Register ===========
# test 11.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write64_test # write identical value to global PTE to make sure it's still in the TLB
.8byte 0x8FFFF, 0x11, goto_sv39 # go to SV39 on a second, very minimal page table
.8byte 0x200AB0, 0x0000DEADBEEF0000, read64_test # Read success of old written value from a new page table mapping
# test 8.3.1.4.2 Test Global mapping
# test 11.3.1.4.2 Test Global mapping
// ***.8byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read64_test # read success of global PTE undefined in current mapping.
# =========== test 8.3.1.5 STATUS Registers ===========
# =========== test 11.3.1.5 STATUS Registers ===========
# test 8.3.1.5.1 mstatus.mprv translation
# test 11.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.8byte 0x8000D, 0x0, goto_sv39 // go back to old, extensive page table
.8byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.8byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 8.3.1.5.2 mstatus.mprv clearing
# test 11.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.8byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.8byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.8byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 8.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 8.3.1.3.3
# test 11.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 11.3.1.3.3
# terminate tests
.8byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

120
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv39-svadu-01.S → tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv39-svadu-svnapot-svpbmt-01.S
View File

@ -1,6 +1,6 @@
///////////////////////////////////////////
//
// WALLY-MMU
// WALLY-MMU-SV39-SVADU
//
// Author: David_Harris@hmc.edu and Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
@ -52,9 +52,9 @@ test_cases:
#
# ---------------------------------------------------------------------------------------------
# =========== test 8.3.1.1 Page Table Translation ===========
# =========== test 11.3.1.1 Page Table Translation ===========
# test 8.3.1.1.1 write page tables / entries to phyiscal memory
# test 11.3.1.1.1 write page tables / entries to phyiscal memory
# sv39 page table (See Figure 12.12***):
# Level 2 page table, situated at 0x8000D000
.8byte 0x000000008000D000, 0x0000000020004C01, write64_test# points to level 1 page table A
@ -82,6 +82,27 @@ test_cases:
.8byte 0x0000000080018020, 0x0000000020080C57, write64_test# Vaddr 0x4000 Paddr 0x80203000: D=0, should cause write fault
.8byte 0x0000000080018028, 0x00000000200814C7, write64_test# Vaddr 0x5000 Paddr 0x80205000: X=0, fetches should fault
.8byte 0x0000000080018030, 0x00000000200814C0, write64_test# Vaddr 0x6000: invalid page
.8byte 0x0000000080018038, 0x01000000200800DF, write64_test# Vaddr 0x7000, Paddr = 0x80200000, bad reserved bit
.8byte 0x0000000080018040, 0x20000000200800DF, write64_test# Vaddr 0x8000, Paddr = 0x80200000, PBMT = 1
.8byte 0x0000000080018048, 0x40000000200800DF, write64_test# Vaddr 0x9000, Paddr = 0x80200000, PMBT = 2
.8byte 0x0000000080018050, 0x60000000200800DF, write64_test# Vaddr 0xA000, Paddr = 0x80200000, PMBT = 3
.8byte 0x0000000080018080, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x0000000080018088, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x0000000080018090, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x0000000080018098, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180A0, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180A8, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180B0, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180B8, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180C0, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180C8, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180D0, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180D8, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180E0, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180E8, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180F0, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
.8byte 0x00000000800180F8, 0x80000000200800DF, write64_test# Vaddr 0x10000, Paddr = 0x80200000, NAPOT
# Level 0 page table B
.8byte 0x0000000080016FF8, 0x00000000200804CF, write64_test# Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000 aligned kilopage
@ -89,19 +110,21 @@ test_cases:
.8byte 0x8FFFF000, 0x200000CF, write64_test# Vaddr 0x0, Paddr 0x80000000 aligned gigapage
.8byte 0x8FFFF010, 0x200000CF, write64_test# Vaddr 0x8000_0000, Paddr 0x80000000: aligned gigapage (program and data memory so we can execute without jumping around)
# test 8.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 8.3.1.1.3 and some other tests, specified in the comments.
# test 11.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 11.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it shuold fault before getting there.
.8byte 0x80200AB0, 0x0000DEADBEEF0000, write64_test# 8.3.1.1.4 and 8.3.1.4.1
.8byte 0x800FFAB8, 0x0880DEADBEEF0055, write64_test# 8.3.1.1.4
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test# 8.3.1.3.2
.8byte 0x80203130, 0x0110DEADBEEF0077, write64_test# 8.3.1.3.2
.8byte 0x80099000, 0x0000806711100393, write64_test# 8.3.1.3.1 and 8.3.1.3.2 write executable code for "li x7, 0x111; ret"
.8byte 0x80205AA0, 0x0000806711100393, write64_test# 8.3.1.3.5 write same executable code
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test# 8.3.1.1.4
.8byte 0x84212348, 0x0330DEADBEEF0440, write64_test# 8.3.1.3.3
.8byte 0x80200AB0, 0x0000DEADBEEF0000, write64_test # 11.3.1.1.4 and 11.3.1.4.1
.8byte 0x800FFAB8, 0x0880DEADBEEF0055, write64_test # 11.3.1.1.4
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test # 11.3.1.3.2
.8byte 0x80203130, 0x0110DEADBEEF0077, write64_test # 11.3.1.3.2
.8byte 0x80099000, 0x0000806711100393, write64_test # 11.3.1.3.1 and 11.3.1.3.2 write executable code for "li x7, 0x111; ret"
.8byte 0x80205AA0, 0x0000806711100393, write64_test # 11.3.1.3.5 write same executable code
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test # 11.3.1.1.4
.8byte 0x84212348, 0x0330DEADBEEF0440, write64_test # 11.3.1.3.3
.8byte 0x8020A400, 0x0550DEADBEEF0660, write64_test # 11.3.1.3.9
.8byte 0x80205000, 0x0770DEADBEEF0880, write64_test # 11.3.1.2.2 junk in memory location corresponding to invalid page
# test 8.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
# test 11.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
.8byte 0x0, 0x0, goto_baremetal# satp.MODE = baremetal / no translation.
.8byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.8byte 0x80200AB0, 0x0000DEADBEEF0000, read64_test
@ -111,42 +134,42 @@ test_cases:
.8byte 0x80201888, 0x0220DEADBEEF0099, read64_test
.8byte 0x84212348, 0x0330DEADBEEF0440, read64_test
# test 8.3.1.1.4 check translation works in sv39, read the same values from previous tests, this time with Vaddrs
# test 11.3.1.1.4 check translation works in sv39, read the same values from previous tests, this time with Vaddrs
.8byte 0x8000D, 0x0, goto_sv39 # satp.MODE = sv39, with base page table PPN = 0x8000D and ASID = 0. current VPN: gigapage at 0x80000000.
.8byte 0x80200AB0, 0x0000DEADBEEF0000, read64_test # gigapage at Vaddr 0x80000000, Paddr 0x80000000
.8byte 0x400FFAB8, 0x0880DEADBEEF0055, read64_test # megapage at Vaddr 0x40400000, Paddr 0x80000000
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test # kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000
# =========== test 8.3.1.2 page fault tests ===========
# =========== test 11.3.1.2 page fault tests ===========
# test 8.3.1.2.1 load page fault if upper bits of Vaddr are not the same
# test 11.3.1.2.1 load page fault if upper bits of Vaddr are not the same
.8byte 0x0010000080000AB0, 0x0, read64_test# gigapage at Vaddr 0x80000000, Paddr 0x80000000, bad 1 in upper bits
.8byte 0xFF0FFFFFFFFFF888, 0x0, read64_test# kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000, bad 0000 in upper bits
# test 8.3.1.2.2 load page fault when reading an address where the valid flag is zero
# test 11.3.1.2.2 load page fault when reading an address where the valid flag is zero
.8byte 0x6000, 0x0, read64_test
# test 8.3.1.2.3 store page fault if PTE has W and ~R flags set
# test 11.3.1.2.3 store page fault if PTE has W and ~R flags set
.8byte 0x2000, 0x0, write64_test
# test 8.3.1.2.4 Fault if last level PTE is a pointer
# test 11.3.1.2.4 Fault if last level PTE is a pointer
.8byte 0x0020, 0x0, read64_test
# test 8.3.1.2.5 load page fault on misaligned pages
# test 11.3.1.2.5 load page fault on misaligned pages
.8byte 0xC0000000, 0x0, read64_test# misaligned gigapage
.8byte 0x40200000, 0x0, read64_test# misaligned megapage
# =========== test 8.3.1.3 PTE Protection flags ===========
# =========== test 11.3.1.3 PTE Protection flags ===========
# test 8.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 8.3.1.1.4
# test 11.3.1.3.1 User flag == 0
# *** reads on pages with U=0 already tested in 11.3.1.1.4
.8byte 0x40099000, 0x111, executable_test # execute success when U=0, priv=S
.8byte 0x40400000, 0x2, goto_u_mode # go to U mode, return to megapage at 0x40400000 where U = 1. 0x9 written to output
.8byte 0xFFFFFFFFFFFFFC80, 0x0880DEADBEEF0550, read64_test # load page fault when U=0, priv=U
.8byte 0x40099000, 0xbad, executable_test # execute fault when U=0, priv=U
# test 8.3.1.3.2 User flag == 1
# test 11.3.1.3.2 User flag == 1
.8byte 0x1AC0, 0x0990DEADBEEF0033, read64_test # read success when U=1, priv=U
.8byte 0x80000000, 0x1, goto_s_mode # go back to S mode, return to gigapage at 0x80000000 where U = 0. 0x8 written to output
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11
@ -155,60 +178,77 @@ test_cases:
.8byte 0x0, 0x2, write_mxr_sum # set sstatus.[MXR, SUM] = 10.
.8byte 0x1AC0, 0x0990DEADBEEF0033, read64_test # load page fault when U-1, priv=S, sstatus.SUM=0
# test 8.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 8.3.1.1.4
# test 11.3.1.3.3 Read flag
# *** reads on pages with R=1 already tested in 11.3.1.1.4
.8byte 0x0, 0x1, write_mxr_sum # set sstatus.[MXR, SUM] = 01.
.8byte 0x40612348, 0x0330DEADBEEF0440, read64_test # load page fault when R=0, sstatus.MXR=0
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11.
.8byte 0x40612348, 0x0330DEADBEEF0440, read64_test # read success when MXR=1, X=1
# test 8.3.1.3.4 Write flag
# test 11.3.1.3.4 Write flag
.8byte 0x80AAAAA0, 0x0440DEADBEEF0110, write64_test# write success when W=1
.8byte 0x80AAAAA0, 0x0440DEADBEEF0110, read64_test# check write success by reading the same address
.8byte 0x40000000, 0x0220DEADBEEF0BB0, write64_test# store page fault when W=0
# test 8.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 8.3.1.3.1
# test 11.3.1.3.5 eXecute flag
# *** fetches on pages with X = 1 already tested in 11.3.1.3.1
.8byte 0x5AA0, 0x1, executable_test # instr page fault when X=0
# In the following two tests, SVADU is supported, so the hardware handles the A/D bits
# Since SVADU is 1, there are no faults when A/D=0
# test 8.3.1.3.6 Accessed flag == 0
# test 11.3.1.3.6 Accessed flag == 0
.8byte 0x36D0, 0x0990DEADBEEF0770, write64_test # Write success when A=0 and SVADU is enabled
.8byte 0x36D0, 0x0990DEADBEEF0770, read64_test # Read success when A=0 and SVADU is enabled
# test 8.3.1.3.7 Dirty flag == 0
# test 11.3.1.3.7 Dirty flag == 0
.8byte 0x4658, 0x0440DEADBEEF0AA0, write64_test # Write success when D=0 and SVADU is enabled
.8byte 0x4658, 0x0440DEADBEEF0AA0, read64_test # read success when D=0
# =========== test 8.3.1.4 SATP Register ===========
# test 11.3.1.3.8 Reserved bits nonzero
.8byte 0x7AA0, 0x123456789ABCDEF, read64_test # load page fault because reserved is nonzero
# test 8.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
# test 11.3.1.3.9 NAPOT read
.8byte 0x1A400, 0x0550DEADBEEF0660, read64_test # read from NAPOT 64 KiB page
# test 11.3.1.3.10 PBMT checks
.8byte 0x8040, 0x1212343456567878, write64_test # Write fault with PBMT when menvcfg.PBMTE = 0
.8byte 0x0, 0x0, goto_m_mode # change to M mode, 0x9 written to output
.8byte 0x0, 0x4000000000000000, write_menvcfg # set menvcfg.PBMTE = 1
.8byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.8byte 0x8040, 0x1212343456567878, write64_test # Write success with PBMT = 1
.8byte 0x8040, 0x1212343456567878, read64_test # Read back success with PBMT = 1
.8byte 0x9050, 0x2312343456567878, write64_test # Write success with PBMT = 2
.8byte 0x9050, 0x2312343456567878, read64_test # Read back success with PBMT = 2
.8byte 0xA060, 0x3412343456567878, write64_test # Write faults with PBMT = 3
# =========== test 11.3.1.4 SATP Register ===========
# test 11.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write64_test # write identical value to global PTE to make sure it's still in the TLB
.8byte 0x8FFFF, 0x11, goto_sv39 # go to SV39 on a second, very minimal page table
.8byte 0x200AB0, 0x0000DEADBEEF0000, read64_test # Read success of old written value from a new page table mapping
# test 8.3.1.4.2 Test Global mapping
# test 11.3.1.4.2 Test Global mapping
// ***.8byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read64_test # read success of global PTE undefined in current mapping.
# =========== test 8.3.1.5 STATUS Registers ===========
# =========== test 11.3.1.5 STATUS Registers ===========
# test 8.3.1.5.1 mstatus.mprv translation
# test 11.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.8byte 0x8000D, 0x0, goto_sv39 // go back to old, extensive page table
.8byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.8byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 8.3.1.5.2 mstatus.mprv clearing
# test 11.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.8byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.8byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.8byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 8.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 8.3.1.3.3
# test 11.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 11.3.1.3.3
# terminate tests
.8byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

86
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv48-01.S
View File

@ -1,6 +1,6 @@
///////////////////////////////////////////
//
// WALLY-MMU
// WALLY-MMU-SV48
//
// Author: David_Harris@hmc.edu and Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
@ -54,9 +54,9 @@ test_cases:
# ---------------------------------------------------------------------------------------------
# =========== test 8.3.1.1 Page Table Translation ===========
# =========== test 11.3.1.1 Page Table Translation ===========
# test 8.3.1.1.1 write page tables / entries to phyiscal memory
# test 11.3.1.1.1 write page tables / entries to phyiscal memory
# sv48 page table (See Figure 12.12***):
# Level 3 page table, situated at 0x8000D000
.8byte 0x000000008000D000, 0x0000000020004C01, write64_test # points to level 2 page table A
@ -101,22 +101,22 @@ test_cases:
.8byte 0x8002F010, 0x200000CF, write64_test # Vaddr 0x80000000, Paddr 0x80000000: aligned gigapage (data and instr memory)
# test 8.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 8.3.1.1.3 and some other tests, specified in the comments.
# test 11.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 11.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it should fault before getting there.
.8byte 0x82777778, 0x0EE0DEADBEEF0CC0, write64_test # 8.3.1.1.4 terapage
.8byte 0x85BC0AB0, 0x0000DEADBEEF0000, write64_test # 8.3.1.1.4 gigapage
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, write64_test # 8.3.1.1.4 megapage
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test # 8.3.1.1.4 kilopage
.8byte 0x80099000, 0x0000806711100393, write64_test # 8.3.1.3.1 write executable code for "li x7, 0x111; ret"
.8byte 0x80200400, 0x0000806711100393, write64_test # 8.3.1.3.2 write same executable code
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test # 8.3.1.3.2
.8byte 0x80200130, 0x0110DEADBEEF0077, write64_test # 8.3.1.3.2
.8byte 0x85212348, 0x0330DEADBEEF0440, write64_test # 8.3.1.3.3
.8byte 0x88888000, 0x0000806711100393, write64_test # 8.3.1.3.5 write same executable code
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, write64_test # 8.3.1.3.7
.8byte 0x82777778, 0x0EE0DEADBEEF0CC0, write64_test # 11.3.1.1.4 terapage
.8byte 0x85BC0AB0, 0x0000DEADBEEF0000, write64_test # 11.3.1.1.4 gigapage
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, write64_test # 11.3.1.1.4 megapage
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test # 11.3.1.1.4 kilopage
.8byte 0x80099000, 0x0000806711100393, write64_test # 11.3.1.3.1 write executable code for "li x7, 0x111; ret"
.8byte 0x80200400, 0x0000806711100393, write64_test # 11.3.1.3.2 write same executable code
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test # 11.3.1.3.2
.8byte 0x80200130, 0x0110DEADBEEF0077, write64_test # 11.3.1.3.2
.8byte 0x85212348, 0x0330DEADBEEF0440, write64_test # 11.3.1.3.3
.8byte 0x88888000, 0x0000806711100393, write64_test # 11.3.1.3.5 write same executable code
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, write64_test # 11.3.1.3.7
# test 8.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
# test 11.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
.8byte 0x0, 0x0, goto_baremetal # satp.MODE = baremetal / no translation.
.8byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.8byte 0x82777778, 0x0EE0DEADBEEF0CC0, read64_test
@ -128,43 +128,43 @@ test_cases:
.8byte 0x85212348, 0x0330DEADBEEF0440, read64_test
.8byte 0x80203AA0, 0x0440DEADBEEF0BB0, read64_test
# test 8.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
# test 11.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
.8byte 0x8000D, 0x0, goto_sv48 # satp.MODE = sv48, with base page table PPN = 0x8000D and ASID = 0. current VPN: megapage at 0x80000000. Nothing written to output
.8byte 0x10082777778, 0x0EE0DEADBEEF0CC0, read64_test # terapage at Vaddr 0x010000000000, Paddr 0x0
.8byte 0x8005BC0AB0, 0x0000DEADBEEF0000, read64_test # gigapage at Vaddr 0x008000000000, Paddr 0x80000000
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, read64_test # megapage at Vaddr 0x80000000, Paddr 0x80000000
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test # kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000
# =========== test 8.3.1.2 page fault tests ===========
# =========== test 11.3.1.2 page fault tests ===========
# test 8.3.1.2.1 page fault if upper bits of Vaddr are not the same
# test 11.3.1.2.1 page fault if upper bits of Vaddr are not the same
.8byte 0x001000800ABC0AB0, 0x0, read64_test# gigapage at Vaddr 0x008000000000, Paddr 0x80000000, bad 1 in upper bits
.8byte 0xFF0FFFFFFFFFF888, 0x0, read64_test# kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000, bad 0000 in upper bits
# test 8.3.1.2.2 read fault when reading an address where the valid flag is zero
# test 11.3.1.2.2 read fault when reading an address where the valid flag is zero
.8byte 0x80205000, 0x0, read64_test
# test 8.3.1.2.3 write fault if PTE has W and ~R flags set
# test 11.3.1.2.3 write fault if PTE has W and ~R flags set
.8byte 0x80202000, 0x0, write64_test
# test 8.3.1.2.4 Fault if last level PTE is a pointer
# test 11.3.1.2.4 Fault if last level PTE is a pointer
.8byte 0x80200000, 0x0, read64_test
# test 8.3.1.2.5 read fault on misaligned pages
# test 11.3.1.2.5 read fault on misaligned pages
.8byte 0x18000000000, 0x0, read64_test # misaligned terapage
.8byte 0x8080000000, 0x0, read64_test # misaligned gigapage
.8byte 0x80400000, 0x0, read64_test # misaligned megapage
# =========== test 8.3.1.3 PTE Protection flags ===========
# =========== test 11.3.1.3 PTE Protection flags ===========
# test 8.3.1.3.1 User flag == 0
# reads on pages with U=0 already tested in 8.3.1.1.4
# test 11.3.1.3.1 User flag == 0
# reads on pages with U=0 already tested in 11.3.1.1.4
.8byte 0x008000099000, 0x111, executable_test # execute success when U=0, priv=S
.8byte 0x008040000000, 0x1, goto_u_mode # go to U mode, return to gigapage at 0x008040000000 where PTE.U = 1. 0x9 written to output
.8byte 0xFFFFFFFFFFFFFC80, 0x0880DEADBEEF0550, read64_test # read fault when U=0, priv=U
.8byte 0x008000099000, 0xbad, executable_test # execute fault when U=0, priv=U
# test 8.3.1.3.2 User flag == 1
# test 11.3.1.3.2 User flag == 1
.8byte 0x80201AC0, 0x0990DEADBEEF0033, read64_test # read success when U=1, priv=U
.8byte 0x80000000, 0x2, goto_s_mode
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11
@ -173,61 +173,61 @@ test_cases:
.8byte 0x0, 0x2, write_mxr_sum # set sstatus.[MXR, SUM] = 10.
.8byte 0x80201AC0, 0x0990DEADBEEF0033, read64_test # read fault when U=1, priv=S, sstatus.SUM=0
# test 8.3.1.3.3 Read flag
# reads on pages with R=1 already tested in 8.3.1.1.4
# test 11.3.1.3.3 Read flag
# reads on pages with R=1 already tested in 11.3.1.1.4
.8byte 0x0, 0x1, write_mxr_sum # set sstatus.[MXR, SUM] = 01.
.8byte 0x80612348, 0x0330DEADBEEF0440, read64_test # read fault when R=0, sstatus.MXR=0
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11.
.8byte 0x80612348, 0x0330DEADBEEF0440, read64_test # read success when MXR=1, X=1
# test 8.3.1.3.4 Write flag
# test 11.3.1.3.4 Write flag
.8byte 0x10080BCDED8, 0x0440DEADBEEF0110, write64_test # write success when W=1 (corresponding Paddr = 0x80BCDED8)
.8byte 0x10080BCDED8, 0x0440DEADBEEF0110, read64_test # check write success by reading value back
.8byte 0x8000009E88, 0x0220DEADBEEF0BB0, write64_test # write fault when W=0
# test 8.3.1.3.5 eXecute flag
# executes on pages with X = 1 already tested in 8.3.1.3.1
# test 11.3.1.3.5 eXecute flag
# executes on pages with X = 1 already tested in 11.3.1.3.1
.8byte 0x010088888000, 0x2, executable_test # execute fault when X=0
# In the following two tests, SVADU is not supported, so the software handles the A/D bits
# Since SVADU is 0, Accesses to A/D=0 causes a fault for the trap handler to fix those bits
# test 8.3.1.3.6 Accessed flag == 0
# test 11.3.1.3.6 Accessed flag == 0
.8byte 0x802036D0, 0x0990DEADBEEF0770, write64_test # write fault when A=0
.8byte 0x80203AB8, 0x0990DEADBEEF0990, read64_test# read fault when A=0
# test 8.3.1.3.7 Dirty flag == 0
# test 11.3.1.3.7 Dirty flag == 0
.8byte 0x80204658, 0x0440DEADBEEF0AA0, write64_test # write fault when D=0
.8byte 0x80204AA0, 0x0440DEADBEEF0BB0, read64_test# read success when D=0
# =========== test 8.3.1.4 SATP Register ===========
# =========== test 11.3.1.4 SATP Register ===========
# test 8.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
# test 11.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write64_test # write identical value to global PTE to make sure it's still in the TLB
.8byte 0x8000F, 0x11, goto_sv48 # go to SV39 on a second, very minimal page table
.8byte 0x5BC0AB0, 0x0000DEADBEEF0000, read64_test # Read success of old written value from a new page table mapping
# test 8.3.1.4.2 Test Global mapping
# test 11.3.1.4.2 Test Global mapping
// ***.8byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read64_test # read success of global PTE undefined in current mapping.
# =========== test 8.3.1.5 STATUS Registers ===========
# =========== test 11.3.1.5 STATUS Registers ===========
# test 8.3.1.5.1 mstatus.mprv translation
# test 11.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.8byte 0x8000D, 0x0, goto_sv48 // go back to old, extensive page table
.8byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.8byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 8.3.1.5.2 mstatus.mprv clearing
# test 11.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.8byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.8byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.8byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 8.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 8.3.1.3.3
# test 11.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 11.3.1.3.3
# terminate tests
.8byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.

84
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-mmu-sv48-svadu-01.S
View File

@ -1,6 +1,6 @@
///////////////////////////////////////////
//
// WALLY-MMU
// WALLY-MMU-SV48-SVADU
//
// Author: David_Harris@hmc.edu and Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
@ -54,9 +54,9 @@ test_cases:
# ---------------------------------------------------------------------------------------------
# =========== test 8.3.1.1 Page Table Translation ===========
# =========== test 11.3.1.1 Page Table Translation ===========
# test 8.3.1.1.1 write page tables / entries to phyiscal memory
# test 11.3.1.1.1 write page tables / entries to phyiscal memory
# sv48 page table (See Figure 12.12***):
# Level 3 page table, situated at 0x8000D000
.8byte 0x000000008000D000, 0x0000000020004C01, write64_test # points to level 2 page table A
@ -101,21 +101,21 @@ test_cases:
.8byte 0x8002F010, 0x200000CF, write64_test # Vaddr 0x80000000, Paddr 0x80000000: aligned gigapage (data and instr memory)
# test 8.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 8.3.1.1.3 and some other tests, specified in the comments.
# test 11.3.1.1.2 write values to Paddrs in each page
# each of these values is used for 11.3.1.1.3 and some other tests, specified in the comments.
# when a test is supposed to fault, nothing is written into where it'll be reading/executing since it should fault before getting there.
.8byte 0x82777778, 0x0EE0DEADBEEF0CC0, write64_test # 8.3.1.1.4 terapage
.8byte 0x85BC0AB0, 0x0000DEADBEEF0000, write64_test # 8.3.1.1.4 gigapage
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, write64_test # 8.3.1.1.4 megapage
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test # 8.3.1.1.4 kilopage
.8byte 0x80099000, 0x0000806711100393, write64_test # 8.3.1.3.1 write executable code for "li x7, 0x111; ret"
.8byte 0x80200400, 0x0000806711100393, write64_test # 8.3.1.3.2 write same executable code
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test # 8.3.1.3.2
.8byte 0x80200130, 0x0110DEADBEEF0077, write64_test # 8.3.1.3.2
.8byte 0x85212348, 0x0330DEADBEEF0440, write64_test # 8.3.1.3.3
.8byte 0x88888000, 0x0000806711100393, write64_test # 8.3.1.3.5 write same executable code
.8byte 0x82777778, 0x0EE0DEADBEEF0CC0, write64_test # 11.3.1.1.4 terapage
.8byte 0x85BC0AB0, 0x0000DEADBEEF0000, write64_test # 11.3.1.1.4 gigapage
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, write64_test # 11.3.1.1.4 megapage
.8byte 0x80201888, 0x0220DEADBEEF0099, write64_test # 11.3.1.1.4 kilopage
.8byte 0x80099000, 0x0000806711100393, write64_test # 11.3.1.3.1 write executable code for "li x7, 0x111; ret"
.8byte 0x80200400, 0x0000806711100393, write64_test # 11.3.1.3.2 write same executable code
.8byte 0x80200AC0, 0x0990DEADBEEF0033, write64_test # 11.3.1.3.2
.8byte 0x80200130, 0x0110DEADBEEF0077, write64_test # 11.3.1.3.2
.8byte 0x85212348, 0x0330DEADBEEF0440, write64_test # 11.3.1.3.3
.8byte 0x88888000, 0x0000806711100393, write64_test # 11.3.1.3.5 write same executable code
# test 8.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
# test 11.3.1.1.3 read values back from Paddrs without translation (this also verifies the previous test)
.8byte 0x0, 0x0, goto_baremetal # satp.MODE = baremetal / no translation.
.8byte 0x0, 0x0, goto_s_mode # change to S mode, 0xb written to output
.8byte 0x82777778, 0x0EE0DEADBEEF0CC0, read64_test
@ -126,43 +126,43 @@ test_cases:
.8byte 0x80201888, 0x0220DEADBEEF0099, read64_test
.8byte 0x85212348, 0x0330DEADBEEF0440, read64_test
# test 8.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
# test 11.3.1.1.4 check translation works in sv48, read the same values from previous tests, this time with Vaddrs
.8byte 0x8000D, 0x0, goto_sv48 # satp.MODE = sv48, with base page table PPN = 0x8000D and ASID = 0. current VPN: megapage at 0x80000000. Nothing written to output
.8byte 0x10082777778, 0x0EE0DEADBEEF0CC0, read64_test # terapage at Vaddr 0x010000000000, Paddr 0x0
.8byte 0x8005BC0AB0, 0x0000DEADBEEF0000, read64_test # gigapage at Vaddr 0x008000000000, Paddr 0x80000000
.8byte 0x800F0AB8, 0x0880DEADBEEF0055, read64_test # megapage at Vaddr 0x80000000, Paddr 0x80000000
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test # kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000
# =========== test 8.3.1.2 page fault tests ===========
# =========== test 11.3.1.2 page fault tests ===========
# test 8.3.1.2.1 page fault if upper bits of Vaddr are not the same
# test 11.3.1.2.1 page fault if upper bits of Vaddr are not the same
.8byte 0x001000800ABC0AB0, 0x0, read64_test# gigapage at Vaddr 0x008000000000, Paddr 0x80000000, bad 1 in upper bits
.8byte 0xFF0FFFFFFFFFF888, 0x0, read64_test# kilopage at Vaddr 0xFFFFFFFFFFFFF000, Paddr 0x80201000, bad 0000 in upper bits
# test 8.3.1.2.2 read fault when reading an address where the valid flag is zero
# test 11.3.1.2.2 read fault when reading an address where the valid flag is zero
.8byte 0x80205000, 0x0, read64_test
# test 8.3.1.2.3 write fault if PTE has W and ~R flags set
# test 11.3.1.2.3 write fault if PTE has W and ~R flags set
.8byte 0x80202000, 0x0, write64_test
# test 8.3.1.2.4 Fault if last level PTE is a pointer
# test 11.3.1.2.4 Fault if last level PTE is a pointer
.8byte 0x80200000, 0x0, read64_test
# test 8.3.1.2.5 read fault on misaligned pages
# test 11.3.1.2.5 read fault on misaligned pages
.8byte 0x18000000000, 0x0, read64_test # misaligned terapage
.8byte 0x8080000000, 0x0, read64_test # misaligned gigapage
.8byte 0x80400000, 0x0, read64_test # misaligned megapage
# =========== test 8.3.1.3 PTE Protection flags ===========
# =========== test 11.3.1.3 PTE Protection flags ===========
# test 8.3.1.3.1 User flag == 0
# reads on pages with U=0 already tested in 8.3.1.1.4
# test 11.3.1.3.1 User flag == 0
# reads on pages with U=0 already tested in 11.3.1.1.4
.8byte 0x008000099000, 0x111, executable_test # execute success when U=0, priv=S
.8byte 0x008040000000, 0x1, goto_u_mode # go to U mode, return to gigapage at 0x008040000000 where PTE.U = 1. 0x9 written to output
.8byte 0xFFFFFFFFFFFFFC80, 0x0880DEADBEEF0550, read64_test # read fault when U=0, priv=U
.8byte 0x008000099000, 0xbad, executable_test # execute fault when U=0, priv=U
# test 8.3.1.3.2 User flag == 1
# test 11.3.1.3.2 User flag == 1
.8byte 0x80201AC0, 0x0990DEADBEEF0033, read64_test # read success when U=1, priv=U
.8byte 0x80000000, 0x2, goto_s_mode
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11
@ -171,61 +171,61 @@ test_cases:
.8byte 0x0, 0x2, write_mxr_sum # set sstatus.[MXR, SUM] = 10.
.8byte 0x80201AC0, 0x0990DEADBEEF0033, read64_test # read fault when U=1, priv=S, sstatus.SUM=0
# test 8.3.1.3.3 Read flag
# reads on pages with R=1 already tested in 8.3.1.1.4
# test 11.3.1.3.3 Read flag
# reads on pages with R=1 already tested in 11.3.1.1.4
.8byte 0x0, 0x1, write_mxr_sum # set sstatus.[MXR, SUM] = 01.
.8byte 0x80612348, 0x0330DEADBEEF0440, read64_test # read fault when R=0, sstatus.MXR=0
.8byte 0x0, 0x3, write_mxr_sum # set sstatus.[MXR, SUM] = 11.
.8byte 0x80612348, 0x0330DEADBEEF0440, read64_test # read success when MXR=1, X=1
# test 8.3.1.3.4 Write flag
# test 11.3.1.3.4 Write flag
.8byte 0x10080BCDED8, 0x0440DEADBEEF0110, write64_test # write success when W=1 (corresponding Paddr = 0x80BCDED8)
.8byte 0x10080BCDED8, 0x0440DEADBEEF0110, read64_test # check write success by reading value back
.8byte 0x8000009E88, 0x0220DEADBEEF0BB0, write64_test # write fault when W=0
# test 8.3.1.3.5 eXecute flag
# executes on pages with X = 1 already tested in 8.3.1.3.1
# test 11.3.1.3.5 eXecute flag
# executes on pages with X = 1 already tested in 11.3.1.3.1
.8byte 0x010088888000, 0x2, executable_test # execute fault when X=0
# In the following two tests, SVADU is supported, so the hardware handles the A/D bits
# Since SVADU is 1, there are no faults when A/D=0
# test 8.3.1.3.6 Accessed flag == 0
# test 11.3.1.3.6 Accessed flag == 0
.8byte 0x802036D0, 0x0990DEADBEEF0770, write64_test # Write success when A=0 and SVADU is enabled
.8byte 0x802036D0, 0x0990DEADBEEF0770, read64_test # Read success when A=0 and SVADU is enabled
# test 8.3.1.3.7 Dirty flag == 0
# test 11.3.1.3.7 Dirty flag == 0
.8byte 0x80204658, 0x0440DEADBEEF0AA0, write64_test # Write success when D=0 and SVADU is enabled
.8byte 0x80204658, 0x0440DEADBEEF0AA0, read64_test # read success when D=0
# =========== test 8.3.1.4 SATP Register ===========
# =========== test 11.3.1.4 SATP Register ===========
# test 8.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
# test 11.3.1.4.1 SATP ASID and PPN fields (test having two page tables with different ASID)
// *** .8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, write64_test # write identical value to global PTE to make sure it's still in the TLB
.8byte 0x8000F, 0x11, goto_sv48 # go to SV39 on a second, very minimal page table
.8byte 0x5BC0AB0, 0x0000DEADBEEF0000, read64_test # Read success of old written value from a new page table mapping
# test 8.3.1.4.2 Test Global mapping
# test 11.3.1.4.2 Test Global mapping
// ***.8byte 0x7FFFFFF888, 0x0220DEADBEEF0099, read64_test # read success of global PTE undefined in current mapping.
# =========== test 8.3.1.5 STATUS Registers ===========
# =========== test 11.3.1.5 STATUS Registers ===========
# test 8.3.1.5.1 mstatus.mprv translation
# test 11.3.1.5.1 mstatus.mprv translation
# *** mstatus.mprv = 0 tested on every one of the translated reads and writes before this.
.8byte 0x8000D, 0x0, goto_sv48 // go back to old, extensive page table
.8byte 0x80000000, 0x1, goto_m_mode // go to m mode to be able to write mstatus
.8byte 0x1, 0x1, read_write_mprv // write 1 to mstatus.mprv and set mstatus.mpp to be 01=S
.8byte 0xFFFFFFFFFFFFF888, 0x0220DEADBEEF0099, read64_test // read test succeeds with translation even though we're in M mode since MPP=S and MPRV=1
# test 8.3.1.5.2 mstatus.mprv clearing
# test 11.3.1.5.2 mstatus.mprv clearing
# mstatus.mprv is already 1 from the last test so going to S mode should clear it with the mret
.8byte 0x80000000, 0x1, goto_s_mode // This should zero out the mprv bit but now to read and write mstatus, we have to
.8byte 0x80000000, 0x1, goto_m_mode // go back to m mode to allow us to reread mstatus.
.8byte 0x0, 0x0, read_write_mprv // read what should be a zeroed out mprv value and then force it back to zero.
# test 8.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 8.3.1.3.3
# test 11.3.1.5.3 sstatus.mxr read
# this bitfield already tested in 11.3.1.3.3
# terminate tests
.8byte 0x0, 0x0, terminate_test # brings us back into machine mode with a final ecall, writing 0x9 to the output.