From 8758b6efa14e66b2ced557ea84b37a68a3fa48e2 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Mon, 3 May 2021 19:37:45 -0400
Subject: [PATCH] Flush uart print statements on \n

---
 wally-pipelined/src/uncore/uartPC16550D.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/wally-pipelined/src/uncore/uartPC16550D.sv b/wally-pipelined/src/uncore/uartPC16550D.sv
index c3e5af1cf..5871c9e60 100644
--- a/wally-pipelined/src/uncore/uartPC16550D.sv
+++ b/wally-pipelined/src/uncore/uartPC16550D.sv
@@ -377,7 +377,7 @@ module uartPC16550D(
           txhrfull <= #1 1;
         end
         $write("%c",Din); // for testbench
-        if (Din == '\n') $flush;
+        if (Din == 13) $flush;
       end
       if (txstate == UART_IDLE) begin // move data into tx shift register if available
         if (fifoenabled) begin