mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-03 02:05:21 +00:00
Merge conflict fixing
This commit is contained in:
ethan-falicov
commit
863796b3c1
@ -146,6 +146,13 @@ string tests64iNOc[] = {
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"rv64i/WALLY-SLLI", "3000",
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"rv64i/WALLY-SRLI", "3000",
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"rv64i/WALLY-SRAI", "3000"
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"rv64i/WALLY-LOAD", "11bf0",
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"rv64i/WALLY-JAL", "4000",
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"rv64i/WALLY-STORE", "3000",
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"rv64i/WALLY-ADDIW", "3000",
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"rv64i/WALLY-SLLIW", "3000",
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"rv64i/WALLY-SRLIW", "3000",
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"rv64i/WALLY-SRAIW", "3000"
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};
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string tests32ic[] = '{
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// "rv32ic/WALLY-C-ADHOC-01", "2000",
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@ -226,6 +233,7 @@ string tests32i[] = {
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"rv32i/I-XOR-01","2000",
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"rv32i/I-XORI-01","2000",
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"rv32i/WALLY-ADD", "3000",
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<<<<<<< HEAD
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"rv32i/WALLY-SUB", "3000",
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"rv32i/WALLY-ADDI", "2000",
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"rv32i/WALLY-ANDI", "2000",
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@ -236,6 +244,12 @@ string tests32i[] = {
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"rv32i/WALLY-SLLI", "2000",
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"rv32i/WALLY-SRLI", "2000",
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"rv32i/WALLY-SRAI", "2000"
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=======
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"rv32i/WALLY-LOAD", "11c00",
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"rv32i/WALLY-SUB", "3000",
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"rv32i/WALLY-STORE", "2000",
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"rv32i/WALLY-JAL", "3000"
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>>>>>>> 88ccaff534d6bc14ccf767006b2d25505d0ce674
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};
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string tests[];
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182
wally-pipelined/testgen/testgen-ADDIW-SLLIW-SRLIW-SRAIW.py
Executable file
182
wally-pipelined/testgen/testgen-ADDIW-SLLIW-SRLIW-SRAIW.py
Executable file
@ -0,0 +1,182 @@
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#!/usr/bin/python3
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##################################
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# testgen-ADDIW-SLLIW-SRLIW-SRAIW.py
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#
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# ehedenberg@hmc.edu 4 February 2021
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# heavily influenced by Prof Harris Code
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import seed
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from random import getrandbits
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import sys
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##################################
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# functions
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##################################
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def logical_rshift(signed_integer, places):
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unsigned_integer=signed_integer%(1<<32)
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return unsigned_integer >> places
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def toSigned12bit(n):
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n=n & 0xfff
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if (n&(1<<11)):
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n=n|0xfffffffffffff000
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return n
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def toSigned32bit(n):
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n=n & 0xffffffff
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if (n&(1<<31)):
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n=n|0xffffffff00000000
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return n
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def computeExpected(a, b, test):
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if (test == "ADDIW"):
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b=toSigned12bit(b)
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return a + b
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elif (test == "SLLIW"):
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return (a << b)
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elif (test == "SRLIW"):
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return logical_rshift(a, b)
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elif(test == "SRAIW"):
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a= toSigned32bit(a)
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return a >> b
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else:
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die("bad test name ", test)
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# exit(1)
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def randRegs():
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reg1 = randint(1,31)
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reg2 = randint(1,31)
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reg3 = randint(1,31)
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if (reg1 == 6 or reg2 == 6 or reg3 == 6 or reg1 == reg2):
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return randRegs()
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else:
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return reg1, reg2, reg3
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def writeVector(a, b, storecmd):
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global testnum
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expected = computeExpected(a, b, test)
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expected = expected % 2**64 # drop carry if necessary
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if (expected < 0): # take twos complement
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expected = 2**64 + expected
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#expected=expected+2^32<<32
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if (expected >= (2**32)):
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expected=expected%(2**32)
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expected=toSigned32bit(expected)
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reg1, reg2, reg3 = randRegs()
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lines = "\n# Testcase " + str(testnum) + ": rs1:x" + str(reg1) + "(" + formatstr.format(a)
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lines = lines + "), imm:"+formatstr.format(b)
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lines = lines + ", result rd:x" + str(reg3) + "(" + formatstr.format(expected) +")\n"
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lines = lines + "li x" + str(reg1) + ", MASK_XLEN(" + formatstr.format(a) + ")\n"
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#lines = lines + "li x" + str(reg2) + ", MASK_XLEN(" + formatstr.format(b) + ")\n"
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lines = lines + test + " x" + str(reg3) + ", x" + str(reg1) + ", SEXT_IMM(" + formatstr.format(b) + ")\n"
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lines = lines + storecmd + " x" + str(reg3) + ", " + str(wordsize*testnum) + "(x6)\n"
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lines = lines + "RVTEST_IO_ASSERT_GPR_EQ(x7, x" + str(reg3) +", "+formatstr.format(expected)+")\n"
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#lines = lines + str(b)+"\n"
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f.write(lines)
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if (xlen == 32):
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line = formatrefstr.format(expected)+"\n"
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else:
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line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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r.write(line)
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testnum = testnum+1
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##################################
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# main body
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##################################
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# change these to suite your tests
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tests = ["ADDIW", "SLLIW", "SRLIW", "SRAIW"]
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author = "Eizabeth Hedenberg"
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xlens = [64]
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shiftlen=5
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addlen=12
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numrand = 100
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# setup
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seed(0) # make tests reproducible
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# generate files for each test
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for xlen in xlens:
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formatstrlen = str(int(xlen/4))
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#formatstrlen6=str(int())
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formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
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#formatstr6 = "0x{:0" + "2" + "x}" # format as xlen-bit hexadecimal number
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formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
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if (xlen == 32):
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storecmd = "sw"
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wordsize = 4
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else:
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storecmd = "sd"
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wordsize = 8
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for test in tests:
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cornersa = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1,
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2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
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#test both confined to top 32 and not
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cornersshift=[0, 1, 2, 2**(shiftlen)-1, 2**(shiftlen)-2, 0b00101, 0b01110]
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#6 bits: 0, 1, 2, largest, largest -1, largest -2, 21, 46
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cornersadd=[0, 1, 2, 2**(addlen-1), 2**(addlen-1)-1, 2**(addlen-1)-2, 2**(addlen-1)+1, 2**(addlen)-2, 2**(addlen)-1, 0b001010010101, 0b101011101111]
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#12 bit, 0, 1, 2 argest positive, largest -1, largest -2, largest negative number, -2, -1, random
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imperaspath = "../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "i/"
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basename = "WALLY-" + test
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fname = imperaspath + "src/" + basename + ".S"
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refname = imperaspath + "references/" + basename + ".reference_output"
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testnum = 0
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# print custom header part
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f = open(fname, "w")
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r = open(refname, "w")
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line = "///////////////////////////////////////////\n"
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f.write(line)
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lines="// "+fname+ "\n// " + author + "\n"
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f.write(lines)
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line ="// Created " + str(datetime.now())
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f.write(line)
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# insert generic header
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h = open("testgen_header.S", "r")
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for line in h:
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f.write(line)
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# print directed and random test vectors
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if test=="ADDIW":
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for a in cornersa:
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for b in cornersadd:
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writeVector(a, b, storecmd)
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for i in range(0,numrand):
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a = getrandbits(xlen)
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b = getrandbits(12)
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writeVector(a, b, storecmd)
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else:
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for a in cornersa:
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for b in cornersshift:
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writeVector(a, b, storecmd)
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for i in range(0,numrand):
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a = getrandbits(xlen)
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b = getrandbits(5)
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writeVector(a, b, storecmd)
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# print footer
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h = open("testgen_footer.S", "r")
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for line in h:
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f.write(line)
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# Finish
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
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f.write(lines)
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f.close()
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r.close()
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260
wally-pipelined/testgen/testgen-JAL.py
Executable file
260
wally-pipelined/testgen/testgen-JAL.py
Executable file
@ -0,0 +1,260 @@
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#!/usr/bin/python3
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##################################
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# testgen-JAL.py
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#
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# Ben Bracker (bbracker@hmc.edu) 19 January 2021
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# Based on testgen-ADD-SUB.py by David Harris
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import choice
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from random import seed
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from random import getrandbits
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from copy import deepcopy
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##################################
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# functions
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##################################
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def InitTestGroup():
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global TestGroup,TestGroupSizes,AllRegs,UnusedRegs,StoreAdrReg
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TestGroup += 1
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TestGroupSizes.append(0)
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UnusedRegs = deepcopy(AllRegs)
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oldStoreAdrReg = StoreAdrReg
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while ((StoreAdrReg == oldStoreAdrReg) or (StoreAdrReg == 0) or (StoreAdrReg == 31)):
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StoreAdrReg = choice(UnusedRegs)
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UnusedRegs.remove(StoreAdrReg)
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f.write("\n # ---------------------------------------------------------------------------------------------\n")
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f.write(" # new register for address of test results\n")
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addInst(" la x"+str(StoreAdrReg)+", test_1_res\n")
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f.write(" # ---------------------------------------------------------------------------------------------\n")
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def registerSelect():
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# ensures that rd experiences all possible registers
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# *** does not yet ensure that rs experiences all possible registers
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# ensures that at least once rd = rs
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global UnusedRegs
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if len(UnusedRegs)==0:
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InitTestGroup()
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rd = choice(UnusedRegs)
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rs = choice(UnusedRegs)
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UnusedRegs.remove(rd)
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OtherRegs = deepcopy(AllRegs)
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OtherRegs.remove(StoreAdrReg)
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OtherRegs.remove(rd)
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try:
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OtherRegs.remove(0)
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except:
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pass
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try:
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OtherRegs.remove(rs)
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except:
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pass
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DataReg = choice(OtherRegs)
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OtherRegs.remove(DataReg)
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OtherRd = choice(OtherRegs)
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return (rd,rs,DataReg,OtherRd)
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def addInst(line):
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global CurrAdr
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f.write(line)
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if ("li x" in line):
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CurrAdr += 8 if (xlen == 32) else 20
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elif ("la x" in line):
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CurrAdr += 8
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else:
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CurrAdr += 4
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def writeForwardsJumpVector(spacers):
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global TestNum
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rd, rs, DataReg, OtherRd = registerSelect()
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if (xlen==64):
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expected = int("fedbca9876540000",16)
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unexpected = int("ffff0000ffff0000",16)
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else:
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expected = int("fedbca98",16)
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unexpected = int("ff00ff00",16)
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f.write("\n")
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f.write(" # Testcase "+str(TestNum)+" address cmp result rd:x"+str(rd)+"("+formatstr.format(CurrAdr+44)+") data result rd:x"+str(DataReg)+"("+formatstr.format(expected)+")\n")
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addInst(" li x"+str(DataReg)+", "+formatstr.format(expected)+"\n")
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addInst(" JAL x"+str(rd)+", 1f\n")
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LinkAdr = CurrAdr if (rd!=0) else 0 # rd's expected value
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for i in range(spacers):
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addInst(" li x"+str(DataReg)+", "+formatstr.format(unexpected)+"\n")
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f.write("1:\n")
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addInst(" "+storecmd+" x"+str(rd)+", "+str(wordsize*(2*TestNum+0))+"(x"+str(StoreAdrReg)+")\n")
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f.write(" RVTEST_IO_ASSERT_GPR_EQ(x"+str(StoreAdrReg+1)+", x"+str(rd)+", "+formatstr.format(LinkAdr)+")\n")
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addInst(" "+storecmd+" x"+str(DataReg)+", "+str(wordsize*(2*TestNum+1))+"(x"+str(StoreAdrReg)+")\n")
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f.write(" RVTEST_IO_ASSERT_GPR_EQ(x"+str(StoreAdrReg+1)+", x"+str(DataReg)+", "+formatstr.format(expected)+")\n")
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writeExpectedToRef(LinkAdr)
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writeExpectedToRef(expected)
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TestNum = TestNum+1
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def writeBackwardsJumpVector(spacers):
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global TestNum
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rd, rs, DataReg,OtherRd = registerSelect()
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if (xlen==64):
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expected = int("fedbca9876540000",16)
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unexpected = int("ffff0000ffff0000",16)
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else:
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expected = int("fedbca98",16)
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unexpected = int("ff00ff00",16)
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f.write("\n")
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f.write(" # Testcase "+str(TestNum)+" address cmp result rd:x"+str(rd)+"("+formatstr.format(CurrAdr+20+8*spacers)+") data result rd:x"+str(DataReg)+"("+formatstr.format(expected)+")\n")
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addInst(" JAL x"+str(OtherRd)+", 2f\n")
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f.write("1:\n")
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addInst(" li x"+str(DataReg)+", "+formatstr.format(expected)+"\n")
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addInst(" JAL x"+str(OtherRd)+", 3f\n")
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f.write("2:\n")
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for i in range(spacers):
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addInst(" li x"+str(DataReg)+", "+formatstr.format(unexpected)+"\n")
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addInst(" JAL x"+str(rd)+", 1b\n")
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LinkAdr = CurrAdr if (rd!=0) else 0 # rd's expected value
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f.write("3:\n")
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addInst(" "+storecmd+" x"+str(rd)+", "+str(wordsize*(2*TestNum+0))+"(x"+str(StoreAdrReg)+")\n")
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f.write(" RVTEST_IO_ASSERT_GPR_EQ(x"+str(StoreAdrReg+1)+", x"+str(rd)+", "+formatstr.format(LinkAdr)+")\n")
|
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addInst(" "+storecmd+" x"+str(DataReg)+", "+str(wordsize*(2*TestNum+1))+"(x"+str(StoreAdrReg)+")\n")
|
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f.write(" RVTEST_IO_ASSERT_GPR_EQ(x"+str(StoreAdrReg+1)+", x"+str(DataReg)+", "+formatstr.format(expected)+")\n")
|
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writeExpectedToRef(LinkAdr)
|
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writeExpectedToRef(expected)
|
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TestNum = TestNum+1
|
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|
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def writeChainVector(repetitions,spacers):
|
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global TestNum
|
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rd, rs, DataReg,OtherRd = registerSelect()
|
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if (xlen==64):
|
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expected = int("fedbca9876540000",16)
|
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unexpected = int("ffff0000ffff0000",16)
|
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else:
|
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expected = int("fedbca98",16)
|
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unexpected = int("ff00ff00",16)
|
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|
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f.write("\n")
|
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f.write(" # Testcase "+str(TestNum)+" address cmp result rd:x"+str(rd)+"(ugh; if you really wanted to, you could figure it out) data result rd:x"+str(DataReg)+"("+formatstr.format(expected)+")\n")
|
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addInst(" li x"+str(DataReg)+", "+formatstr.format(expected)+"\n")
|
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for i in range(repetitions):
|
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addInst(" JAL x"+str(OtherRd)+", "+str(3*i+2)+"f\n")
|
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if spacers:
|
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for j in range(i):
|
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addInst(" li x"+str(DataReg)+", "+formatstr.format(unexpected)+"\n")
|
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f.write(str(3*i+1)+":\n")
|
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addInst(" JAL x"+str(OtherRd)+", "+str(3*i+3)+"f\n")
|
||||
if spacers:
|
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for j in range(i):
|
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addInst(" li x"+str(DataReg)+", "+formatstr.format(unexpected)+"\n")
|
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f.write(str(3*i+2)+":\n")
|
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addInst(" JAL x"+str(rd)+", "+str(3*i+1)+"b\n")
|
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LinkAdr = CurrAdr if (rd!=0) else 0 # rd's expected value
|
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if spacers:
|
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for j in range(i):
|
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addInst(" li x"+str(DataReg)+", "+formatstr.format(unexpected)+"\n")
|
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f.write(str(3*i+3)+":\n")
|
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addInst(" "+storecmd+" x"+str(rd)+", "+str(wordsize*(2*TestNum+0))+"(x"+str(StoreAdrReg)+")\n")
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f.write(" RVTEST_IO_ASSERT_GPR_EQ(x"+str(StoreAdrReg+1)+", x"+str(rd)+", "+formatstr.format(LinkAdr)+")\n")
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addInst(" "+storecmd+" x"+str(DataReg)+", "+str(wordsize*(2*TestNum+1))+"(x"+str(StoreAdrReg)+")\n")
|
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f.write(" RVTEST_IO_ASSERT_GPR_EQ(x"+str(StoreAdrReg+1)+", x"+str(DataReg)+", "+formatstr.format(expected)+")\n")
|
||||
writeExpectedToRef(LinkAdr)
|
||||
writeExpectedToRef(expected)
|
||||
TestNum = TestNum+1
|
||||
|
||||
|
||||
def writeExpectedToRef(expected):
|
||||
global TestGroupSizes
|
||||
TestGroupSizes[TestGroup-1] += 1
|
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if (xlen == 32):
|
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r.write(formatrefstr.format(expected)+"\n")
|
||||
else:
|
||||
r.write(formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32)+"\n")
|
||||
|
||||
##################################
|
||||
# main body
|
||||
##################################
|
||||
|
||||
# change these to suite your tests
|
||||
tests = ["JAL"]
|
||||
author = "Ben Bracker (bbracker@hmc.edu)"
|
||||
xlens = [32,64]
|
||||
numtests = 100;
|
||||
|
||||
# setup
|
||||
seed(0) # make tests reproducible
|
||||
|
||||
# generate files for each test
|
||||
for xlen in xlens:
|
||||
CurrAdr = int("80000108",16)
|
||||
TestNum = 0
|
||||
TestGroup = 1
|
||||
TestGroupSizes = [0]
|
||||
AllRegs = list(range(0,32))
|
||||
UnusedRegs = deepcopy(AllRegs)
|
||||
StoreAdrReg = 6 # matches what's in header script
|
||||
UnusedRegs.remove(6)
|
||||
|
||||
formatstrlen = str(int(xlen/4))
|
||||
formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
|
||||
formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
|
||||
if (xlen == 32):
|
||||
storecmd = "sw"
|
||||
wordsize = 4
|
||||
else:
|
||||
storecmd = "sd"
|
||||
wordsize = 8
|
||||
for test in tests:
|
||||
imperaspath = "../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "i/"
|
||||
basename = "WALLY-" + test
|
||||
fname = imperaspath + "src/" + basename + ".S"
|
||||
refname = imperaspath + "references/" + basename + ".reference_output"
|
||||
|
||||
# print custom header part
|
||||
f = open(fname, "w")
|
||||
r = open(refname, "w")
|
||||
f.write("///////////////////////////////////////////\n")
|
||||
f.write("// "+fname+ "\n")
|
||||
f.write("//\n")
|
||||
f.write("// This file can be used to test the RISC-V JAL instruction.\n")
|
||||
f.write("// But be warned that altering the test environment may break this test!\n")
|
||||
f.write("// In order to work, this test expects that the first instruction (la)\n")
|
||||
f.write("// be allocated at 0x80000100.\n")
|
||||
f.write("//\n")
|
||||
f.write("// " + author + "\n")
|
||||
f.write("// Created "+str(datetime.now())+"\n")
|
||||
|
||||
# insert generic header
|
||||
h = open("testgen_header.S", "r")
|
||||
for line in h:
|
||||
f.write(line)
|
||||
|
||||
# print directed test vectors
|
||||
for i in range(0,31):
|
||||
writeForwardsJumpVector(randint(0,4))
|
||||
for i in range(0,31):
|
||||
writeBackwardsJumpVector(randint(0,4))
|
||||
writeForwardsJumpVector(100)
|
||||
writeBackwardsJumpVector(100)
|
||||
writeChainVector(6,True)
|
||||
writeChainVector(16,False)
|
||||
|
||||
# print footer
|
||||
h = open("testgen_footer.S", "r")
|
||||
for line in h:
|
||||
f.write(line)
|
||||
|
||||
# Finish
|
||||
f.write(".fill "+str(sum(TestGroupSizes))+", "+str(wordsize)+", -1\n")
|
||||
f.write("\nRV_COMPLIANCE_DATA_END\n")
|
||||
f.close()
|
||||
r.close()
|
||||
|
||||
|
||||
|
||||
|
||||
@ -18,15 +18,56 @@ from random import randint, seed, getrandbits
|
||||
##################################
|
||||
|
||||
def rand_reg():
|
||||
"""Produce a random register (skipping 6, since r6 is used for other things"""
|
||||
r = randint(1,30)
|
||||
"""Produce a random register (skipping 6 and 31, since they're used for other things)"""
|
||||
r = randint(1,29)
|
||||
if r >= 6:
|
||||
r += 1
|
||||
return r
|
||||
|
||||
def rand_value(width):
|
||||
"""Generate a random value which fits in the given width"""
|
||||
return randint(0, (1 << width) - 1)
|
||||
|
||||
def rand_offset():
|
||||
"""Generate a random offset"""
|
||||
ret = rand_value(12)
|
||||
# print("Random offset: %d" % ret)
|
||||
return ret
|
||||
|
||||
def rand_source():
|
||||
"""Generate a random value for the source register, such that the load address is in the test data"""
|
||||
ret = randint(1 << 12, (1 << 12) + (1 << 10))
|
||||
# print("Random source: %d" % ret)
|
||||
return ret
|
||||
|
||||
def add_offset_to_source(source, offset):
|
||||
"""Find the address from the given source value and offset"""
|
||||
if offset & 0x800:
|
||||
offset -= 0x1000
|
||||
return source + offset
|
||||
|
||||
def insert_into_data(test_data, source, offset, value, width, xlen):
|
||||
"""Insert the given value into the given location of the test data"""
|
||||
address = add_offset_to_source(source, offset)
|
||||
# print("Test #%d" % testcase_num)
|
||||
# print(f"Source: {source}, Offset: {offset}, Value: {value}, Width: {width}, xlen: {xlen}, Addr: {address}")
|
||||
if address < 0:
|
||||
return False
|
||||
word_offset = address % (xlen // 8)
|
||||
word_address = address - word_offset
|
||||
if word_address in test_data:
|
||||
return False
|
||||
test_data[word_address] = value * (1 << (word_offset*8)) + ((~(((1 << width)-1) << (word_offset*8))) & rand_value(xlen))
|
||||
# print(f"Word: {hex(test_data[word_address])}")
|
||||
return True
|
||||
|
||||
def align(address, width):
|
||||
"""Align the address to the given width, in bits"""
|
||||
return address - (address % (width // 8))
|
||||
|
||||
testcase_num = 0
|
||||
def generate_case(xlen, instruction, load_register, source_register, source_register_value, offset, expected):
|
||||
"""Produce the specified test case and return it as a string"""
|
||||
"""Produce the specified test case and return it as a pair of strings, where the first is the test case and the second is the output"""
|
||||
global testcase_num
|
||||
if xlen == 64:
|
||||
store = "sd"
|
||||
@ -36,35 +77,89 @@ def generate_case(xlen, instruction, load_register, source_register, source_regi
|
||||
store = "sw"
|
||||
else:
|
||||
raise Exception("Unknown xlen value: %s" % xlen)
|
||||
data = f"""# Testcase {testcase_num}: source {offset}(x{source_register} == {source_register_value}), rresult: x{load_register} == {expected}
|
||||
if offset >= 0x800:
|
||||
offset -= 0x1000
|
||||
if widths[instruction] != xlen:
|
||||
expected = expected % (1 << widths[instruction])
|
||||
if 'u' not in instruction:
|
||||
if expected & (1 << (widths[instruction] - 1)):
|
||||
expected = (expected + ~((1 << widths[instruction]) - 1)) & ((1 << xlen) - 1)
|
||||
data = f"""# Testcase {testcase_num}: source {offset}(x{source_register} == {source_register_value}), result: x{load_register} == {expected}
|
||||
la x31, test_data
|
||||
lui x{source_register}, {source_register_value // (1 << 12)}
|
||||
addi x{source_register}, x{source_register}, {source_register_value % (1 << 12)}
|
||||
add x{source_register}, x{source_register}, x31
|
||||
{instruction} x{load_register}, {offset}(x{source_register})
|
||||
{store} x{load_register}, {testcase_num}(x6)
|
||||
{store} x{load_register}, {(testcase_num*xlen//8) % 0x800}(x6)
|
||||
RVTEST_IO_ASSERT_GPR_EQ(x8, x{load_register}, {expected})
|
||||
|
||||
"""
|
||||
testcase_num += 1
|
||||
return data
|
||||
if testcase_num*xlen//8 % 0x800 == 0:
|
||||
data += "# Adjust x6 because we're storing too many things\naddi x6, x6, 1024\naddi x6, x6, 1024\n\n"
|
||||
if xlen == 32:
|
||||
reference_output = "{:08x}\n".format(expected)
|
||||
elif xlen == 64:
|
||||
reference_output = "{:08x}\n{:08x}\n".format(expected % (1 << 32), expected >> 32)
|
||||
return (data, reference_output)
|
||||
|
||||
def write_header(outfile):
|
||||
outfile.write(f"""///////////////////////////////////////////
|
||||
//
|
||||
// WALLY-LOAD
|
||||
//
|
||||
// Author: f{author}
|
||||
//
|
||||
// Created {str(datetime.now())}
|
||||
//
|
||||
///////////////////////////////////////////
|
||||
|
||||
""")
|
||||
//
|
||||
// WALLY-LOAD
|
||||
//
|
||||
// Author: {author}
|
||||
//
|
||||
// Created {str(datetime.now())}
|
||||
//
|
||||
""")
|
||||
outfile.write(open("testgen_header.S", "r").read())
|
||||
|
||||
def write_test_data(outfile, test_data, xlen):
|
||||
# print("Begin writing test data:")
|
||||
# print("{} entries, from address {} to {}".format(len(test_data), min(test_data.keys()), max(test_data.keys())))
|
||||
# print(test_data)
|
||||
outfile.write("""
|
||||
.align 16
|
||||
test_data:
|
||||
|
||||
""")
|
||||
if xlen == 32:
|
||||
data_word = ".word"
|
||||
elif xlen == 64:
|
||||
data_word = ".dword"
|
||||
else:
|
||||
raise Exception("Unknown xlen: %d" % xlen)
|
||||
byte_width = xlen // 8
|
||||
for addr in [0] + sorted(test_data.keys()):
|
||||
if addr in test_data:
|
||||
word = f" {data_word} {hex(test_data[addr] % (1 << xlen))} # test_data+{hex(addr)}\n"
|
||||
else:
|
||||
word = ""
|
||||
try:
|
||||
fill_len = (min(k for k in test_data.keys() if k > addr) - addr) // byte_width - 1
|
||||
if word == "":
|
||||
fill_len += 1
|
||||
fill = f" .fill {fill_len}, {byte_width}, 0x0\n"
|
||||
except:
|
||||
fill = ""
|
||||
case = word+fill
|
||||
outfile.write(case)
|
||||
|
||||
##################################
|
||||
# main body
|
||||
##################################
|
||||
|
||||
instructions = ["lb", "lbu", "lh", "lhu", "lw", "lwu", "ld"]
|
||||
widths = {
|
||||
"lb": 8,
|
||||
"lbu": 8,
|
||||
"lh": 16,
|
||||
"lhu": 16,
|
||||
"lw": 32,
|
||||
"lwu": 32,
|
||||
"ld": 64,
|
||||
}
|
||||
instructions = [i for i in widths]
|
||||
author = "Jarred Allen"
|
||||
xlens = [32, 64]
|
||||
numrand = 100;
|
||||
@ -73,16 +168,60 @@ numrand = 100;
|
||||
seed(0) # make tests reproducible
|
||||
|
||||
for xlen in xlens:
|
||||
testcase_num = 0
|
||||
fname = "../../imperas-riscv-tests/riscv-test-suite/rv{}i/src/WALLY-LOAD.S".format(xlen)
|
||||
refname = "../../imperas-riscv-tests/riscv-test-suite/rv{}i/references/WALLY-LOAD.S.reference_output".format(xlen)
|
||||
refname = "../../imperas-riscv-tests/riscv-test-suite/rv{}i/references/WALLY-LOAD.reference_output".format(xlen)
|
||||
f = open(fname, "w")
|
||||
r = open(refname, "w")
|
||||
write_header(f)
|
||||
test_data = dict()
|
||||
corner_values = [0x00, 0xFF, 0xFFFF, 0xFFFFFFFF, 0x7F, 0x7FFF, 0x7FFFFFFF, 0x01]
|
||||
corner_values = [0x00, 0xFFFFFFFF, 0x7F, 0x7FFF, 0x7FFFFFFF]
|
||||
if xlen == 64:
|
||||
corner_values += [0xFFFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFF]
|
||||
corner_offsets = [0x800, 0x000, 0x7FF]
|
||||
for instruction in instructions:
|
||||
print("Running xlen: %d, instruction: %s" % (xlen, instruction))
|
||||
if xlen == 32:
|
||||
if instruction in ["lwu", "ld"]:
|
||||
continue
|
||||
for value in corner_values + [rand_value(widths[instruction]) for _ in range(3)]:
|
||||
value = value % (1 << widths[instruction])
|
||||
source_reg = rand_source()
|
||||
for offset in corner_offsets + [rand_offset() for _ in range(3)]:
|
||||
offset = align(offset, widths[instruction])
|
||||
source_reg = align(source_reg, widths[instruction])
|
||||
if insert_into_data(test_data, source_reg, offset, value, widths[instruction], xlen):
|
||||
data, output = generate_case(xlen, instruction, rand_reg(), rand_reg(), source_reg, offset, value)
|
||||
f.write(data)
|
||||
r.write(output)
|
||||
while testcase_num % 4:
|
||||
source = rand_source()
|
||||
offset = rand_offset()
|
||||
value = rand_value(widths[instruction])
|
||||
if insert_into_data(test_data, source, offset, value, widths['lb'], xlen):
|
||||
data, output = generate_case(xlen, 'lb', rand_reg(), rand_reg(), source, offset, value)
|
||||
f.write(data)
|
||||
r.write(output)
|
||||
f.write("""# ---------------------------------------------------------------------------------------------
|
||||
|
||||
RVTEST_IO_WRITE_STR(x31, "Test End\\n")
|
||||
|
||||
# ---------------------------------------------------------------------------------------------
|
||||
|
||||
RV_COMPLIANCE_HALT
|
||||
|
||||
RV_COMPLIANCE_CODE_END
|
||||
|
||||
.data
|
||||
# Input data section
|
||||
""")
|
||||
write_test_data(f, test_data, xlen)
|
||||
f.write("""# Output data section.
|
||||
RV_COMPLIANCE_DATA_BEGIN
|
||||
|
||||
test_1_res:
|
||||
""")
|
||||
f.write(f".fill {testcase_num}, {xlen//8}, -1\n")
|
||||
f.write("\nRV_COMPLIANCE_DATA_END\n")
|
||||
f.close()
|
||||
r.close()
|
||||
|
||||
282
wally-pipelined/testgen/testgen-STORE.py
Executable file
282
wally-pipelined/testgen/testgen-STORE.py
Executable file
@ -0,0 +1,282 @@
|
||||
#!/usr/bin/python3
|
||||
##################################
|
||||
# testgen-STORE.py
|
||||
#
|
||||
# Jessica Torrey <jtorrey@hmc.edu> 03 February 2021
|
||||
# Thomas Fleming <tfleming@hmc.edu> 03 February 2021
|
||||
#
|
||||
# Generate directed and random test vectors for RISC-V Design Validation.
|
||||
##################################
|
||||
|
||||
##################################
|
||||
# libraries
|
||||
##################################
|
||||
from datetime import datetime
|
||||
from random import randint, seed, getrandbits
|
||||
from textwrap import dedent
|
||||
|
||||
##################################
|
||||
# global structures
|
||||
##################################
|
||||
size_to_store = {8: "sd", 4: "sw", 2: "sh", 1: "sb"}
|
||||
size_to_load = {8: "ld", 4: "lw", 2: "lh", 1: "lb"}
|
||||
store_to_size = {"sd": 8, "sw": 4, "sh": 2, "sb": 1}
|
||||
testcase_num = 0
|
||||
signature_len = 2000
|
||||
signature = [0xff for _ in range(signature_len)]
|
||||
|
||||
##################################
|
||||
# functions
|
||||
##################################
|
||||
|
||||
def rand_reg():
|
||||
"""
|
||||
Produce a random register from 1 to 31 (skipping 6, since r6 is used for
|
||||
other things).
|
||||
"""
|
||||
r = randint(1,30)
|
||||
if r >= 6:
|
||||
r += 1
|
||||
return r
|
||||
|
||||
def rand_regs():
|
||||
"""
|
||||
Generate two random, unequal register numbers (skipping x6).
|
||||
"""
|
||||
rs1 = rand_reg()
|
||||
rs2 = rand_reg()
|
||||
while rs1 == rs2:
|
||||
rs2 = rand_reg()
|
||||
|
||||
return rs1, rs2
|
||||
|
||||
def generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta):
|
||||
"""
|
||||
Create assembly code for a given STORE test case, returned as a string.
|
||||
|
||||
Generates an `xlen`-bit test case for `instruction` (one of sb, sh, sw, or
|
||||
sd) that loads `value` into `value_register`, then attempts to store that
|
||||
value in memory at address (x6 + `base_delta`). The test case
|
||||
assumes the current base address for the signature is in register x6.
|
||||
|
||||
The form of the STORE instruction is as follows:
|
||||
|
||||
`instruction` `value_register` `offset`(`addr_register`)
|
||||
"""
|
||||
global testcase_num
|
||||
|
||||
hex_value = f"{value:0{xlen // 4}x}"
|
||||
|
||||
data = f"""# Testcase {testcase_num}: source: x{value_register} (value 0x{hex_value}), destination: {offset}(x{addr_register}) ({base_delta} bytes into signature)
|
||||
addi x{addr_register}, x6, {base_delta}
|
||||
li x{value_register}, MASK_XLEN({-offset})
|
||||
add x{addr_register}, x{addr_register}, x{value_register}
|
||||
li x{value_register}, 0x{hex_value}
|
||||
{instruction} x{value_register}, {offset}(x{addr_register})
|
||||
"""
|
||||
|
||||
update_signature(store_to_size[instruction], value, base_delta)
|
||||
|
||||
testcase_num += 1
|
||||
return data
|
||||
|
||||
def validate_memory(scratch_register, value_register, value, base_delta, length):
|
||||
"""
|
||||
Create assembly code to verify that `length` bytes at mem[x6 + `base_delta`]
|
||||
store `value`.
|
||||
|
||||
Assumes x6 stores the current base address for the signature.
|
||||
"""
|
||||
truncated_value = value & (2**(length * 8) - 1)
|
||||
hex_value = f"{truncated_value:0{length * 2}x}"
|
||||
|
||||
load = size_to_load[length]
|
||||
data = f"""addi x{scratch_register}, x6, {base_delta}
|
||||
{load} x{value_register}, 0(x{scratch_register})
|
||||
RVTEST_IO_ASSERT_GPR_EQ(x{scratch_register}, x{value_register}, 0x{hex_value})
|
||||
|
||||
"""
|
||||
return data
|
||||
|
||||
def update_signature(length, value, base_delta):
|
||||
"""
|
||||
Write the lower `length` bytes of `value` to the little-endian signature
|
||||
array, starting at byte `base_delta`.
|
||||
"""
|
||||
truncated_value = value & (2**(length * 8) - 1)
|
||||
value_bytes = truncated_value.to_bytes(length, 'little')
|
||||
#print("n: {}, value: {:x}, trunc: {:x}, length: {}, bd: {:x}".format(testcase_num, value, truncated_value, length, base_delta))
|
||||
for i in range(length):
|
||||
signature[base_delta + i] = value_bytes[i]
|
||||
|
||||
def write_signature(outfile):
|
||||
"""
|
||||
Writes successive 32-bit words from the signature array into a given file.
|
||||
"""
|
||||
for i in range(0, signature_len, 4):
|
||||
word = list(reversed(signature[i:i+4]))
|
||||
hexword = bytearray(word).hex()
|
||||
outfile.write(f"{hexword}\n")
|
||||
|
||||
def write_header(outfile):
|
||||
"""
|
||||
Write the name of the test file, authors, and creation date.
|
||||
"""
|
||||
outfile.write(dedent(f"""\
|
||||
///////////////////////////////////////////
|
||||
//
|
||||
// WALLY-STORE
|
||||
//
|
||||
// Author: {author}
|
||||
//
|
||||
// Created {str(datetime.now())}
|
||||
"""))
|
||||
outfile.write(open("testgen_header.S", "r").read())
|
||||
|
||||
def write_footer(outfile):
|
||||
"""
|
||||
Write necessary closing code, including a data section for the signature.
|
||||
"""
|
||||
outfile.write(open("testgen_footer.S", 'r').read())
|
||||
data_section = dedent(f"""\
|
||||
\t.fill {signature_len}, 1, -1
|
||||
RV_COMPLIANCE_DATA_END
|
||||
""")
|
||||
outfile.write(data_section)
|
||||
|
||||
##################################
|
||||
# test cases
|
||||
##################################
|
||||
|
||||
def write_basic_tests(outfile, xlen, instr_len, num, base_delta):
|
||||
"""
|
||||
Test basic functionality of STORE, using random registers, offsets, and
|
||||
values.
|
||||
|
||||
Creates `num` tests for a single store instruction of length `instr_len`,
|
||||
writing to memory at consecutive locations, starting `base_delta` bytes from
|
||||
the start of the signature.
|
||||
|
||||
Returns the number of bytes from the start of the signature where testing
|
||||
ended.
|
||||
"""
|
||||
instruction = size_to_store[instr_len]
|
||||
for i in range(num):
|
||||
value_register, addr_register = rand_regs()
|
||||
offset = randint(-2**(12 - 1), 2**(12 - 1) - 1)
|
||||
value = randint(0, 2**(instr_len * 8) - 1)
|
||||
test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
|
||||
validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
|
||||
outfile.write(test)
|
||||
outfile.write(validate)
|
||||
base_delta += instr_len
|
||||
return base_delta
|
||||
|
||||
def write_random_store_tests(outfile, xlen, instr_len, num, min_base_delta):
|
||||
"""
|
||||
Test random access of STORE, using random registers, offsets, values, and
|
||||
memory locations.
|
||||
|
||||
Creates `num` tests for a single store instruction of length `instr_len`,
|
||||
writing to memory at random locations between `min_base_delta` bytes past
|
||||
the start of the signature to the end of the signature.
|
||||
"""
|
||||
instruction = size_to_store[instr_len]
|
||||
for i in range(num):
|
||||
base_delta = randint(min_base_delta, signature_len - 1)
|
||||
base_delta -= (base_delta % instr_len)
|
||||
value_register, addr_register = rand_regs()
|
||||
offset = randint(-2**(12 - 1), 2**(12 - 1) - 1)
|
||||
value = randint(0, 2**(instr_len * 8) - 1)
|
||||
|
||||
test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
|
||||
validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
|
||||
outfile.write(test)
|
||||
outfile.write(validate)
|
||||
|
||||
def write_repeated_store_tests(outfile, xlen, instr_len, num, base_delta):
|
||||
"""
|
||||
Test repeated access of STORE, using random registers, offsets, values, and a
|
||||
single memory location.
|
||||
|
||||
Creates `num` tests for a single store instruction of length `instr_len`,
|
||||
writing to memory `base_delta` bytes past the start of the signature.
|
||||
"""
|
||||
instruction = size_to_store[instr_len]
|
||||
for i in range(num):
|
||||
value_register, addr_register = rand_regs()
|
||||
offset = 0
|
||||
value = (1 << ((2 * i) % xlen))
|
||||
|
||||
test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
|
||||
validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
|
||||
|
||||
outfile.write(test)
|
||||
outfile.write(validate)
|
||||
|
||||
def write_corner_case_tests(outfile, xlen, instr_len, base_delta):
|
||||
instruction = size_to_store[instr_len]
|
||||
|
||||
corner_cases_32 = [0x0, 0x10000001, 0x01111111]
|
||||
corner_cases_64 = [0x1000000000000001, 0x0111111111111111]
|
||||
corner_cases = corner_cases_32
|
||||
if xlen == 64:
|
||||
corner_cases += corner_cases_64
|
||||
|
||||
for offset in corner_cases:
|
||||
for value in corner_cases:
|
||||
value_register, addr_register = rand_regs()
|
||||
test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
|
||||
validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
|
||||
|
||||
outfile.write(test)
|
||||
outfile.write(validate)
|
||||
|
||||
base_delta += instr_len
|
||||
|
||||
return base_delta
|
||||
|
||||
##################################
|
||||
# main body
|
||||
##################################
|
||||
|
||||
instructions = ["sd", "sw", "sh", "sb"]
|
||||
author = "Jessica Torrey <jtorrey@hmc.edu> & Thomas Fleming <tfleming@hmc.edu>"
|
||||
xlens = [32, 64]
|
||||
numrand = 100
|
||||
|
||||
# setup
|
||||
seed(0) # make tests reproducible
|
||||
|
||||
for xlen in xlens:
|
||||
if (xlen == 32):
|
||||
wordsize = 4
|
||||
else:
|
||||
wordsize = 8
|
||||
|
||||
fname = f"../../imperas-riscv-tests/riscv-test-suite/rv{xlen}i/src/WALLY-STORE.S"
|
||||
refname = f"../../imperas-riscv-tests/riscv-test-suite/rv{xlen}i/references/WALLY-STORE.reference_output"
|
||||
f = open(fname, "w")
|
||||
r = open(refname, "w")
|
||||
|
||||
write_header(f)
|
||||
|
||||
base_delta = 0
|
||||
|
||||
for instruction in instructions:
|
||||
if xlen == 32 and instruction == 'sd':
|
||||
continue
|
||||
instr_len = store_to_size[instruction]
|
||||
base_delta = write_basic_tests(f, xlen, instr_len, 5, base_delta)
|
||||
write_repeated_store_tests(f, xlen, instr_len, 32, base_delta)
|
||||
write_random_store_tests(f, xlen, instr_len, 5, base_delta + wordsize)
|
||||
|
||||
write_footer(f)
|
||||
|
||||
write_signature(r)
|
||||
f.close()
|
||||
r.close()
|
||||
|
||||
# Reset testcase_num and signature
|
||||
testcase_num = 0
|
||||
signature = [0xff for _ in range(signature_len)]
|
||||
Loading…
Reference in New Issue
Block a user