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ZK simplifcations

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This commit is contained in:
David Harris 2024-03-10 21:44:11 -07:00
parent d0dd30822e
commit 837abf1d9e
3 changed files with 17 additions and 63 deletions
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48
src/ieu/aes_instructions/rconlut128.sv
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@ -1,48 +0,0 @@
///////////////////////////////////////////
// rconlut128.sv
//
// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
// Created: 20 February 2024
//
// Purpose: aes64ks1i instruction
//
// A component of the CORE-V-WALLY configurable RISC-V project.
// https://github.com/openhwgroup/cvw
//
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
//
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
//
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
// may obtain a copy of the License at
//
// https://solderpad.org/licenses/SHL-2.1/
//
// Unless required by applicable law or agreed to in writing, any work distributed under the
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
// either express or implied. See the License for the specific language governing permissions
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module rconlut128(
input logic [3:0] RD,
output logic [7:0] rconOut
);
always_comb
case(RD)
4'h0 : rconOut = 8'h01;
4'h1 : rconOut = 8'h02;
4'h2 : rconOut = 8'h04;
4'h3 : rconOut = 8'h08;
4'h4 : rconOut = 8'h10;
4'h5 : rconOut = 8'h20;
4'h6 : rconOut = 8'h40;
4'h7 : rconOut = 8'h80;
4'h8 : rconOut = 8'h1b;
4'h9 : rconOut = 8'h36;
4'hA : rconOut = 8'h00;
default : rconOut = 8'h00;
endcase
endmodule

26
src/ieu/kmu/zbkx.sv
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@ -31,18 +31,20 @@ module zbkx #(parameter WIDTH=32) (
output logic [WIDTH-1:0] ZBKXResult output logic [WIDTH-1:0] ZBKXResult
); );
logic [WIDTH-1:0] xpermlookup; logic [WIDTH-1:0] xperm4, xperm4lookup;
logic [WIDTH-1:0] xperm8, xperm8lookup;
int i; int i;
always_comb always_comb begin
if (ZBKXSelect[0]) for(i=0; i<WIDTH; i=i+4) begin: xperm4calc
for(i=0; i<WIDTH; i=i+4) begin: xperm4 xperm4lookup = A >> {B[i+:4], 2'b0};
xpermlookup = A >> {B[i+:4], 2'b0}; xperm4[i+:4] = xperm4lookup[3:0];
ZBKXResult[i+:4] = xpermlookup[3:0]; end
end for(i=0; i<WIDTH; i=i+8) begin: xperm8calc
else xperm8lookup = A >> {B[i+:8], 3'b0};
for(i=0; i<WIDTH; i=i+8) begin: xperm8 xperm8[i+:8] = xperm8lookup[7:0];
xpermlookup = A >> {B[i+:8], 3'b0}; end
ZBKXResult[i+:8] = xpermlookup[7:0]; end
end
assign ZBKXResult = ZBKXSelect[0] ? xperm4 : xperm8;
endmodule endmodule

6
src/ieu/kmu/zipper.sv
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@ -35,9 +35,9 @@ module zipper #(parameter WIDTH=64) (
genvar i; genvar i;
for (i=0; i<WIDTH/2; i+=1) begin: loop for (i=0; i<WIDTH/2; i+=1) begin: loop
assign zip[2*i] = A[i]; assign zip[2*i] = A[i];
assign zip [2*i+1] = A[i + WIDTH/2]; assign zip[2*i+1] = A[i + WIDTH/2];
assign unzip[i] = A[2*i]; assign unzip[i] = A[2*i];
assign unzip[i+WIDTH/2] = A[2*i+1]; assign unzip[i+WIDTH/2] = A[2*i+1];
end end