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	Remove remaining mentions of opam
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				@ -317,9 +317,7 @@ fi
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# Sail is a formal specification language designed for describing the semantics of an ISA.
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					# Sail is a formal specification language designed for describing the semantics of an ISA.
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# It is used to generate the RISC-V Sail Model, which is the golden reference model for RISC-V.
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					# It is used to generate the RISC-V Sail Model, which is the golden reference model for RISC-V.
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# The Sail Compiler is written in OCaml, which is an object-oriented extension of ML, which in turn
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					# The Sail Compiler is written in OCaml, which is an object-oriented extension of ML, which in turn
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# is a functional programming language suited to formal verification. The Sail compiler is installed
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					# is a functional programming language suited to formal verification.
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# with the opam OCaml package manager. It has so many dependencies that it can be difficult to install,
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# but a binary release of it should be available soon, removing the need to use opam.
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section_header "Installing/Updating Sail Compiler"
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					section_header "Installing/Updating Sail Compiler"
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STATUS="Sail Compiler"
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					STATUS="Sail Compiler"
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if [ ! -e "$RISCV"/bin/sail ]; then
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					if [ ! -e "$RISCV"/bin/sail ]; then
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@ -336,7 +334,6 @@ STATUS="RISC-V Sail Model"
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if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then
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					if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then
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    cd sail-riscv
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					    cd sail-riscv
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    git reset --hard && git clean -f && git checkout master && git pull
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					    git reset --hard && git clean -f && git checkout master && git pull
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    export OPAMCLI=2.0  # Sail is not compatible with opam 2.1 as of 4/16/24
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    ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64  2>&1 | logger sailModel; [ "${PIPESTATUS[0]}" == 0 ]
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					    ARCH=RV64 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV64  2>&1 | logger sailModel; [ "${PIPESTATUS[0]}" == 0 ]
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    ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger sailModel; [ "${PIPESTATUS[0]}" == 0 ]
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					    ARCH=RV32 make -j "${NUM_THREADS}" c_emulator/riscv_sim_RV32 2>&1 | logger sailModel; [ "${PIPESTATUS[0]}" == 0 ]
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    cp -f c_emulator/riscv_sim_RV64 "$RISCV"/bin/riscv_sim_RV64
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					    cp -f c_emulator/riscv_sim_RV64 "$RISCV"/bin/riscv_sim_RV64
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@ -344,7 +341,6 @@ if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/
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    if [ "$clean" ]; then
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					    if [ "$clean" ]; then
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        cd "$RISCV"
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					        cd "$RISCV"
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        rm -rf sail-riscv
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					        rm -rf sail-riscv
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        rm -rf opam
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    fi
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					    fi
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    echo -e "${SUCCESS_COLOR}RISC-V Sail Model successfully installed/updated!${ENDC}"
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					    echo -e "${SUCCESS_COLOR}RISC-V Sail Model successfully installed/updated!${ENDC}"
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else
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					else
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