From 827f986fae34079ac5ccc5ca06a1e7359bffe05b Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Tue, 5 Nov 2024 16:01:08 -0600 Subject: [PATCH] This configuration of the vcu108 actually seems to work. --- fpga/constraints/constraints-vcu108.xdc | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/fpga/constraints/constraints-vcu108.xdc b/fpga/constraints/constraints-vcu108.xdc index a25eae2aa..2fb191e6c 100644 --- a/fpga/constraints/constraints-vcu108.xdc +++ b/fpga/constraints/constraints-vcu108.xdc @@ -95,9 +95,8 @@ set_input_delay -clock [get_clocks SPISDCClock] -max 5.0 [get_ports {SDCWP}] set_input_delay -clock [get_clocks SPISDCClock] -min -5.0 [get_ports {SDCWP}] set_output_delay -clock [get_clocks SPISDCClock] -max 5.0 [get_ports {SDCCmd}] set_output_delay -clock [get_clocks SPISDCClock] -min -5.0 [get_ports {SDCCmd}] -#create_generated_clock -name SPISDCClockOut -multiply_by 1 -source [get_pins sdcclkoddr/C] [get_ports SDCCLK] -set_clock_latency -source -max 3.0 [get_ports SDCCLK] -#set_output_delay -clock [get_clocks SPISDCClock] 0.000 [get_ports SDCCLK] +set_output_delay -clock [get_clocks SPISDCClock] -max 2.000 [get_ports SDCCLK] +set_output_delay -clock [get_clocks SPISDCClock] -min -2.000 [get_ports SDCCLK] set_property -dict {PACKAGE_PIN BC14 IOSTANDARD LVCMOS18 PULLUP true} [get_ports {SDCCS}]