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Added spoof of uart addresses +0x2 and +0x6.
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@ -475,7 +475,7 @@ module testbench;
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end \
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if(`"STAGE`"=="M") begin \
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// override on special conditions \
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if (dut.core.lsu.LSUPAdrM == 'h10000005) \
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if ((dut.core.lsu.LSUPAdrM == 'h10000002) | (dut.core.lsu.LSUPAdrM == 'h10000005) | (dut.core.lsu.LSUPAdrM == 'h10000006)) \
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//$display("%tns, %d instrs: Overwrite UART's LSR in memory stage.", $time, InstrCountW-1); \
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force dut.core.ieu.dp.ReadDataM = ExpectedMemReadDataM; \
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else \
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