Added spoof of uart addresses +0x2 and +0x6.

This commit is contained in:
Ross Thompson 2022-03-22 16:52:27 -05:00
parent cec7625d91
commit 80d376877a

View File

@ -475,7 +475,7 @@ module testbench;
end \
if(`"STAGE`"=="M") begin \
// override on special conditions \
if (dut.core.lsu.LSUPAdrM == 'h10000005) \
if ((dut.core.lsu.LSUPAdrM == 'h10000002) | (dut.core.lsu.LSUPAdrM == 'h10000005) | (dut.core.lsu.LSUPAdrM == 'h10000006)) \
//$display("%tns, %d instrs: Overwrite UART's LSR in memory stage.", $time, InstrCountW-1); \
force dut.core.ieu.dp.ReadDataM = ExpectedMemReadDataM; \
else \