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Improved fpga synth script.

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This commit is contained in:
Rose Thompson 2024-08-27 15:50:05 -07:00
parent e5d3462a90
commit 7e16ddd859
2 changed files with 7 additions and 4 deletions
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3
fpga/constraints/marked_debug.txt
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@ -17,3 +17,6 @@ uncore/spi_apb.sv: logic SPIOut
uncore/spi_apb.sv: logic SPICS uncore/spi_apb.sv: logic SPICS
uncore/spi_apb.sv: logic SckMode uncore/spi_apb.sv: logic SckMode
uncore/spi_apb.sv: logic SckDiv uncore/spi_apb.sv: logic SckDiv
uncore/spi_apb.sv: logic ShiftEdge
uncore/spi_apb.sv: logic TransmitShiftRegLoad
uncore/spi_apb.sv: logic TransmitShiftReg

8
fpga/generator/wally.tcl
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@ -10,10 +10,10 @@ set board $::env(board)
#set boardSubName arty-a7-100 #set boardSubName arty-a7-100
#set board ArtyA7 #set board ArtyA7
set partNumber xcvu095-ffva2104-2-e #set partNumber xcvu095-ffva2104-2-e
set boardName xilinx.com:vcu108:part0:1.7 #set boardName xilinx.com:vcu108:part0:1.7
set boardSubName vcu108 #set boardSubName vcu108
set board FPU_VCU #set board FPU_VCU
set ipName WallyFPGA set ipName WallyFPGA