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Simplified Shifter Right input

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David Harris 2021-12-18 10:21:17 -08:00
parent 27ec8ff893
commit 7e026f3e78
1 changed files with 2 additions and 2 deletions
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wally-pipelined/src/ieu/alu.sv
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@ -51,8 +51,8 @@ module alu #(parameter WIDTH=32) (
assign {Carry, Sum} = A + CondInvB + {{(WIDTH-1){1'b0}}, SubArith};
// Shifts
assign Right = (Funct3[2:0] == 3'b101); // sra or srl
shifter sh(A, B[5:0], Right, SubArith, W64, Shift);
assign Right = Funct3[2]; // sra or srl
shifter sh(A, B[`LOG_XLEN-1:0], Right, SubArith, W64, Shift);
// condition code flags based on add/subtract output
// Overflow occurs when the numbers being added have the same sign