From 6515c0b9ed5ea464cfd889cb2649cb7d683b4783 Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Wed, 28 Apr 2021 20:01:05 -0400 Subject: [PATCH 01/12] Add mmu waves (commented) to busybear --- wally-pipelined/regression/busy-mmu.do | 5203 ++++++++++++++++++ wally-pipelined/regression/wally-busybear.do | 2 + 2 files changed, 5205 insertions(+) create mode 100644 wally-pipelined/regression/busy-mmu.do diff --git a/wally-pipelined/regression/busy-mmu.do b/wally-pipelined/regression/busy-mmu.do new file mode 100644 index 000000000..0a5d8bf92 --- /dev/null +++ b/wally-pipelined/regression/busy-mmu.do @@ -0,0 +1,5203 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /testbench_busybear/clk +add wave -noupdate /testbench_busybear/reset +add wave -noupdate -divider +add wave -noupdate -radix hexadecimal /testbench_busybear/PCtext +add wave -noupdate -radix hexadecimal /testbench_busybear/pcExpected +add wave -noupdate /testbench_busybear/dut/hart/ifu/PCNextF +add wave -noupdate /testbench_busybear/dut/hart/ifu/PCF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCD +add wave -noupdate /testbench_busybear/dut/hart/ieu/PCE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrD +add wave -noupdate /testbench_busybear/dut/hart/ifu/StallF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushE +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/PhysicalAddress +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/Translate +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/TLBHit +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/PhysicalAddressFull +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/PhysicalPageNumberMixed +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/HitPageType +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/cam/WriteIndex +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/lru/WriteIndex +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/lru/RUBits +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/lru/VPNIndex +add wave -noupdate /testbench_busybear/dut/hart/ifu/itlb/cam/Matches +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrRawD +add wave -noupdate /testbench_busybear/dut/hart/ifu/ic/InstrDMuxChoice +add wave -noupdate /testbench_busybear/dut/hart/ifu/ic/AlignedInstrD +add wave -noupdate /testbench_busybear/dut/hart/ifu/ic/InstrF +add wave -noupdate /testbench_busybear/dut/hart/ifu/ic/PCPF +add wave -noupdate /testbench_busybear/dut/hart/ifu/ic/InDataF +add wave -noupdate /testbench_busybear/CheckInstrD +add wave -noupdate /testbench_busybear/lastCheckInstrD +add wave -noupdate /testbench_busybear/speculative +add wave -noupdate /testbench_busybear/lastPC2 +add wave -noupdate -divider +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/NextWalkerState +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/WalkerState +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/MMUTranslate +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/MMUTranslationComplete +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/MMUPAdr +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/MMUReadPTE +add wave -noupdate /testbench_busybear/dut/hart/pagetablewalker/InstrPageFaultF +add wave -noupdate /testbench_busybear/dut/hart/priv/InstrPageFaultM +add wave -noupdate -divider +add wave -noupdate /testbench_busybear/dut/uncore/HSELBootTim +add wave -noupdate /testbench_busybear/dut/uncore/HSELTim +add wave -noupdate /testbench_busybear/dut/uncore/HREADTim +add wave -noupdate /testbench_busybear/dut/uncore/dtim/HREADTim0 +add wave -noupdate /testbench_busybear/dut/uncore/HREADYTim +add wave -noupdate -divider +add wave -noupdate /testbench_busybear/dut/uncore/HREADBootTim +add wave -noupdate /testbench_busybear/dut/uncore/bootdtim/HREADTim0 +add wave -noupdate /testbench_busybear/dut/uncore/HREADYBootTim +add wave -noupdate /testbench_busybear/dut/uncore/HADDR +add wave -noupdate /testbench_busybear/dut/uncore/HRESP +add wave -noupdate /testbench_busybear/dut/uncore/HREADY +add wave -noupdate /testbench_busybear/dut/uncore/HRDATA +add wave -noupdate -divider +add wave -noupdate -radix hexadecimal /testbench_busybear/regExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/regNumExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/HWRITE +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/MemRWM[1]} +add wave -noupdate -radix hexadecimal /testbench_busybear/HWDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/HRDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/HADDR +add wave -noupdate -radix hexadecimal /testbench_busybear/readAdrExpected +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[1]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[2]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[3]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[4]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[5]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[6]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[7]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[8]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[9]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[10]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[11]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[12]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[13]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[14]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[15]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[16]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[17]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[18]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[19]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[20]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[21]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[22]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[23]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[24]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[25]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[26]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[27]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[28]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[29]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[30]} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ieu/dp/regf/rf[31]} +add wave -noupdate /testbench_busybear/InstrFName +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCD +add wave -noupdate /testbench_busybear/InstrDName +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCE +add wave -noupdate /testbench_busybear/InstrEName +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCM +add wave -noupdate /testbench_busybear/InstrMName +add wave -noupdate -radix hexadecimal /testbench_busybear/PCW +add wave -noupdate /testbench_busybear/InstrWName +add wave -noupdate -radix hexadecimal /testbench_busybear/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/GPIOPinsIn +add wave -noupdate -radix hexadecimal /testbench_busybear/GPIOPinsOut +add wave -noupdate -radix hexadecimal /testbench_busybear/GPIOPinsEn +add wave -noupdate -radix hexadecimal /testbench_busybear/CheckInstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/HRDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/HADDR +add wave -noupdate -radix hexadecimal /testbench_busybear/HWDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/HWRITE +add wave -noupdate -radix hexadecimal /testbench_busybear/HSIZE +add wave -noupdate -radix hexadecimal /testbench_busybear/HBURST +add wave -noupdate -radix hexadecimal /testbench_busybear/HPROT +add wave -noupdate -radix hexadecimal /testbench_busybear/HTRANS +add wave -noupdate -radix hexadecimal /testbench_busybear/HMASTLOCK +add wave -noupdate -radix hexadecimal /testbench_busybear/HCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/HRESETn +add wave -noupdate -radix hexadecimal /testbench_busybear/HRDATAEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/HREADYEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/HRESPEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/UARTSout +add wave -noupdate -radix hexadecimal /testbench_busybear/UARTSin +add wave -noupdate -radix hexadecimal /testbench_busybear/data_file_PC +add wave -noupdate -radix hexadecimal /testbench_busybear/scan_file_PC +add wave -noupdate -radix hexadecimal /testbench_busybear/data_file_PCW +add wave -noupdate -radix hexadecimal /testbench_busybear/scan_file_PCW +add wave -noupdate -radix hexadecimal /testbench_busybear/data_file_rf +add wave -noupdate -radix hexadecimal /testbench_busybear/scan_file_rf +add wave -noupdate -radix hexadecimal /testbench_busybear/data_file_csr +add wave -noupdate -radix hexadecimal /testbench_busybear/scan_file_csr +add wave -noupdate -radix hexadecimal /testbench_busybear/data_file_memR +add wave -noupdate -radix hexadecimal /testbench_busybear/scan_file_memR +add wave -noupdate -radix hexadecimal /testbench_busybear/data_file_memW +add wave -noupdate -radix hexadecimal /testbench_busybear/scan_file_memW +add wave -noupdate -radix hexadecimal /testbench_busybear/warningCount +add wave -noupdate -radix hexadecimal /testbench_busybear/instrs +add wave -noupdate -radix hexadecimal /testbench_busybear/pcExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/regExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/regNumExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/PCW +add wave -noupdate -radix hexadecimal /testbench_busybear/readMask +add wave -noupdate -radix hexadecimal /testbench_busybear/readAdrExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/writeDataExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/writeAdrExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/totalCSR +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMCAUSE +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMCOUNTEREN +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMEDELEG +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMEPC +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMIDELEG +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMIE +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMISA +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMSCRATCH +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMSTATUS +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMTVAL +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedMTVEC +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSATP +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSCAUSE +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSCOUNTEREN +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSEPC +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSIE +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSSCRATCH +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSSTATUS +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSTVAL +add wave -noupdate -radix hexadecimal /testbench_busybear/expectedSTVEC +add wave -noupdate -radix hexadecimal /testbench_busybear/speculative +add wave -noupdate -radix hexadecimal /testbench_busybear/lastCheckInstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/lastPC +add wave -noupdate -radix hexadecimal /testbench_busybear/lastPC2 +add wave -noupdate -radix hexadecimal /testbench_busybear/InstrWExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/PCWExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/InstrMask +add wave -noupdate -radix hexadecimal /testbench_busybear/forcedInstr +add wave -noupdate -radix hexadecimal /testbench_busybear/lastPCD +add wave -noupdate -radix hexadecimal /testbench_busybear/InstrW +add wave -noupdate -radix hexadecimal /testbench_busybear/equal/equal +add wave -noupdate -radix hexadecimal /testbench_busybear/equal/adr +add wave -noupdate -radix hexadecimal /testbench_busybear/equal/adrExpected +add wave -noupdate -radix hexadecimal /testbench_busybear/equal/func +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HRDATAEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HREADYEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HRESPEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HRESETn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HADDR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HWDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HWRITE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HSIZE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HBURST +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HPROT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HTRANS +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HMASTLOCK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/GPIOPinsIn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/GPIOPinsOut +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/GPIOPinsEn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/UARTSin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/UARTSout +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/PCF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HRDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HREADY +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HRESP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/InstrAccessFaultF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/DataAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/TimerIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/SwIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/ExtIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HADDRD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HSIZED +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/HWRITED +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/rd2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/InstrF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/TimerIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ExtIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SwIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrAccessFaultF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DataAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/rd2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HRDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HREADY +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HRESP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HRESETn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HADDR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HWDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HWRITE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HSIZE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HBURST +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HPROT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HTRANS +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HMASTLOCK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HADDRD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HSIZED +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/HWRITED +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StallF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StallE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StallM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StallW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FlushF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FlushD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FlushE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FlushM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FlushW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/RetM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/TrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MulDivE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/W64E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/CSRReadM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/CSRWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PrivilegedM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/AtomicM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SrcAE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SrcBE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SrcAM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/Funct3E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCLinkE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCLinkW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCTargetE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/CSRReadValW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MulDivResultW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PrivilegedNextPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MemRWM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrValidW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DataMisalignedM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/IllegalBaseInstrFaultD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/IllegalIEUInstrFaultD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrPageFaultF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/LoadPageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StorePageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/LoadMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/LoadAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StoreMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/StoreAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrMisalignedAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PCSrcE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/CSRWritePendingDEM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/LoadStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MulDivStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/CSRRdStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DivDoneE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DivBusyE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DivDoneW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SetFflagsM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FRM_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FloatRegWriteW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SquashSCW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FSROutW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DivSqrtDoneE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FInvalInstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/FPUResultW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ITLBWriteF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DTLBWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ITLBFlushF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DTLBFlushM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ITLBMissF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ITLBHitF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DTLBMissM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DTLBHitM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/SATP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PageTableEntryF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PageTableEntryM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PageTypeF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/PageTypeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ICacheStallF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MMUPAdr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MMUReadPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MMUTranslate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MMUTranslationComplete +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MMUReady +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MemReadM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MemWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/Funct3M +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MemAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MemPAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/WriteDataM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ReadDataW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrPAdrF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrRData +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrReadF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/DataStall +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrStall +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrAckD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/MemAckW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/BPPredWrongE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/BPPredWrongM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/InstrClassM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/StallW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/FlushW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrInF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrPAdrF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrReadF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ICacheStallF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCLinkE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCSrcE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCTargetE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/BPPredWrongE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/RetM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/TrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PrivilegedNextPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrClassM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/BPPredWrongM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/IllegalBaseInstrFaultD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/IllegalIEUInstrFaultD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrMisalignedAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PageTableEntryF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PageTypeF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/SATP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ITLBWriteF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ITLBFlushF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ITLBMissF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ITLBHitF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/UnalignedPCNextF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCNextF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/misaligned +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/BranchMisalignedFaultE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/BranchMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/TrapMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PrivilegedChangePCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/IllegalCompInstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCPlusUpperF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCPlus2or4F +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCLinkD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCLinkM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCPF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/CompressedF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrRawD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/nop +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ITLBInstrPAdrF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ICacheInstrPAdrF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/ITLBPageFaultF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/SelBPPredF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/BPPredPCF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCCorrectE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCNext0F +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/PCNext1F +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrClassD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/InstrClassE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/SATP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/TLBAccess +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/VirtualAddress +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PageTableEntryWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PageTypeWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/TLBFlush +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PhysicalAddress +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/TLBMiss +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/TLBHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/TLBPageFault +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/SvMode +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/Translate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/VirtualPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PhysicalPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PhysicalPageNumberMixed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PhysicalAddressFull +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PTEAccessBits +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/PageOffset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/HitPageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/CAMHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/genblk2/addressmux/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/genblk2/addressmux/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/genblk2/addressmux/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/genblk2/addressmux/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/TLBFlush +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/CAMHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/RUBits +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/RUBitsNext +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/RUBitsAccessed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/ReadLineOneHot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/WriteLineOneHot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/AccessLineOneHot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/AllUsed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/read_decoder/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/read_decoder/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/write_decoder/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/write_decoder/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/first_nru/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/first_nru/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/lru_state/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/lru_state/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/lru_state/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/lru_state/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/lru_state/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/lru/lru_state/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/PageTableEntryWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/PhysicalPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/PTEAccessBits +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/ram/PageTableEntry +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/VirtualPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/PageTypeWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/TLBFlush +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/HitPageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/CAMHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/CAMLineWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/Matches +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/ifu/itlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/decoder/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/decoder/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/match_priority/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/cam/match_priority/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/PageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/MixPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/PageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/PageNumberCombined +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/genblk1/Segment2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/genblk1/MixSegment2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/genblk1/Segment2Combined +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/itlb/physical_mixer/genblk1/Segment1 +add wave -noupdate -radix hexadecimal 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/testbench_busybear/dut/hart/ifu/pcreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/pcreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/pcreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/pcreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/pcreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/pcreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/bpred/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/bpred/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/bpred/StallF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/bpred/StallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/bpred/StallE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ifu/bpred/FlushF +add wave -noupdate -radix hexadecimal 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wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultMReg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/WriteDataMReg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/WriteDataMReg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/WriteDataMReg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/WriteDataMReg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/WriteDataMReg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/WriteDataMReg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdMEg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdMEg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdMEg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdMEg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdMEg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdMEg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultWReg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultWReg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultWReg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultWReg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultWReg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/ALUResultWReg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdWEg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdWEg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdWEg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdWEg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdWEg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/RdWEg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/d2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/d3 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/d4 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/dp/resultmux/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/Rs1D +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/Rs2D +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/Rs1E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/Rs2E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/RdE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/RdM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/RdW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/MemReadE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/MulDivE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/CSRReadE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/RegWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/RegWriteW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/DivDoneE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/DivBusyE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/ForwardAE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/ForwardBE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/LoadStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/MulDivStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ieu/fw/CSRRdStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/StallW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/FlushW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemRWM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/Funct3M +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/WriteDataM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/AtomicM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemPAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemReadM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DataMisalignedM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemAckW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/ReadDataW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/SquashSCW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DataAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/LoadMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/LoadAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/StoreMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/StoreAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/PageTableEntryM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/PageTypeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/SATP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DTLBWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DTLBFlushM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DTLBMissM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DTLBHitM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/MemAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/SquashSCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/DTLBPageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/ReservationPAdrW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/ReservationValidM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/ReservationValidW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/lrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/scM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/WriteAdrMatchM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resadrreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resadrreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resadrreg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resadrreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resadrreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resadrreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resvldreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resvldreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resvldreg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resvldreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resvldreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/resvldreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/squashreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/squashreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/squashreg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/squashreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/squashreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/genblk1/squashreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/SATP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/TLBAccess +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/VirtualAddress +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PageTableEntryWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PageTypeWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/TLBFlush +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PhysicalAddress +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/TLBMiss +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/TLBHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/TLBPageFault +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/SvMode +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/Translate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/VirtualPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PhysicalPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PhysicalPageNumberMixed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PhysicalAddressFull +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PTEAccessBits +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/PageOffset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/HitPageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/CAMHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/genblk2/addressmux/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/genblk2/addressmux/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/genblk2/addressmux/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/genblk2/addressmux/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/TLBFlush +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/CAMHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/RUBits +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/RUBitsNext +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/RUBitsAccessed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/ReadLineOneHot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/WriteLineOneHot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/AccessLineOneHot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/AllUsed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/read_decoder/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/read_decoder/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/write_decoder/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/write_decoder/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/first_nru/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/first_nru/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/lru_state/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/lru_state/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/lru_state/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/lru_state/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/lru_state/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/lru/lru_state/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/PageTableEntryWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/PhysicalPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/PTEAccessBits +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/ram/PageTableEntry +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/VirtualPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/PageTypeWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/WriteIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/TLBWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/TLBFlush +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/VPNIndex +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/HitPageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/CAMHit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/CAMLineWrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/Matches +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[7]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[6]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[5]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[4]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[3]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[2]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[1]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/VirtualPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/CAMLineWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/PageTypeWrite} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/TLBFlush} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/Match} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/Valid} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/Key} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/VirtualPageNumberQuery} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/pagetypeflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/pagetypeflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/pagetypeflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/pagetypeflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/pagetypeflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/validbitflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/validbitflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/validbitflop/clear} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/validbitflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/validbitflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/validbitflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/keyflop/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/keyflop/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/keyflop/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/keyflop/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/keyflop/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/PageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/MixPageNumber} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/PageType} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/PageNumberCombined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/MixSegment2} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment2Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/MixSegment1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment1Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/MixSegment0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/Segment0Combined} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment1mux/y} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/d0} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/d1} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/s} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/dmem/dtlb/cam/genblk1[0]/cam_line/mixer/genblk1/segment0mux/y} +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/decoder/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/decoder/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/match_priority/one_hot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/cam/match_priority/binary +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/PageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/MixPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/PageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/PageNumberCombined +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/Segment2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/MixSegment2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/Segment2Combined +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/Segment1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/MixSegment1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/Segment1Combined +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/Segment0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/MixSegment0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/Segment0Combined +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment1mux/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment1mux/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment1mux/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment1mux/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment0mux/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment0mux/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment0mux/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/dmem/dtlb/physical_mixer/genblk1/segment0mux/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/StallW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/FlushW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/UnsignedLoadM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/AtomicM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/Funct7M +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/InstrPAdrF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/InstrReadF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/InstrRData +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MemPAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MemReadM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MemWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/WriteDataM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MemSizeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MMUPAdr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MMUTranslate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MMUTranslationComplete +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/TrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MMUReadPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/MMUReady +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/ReadDataW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/HRDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/HREADY +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/HRESP +add wave -noupdate -radix hexadecimal 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/testbench_busybear/dut/hart/ebu/genblk2/amoalu/a +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/genblk2/amoalu/b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/genblk2/amoalu/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/genblk2/wdmux/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/genblk2/wdmux/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/genblk2/wdmux/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/genblk2/wdmux/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/busreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/busreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/busreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/busreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/busreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/busreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/wdreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/wdreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/wdreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/adrreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/adrreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/adrreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/sizereg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/sizereg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/sizereg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/writereg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/ebu/writereg/d +add wave -noupdate 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/testbench_busybear/dut/hart/pagetablewalker/MemAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/ITLBMissF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/DTLBMissM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MemRWM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PageTableEntryF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PageTableEntryM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PageTypeF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PageTypeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/ITLBWriteF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/DTLBWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MMUReadPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MMUReady +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MMUPAdr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MMUTranslate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MMUTranslationComplete +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/InstrPageFaultF +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/LoadPageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/StorePageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/SvMode +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/TLBMiss +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/BasePageTablePPN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/TranslationVAdr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/SavedPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/CurrentPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/TranslationPAdr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/CurrentPPN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MemStore +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Dirty +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Accessed +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Global +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/User +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Executable +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Writable +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Readable +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/Valid +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/ValidPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/AccessAlert +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MegapageMisaligned +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/BadMegapage +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/LeafPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PageTableEntry +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PageType +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/DirectInstrPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/DirectMemPTE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/PCPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/MemAdrPageNumber +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/WalkerState +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/NextWalkerState +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/VPN2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/VPN1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/VPN0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/GigapageMisaligned +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/BadGigapage +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/mmureg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/mmureg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/mmureg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/mmureg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/mmureg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/mmureg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/ptereg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/pagetablewalker/genblk2/ptereg/reset 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/testbench_busybear/dut/hart/mdu/SrcAE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/SrcBE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/Funct3E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/MulDivE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/W64E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/MulDivResultW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/DivDoneE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/DivBusyE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/StallE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/StallM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/StallW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/FlushM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/FlushW 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-noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div0error +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/SrcAE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/SrcBE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/Funct3E +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/ProdE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/PP1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/PP2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/PP3 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/PP4 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/Pprime +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/mul/PA +add wave -noupdate -radix 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-noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l1/l2/V +add wave -noupdate -radix hexadecimal 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+add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l3/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l3/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l3/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l4/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l4/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l4/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l4/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l5/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l5/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l5/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l5/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l6/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l6/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l6/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l6/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l6/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l1/l2/l6/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l3/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l3/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l3/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l4/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l4/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l4/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l4/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l5/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l5/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l5/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l5/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l6/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l6/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l6/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l6/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l6/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l1/l6/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l3/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l3/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l3/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l4/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l4/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l4/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l4/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l5/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l5/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l5/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l5/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l6/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l6/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l6/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l6/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l6/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l1/l2/l2/l6/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l3/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l3/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l3/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l4/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l4/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l4/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l4/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l5/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l5/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l5/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l5/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l6/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l6/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l6/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l6/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l6/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l1/l6/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l3/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l3/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l3/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l4/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l4/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l4/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l4/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l5/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l5/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l5/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l5/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l6/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l6/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l6/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l6/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l6/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l1/l2/l6/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l3/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l3/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l3/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l4/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l4/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l4/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l4/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l5/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l5/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l5/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l5/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l6/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l6/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l6/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l6/V1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l6/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l1/l6/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/B +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s1p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s1v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s1p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s1v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s2p0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s2v0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s2p1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/s2v1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/ZPa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/ZPb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/ZVa +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/ZVb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/ZP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/ZV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l1/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l1/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l1/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l1/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l2/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l2/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l2/P +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l2/V +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l3/B0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l3/B1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l3/V0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p1/l2/l2/l2/l3/V1 +add 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wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/enable +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otfzero +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/shiftResult +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/rem0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/Q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/quotient +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/Sum +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/Carry +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/Qstar +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/QMstar +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/qtotal +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/SumN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/CarryN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/SumN2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/CarryN2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/divi1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/divi2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/divi1c +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/divi2c +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/dive1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mdivi_temp +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mdivi +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/zero +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/qsel +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/Qin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/QMin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/CshiftQ +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/CshiftQM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/rem1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/rem2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/rem3 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/SumR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/CarryR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/Qt +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/ulp +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx1/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx1/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx1/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx1/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx2/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx2/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx2/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx2/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx3/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx3/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx3/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx3/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa1/a +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa1/b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa1/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/pd1/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/pd1/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/pd1/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx4/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx4/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx4/d2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx4/d3 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx4/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx4/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx5/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx5/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx5/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx5/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/a +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/c +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/sum +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/carry +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/carry_temp +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[67]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[67]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[67]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[67]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[67]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[66]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[66]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[66]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[66]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[66]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[65]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[65]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[65]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[65]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[65]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[64]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[64]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[64]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[64]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[64]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[63]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[63]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[63]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[63]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[63]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[62]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[62]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[62]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[62]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[62]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[61]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[61]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[61]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[61]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[61]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[60]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[60]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[60]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[60]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[60]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[59]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[59]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[59]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[59]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[59]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[58]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[58]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[58]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[58]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[58]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[57]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[57]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[57]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[57]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[57]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[56]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[56]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[56]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[56]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[56]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[55]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[55]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[55]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[55]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[55]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[54]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[54]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[54]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[54]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[54]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[53]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[53]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[53]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[53]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[53]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[52]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[52]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[52]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[52]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[52]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[51]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[51]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[51]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[51]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[51]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[50]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[50]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[50]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[50]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[50]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[49]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[49]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[49]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[49]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[49]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[48]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[48]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[48]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[48]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[48]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[47]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[47]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[47]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[47]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[47]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[46]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[46]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[46]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[46]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[46]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[45]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[45]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[45]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[45]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[45]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[44]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[44]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[44]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[44]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[44]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[43]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[43]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[43]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[43]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[43]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[42]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[42]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[42]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[42]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[42]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[41]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[41]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[41]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[41]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[41]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[40]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[40]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[40]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[40]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[40]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[39]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[39]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[39]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[39]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[39]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[38]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[38]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[38]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[38]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[38]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[37]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[37]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[37]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[37]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[37]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[36]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[36]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[36]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[36]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[36]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[35]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[35]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[35]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[35]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[35]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[34]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[34]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[34]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[34]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[34]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[33]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[33]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[33]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[33]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[33]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[32]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[32]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[32]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[32]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[32]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[31]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[31]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[31]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[31]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[31]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[30]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[30]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[30]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[30]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[30]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[29]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[29]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[29]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[29]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[29]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[28]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[28]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[28]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[28]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[28]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[27]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[27]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[27]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[27]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[27]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[26]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[26]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[26]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[26]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[26]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[25]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[25]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[25]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[25]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[25]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[24]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[24]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[24]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[24]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[24]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[23]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[23]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[23]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[23]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[23]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[22]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[22]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[22]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[22]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[22]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[21]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[21]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[21]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[21]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[21]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[20]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[20]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[20]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[20]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[20]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[19]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[19]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[19]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[19]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[19]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[18]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[18]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[18]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[18]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[18]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[17]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[17]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[17]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[17]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[17]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[16]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[16]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[16]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[16]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[16]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[15]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[15]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[15]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[15]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[15]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[14]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[14]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[14]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[14]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[14]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[13]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[13]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[13]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[13]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[13]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[12]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[12]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[12]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[12]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[12]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[11]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[11]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[11]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[11]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[11]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[10]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[10]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[10]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[10]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[10]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[9]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[9]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[9]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[9]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[9]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[8]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[8]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[8]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[8]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[8]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[7]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[7]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[7]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[7]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[7]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[6]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[6]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[6]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[6]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[6]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[5]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[5]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[5]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[5]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[5]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[4]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[4]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[4]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[4]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[4]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[3]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[3]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[3]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[3]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[3]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[2]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[2]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[2]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[2]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[2]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[1]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[1]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[1]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[1]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[1]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[0]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[0]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[0]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[0]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa1/genbit[0]/fa_inst/carry} +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg1/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg1/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg1/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg1/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg1/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg2/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg2/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg2/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg2/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/reg2/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf1/quot +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf1/Qin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf1/QMin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf1/CshiftQ +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf1/CshiftQM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/Qin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/QMin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/CshiftQ +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/CshiftQM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/enable +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/R2Q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/R1Q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/Qstar +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/QMstar +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/M1Q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/M2Q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m1/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m1/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m1/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m1/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r1/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r1/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r1/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r1/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r1/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m2/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m2/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m2/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/m2/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r2/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r2/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r2/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r2/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/otf2/r2/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa2/a +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa2/b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa2/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/a +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/c +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/sum +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/carry +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/carry_temp +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[67]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[67]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[67]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[67]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[67]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[66]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[66]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[66]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[66]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[66]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[65]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[65]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[65]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[65]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[65]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[64]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[64]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[64]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[64]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[64]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[63]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[63]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[63]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[63]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[63]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[62]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[62]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[62]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[62]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[62]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[61]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[61]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[61]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[61]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[61]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[60]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[60]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[60]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[60]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[60]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[59]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[59]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[59]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[59]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[59]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[58]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[58]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[58]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[58]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[58]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[57]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[57]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[57]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[57]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[57]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[56]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[56]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[56]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[56]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[56]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[55]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[55]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[55]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[55]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[55]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[54]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[54]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[54]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[54]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[54]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[53]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[53]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[53]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[53]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[53]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[52]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[52]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[52]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[52]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[52]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[51]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[51]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[51]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[51]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[51]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[50]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[50]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[50]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[50]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[50]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[49]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[49]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[49]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[49]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[49]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[48]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[48]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[48]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[48]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[48]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[47]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[47]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[47]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[47]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[47]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[46]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[46]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[46]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[46]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[46]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[45]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[45]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[45]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[45]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[45]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[44]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[44]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[44]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[44]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[44]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[43]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[43]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[43]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[43]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[43]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[42]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[42]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[42]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[42]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[42]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[41]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[41]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[41]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[41]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[41]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[40]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[40]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[40]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[40]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[40]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[39]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[39]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[39]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[39]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[39]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[38]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[38]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[38]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[38]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[38]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[37]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[37]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[37]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[37]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[37]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[36]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[36]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[36]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[36]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[36]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[35]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[35]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[35]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[35]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[35]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[34]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[34]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[34]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[34]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[34]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[33]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[33]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[33]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[33]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[33]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[32]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[32]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[32]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[32]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[32]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[31]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[31]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[31]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[31]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[31]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[30]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[30]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[30]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[30]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[30]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[29]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[29]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[29]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[29]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[29]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[28]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[28]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[28]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[28]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[28]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[27]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[27]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[27]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[27]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[27]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[26]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[26]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[26]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[26]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[26]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[25]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[25]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[25]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[25]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[25]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[24]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[24]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[24]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[24]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[24]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[23]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[23]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[23]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[23]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[23]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[22]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[22]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[22]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[22]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[22]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[21]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[21]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[21]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[21]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[21]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[20]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[20]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[20]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[20]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[20]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[19]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[19]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[19]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[19]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[19]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[18]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[18]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[18]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[18]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[18]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[17]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[17]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[17]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[17]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[17]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[16]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[16]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[16]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[16]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[16]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[15]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[15]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[15]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[15]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[15]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[14]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[14]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[14]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[14]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[14]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[13]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[13]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[13]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[13]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[13]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[12]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[12]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[12]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[12]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[12]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[11]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[11]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[11]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[11]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[11]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[10]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[10]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[10]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[10]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[10]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[9]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[9]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[9]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[9]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[9]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[8]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[8]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[8]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[8]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[8]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[7]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[7]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[7]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[7]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[7]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[6]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[6]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[6]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[6]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[6]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[5]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[5]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[5]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[5]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[5]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[4]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[4]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[4]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[4]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[4]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[3]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[3]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[3]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[3]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[3]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[2]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[2]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[2]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[2]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[2]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[1]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[1]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[1]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[1]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[1]/fa_inst/carry} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[0]/fa_inst/a} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[0]/fa_inst/b} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[0]/fa_inst/c} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[0]/fa_inst/sum} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/mdu/genblk1/div/p3/csa2/genbit[0]/fa_inst/carry} +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa3/a +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa3/b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/cpa3/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx6/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx6/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx6/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx6/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx7/d0 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx7/d1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx7/s +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p3/mx7/y +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg3/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg3/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg3/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg3/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg3/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg4/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg4/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg4/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg4/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/reg4/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p4/A +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p4/Shift +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p4/stage1 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p4/stage2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p4/stage3 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/mdu/genblk1/div/p4/stage4 +add wave -noupdate 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/testbench_busybear/dut/hart/priv/csr/IllegalCSRMAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/IllegalCSRSAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/IllegalCSRUAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/IllegalCSRNAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/InsufficientCSRPrivilegeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/IllegalCSRMWriteReadonlyM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/CSRMWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/CSRSWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/CSRAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/ExtIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/TimerIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/SwIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/MIDELEG_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/MIP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/MIE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/SIP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/SIE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/IntInM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/IP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/IE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/MIP_WRITE_MASK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/SIP_WRITE_MASK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/WriteMIPM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/WriteMIEM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/WriteSIPM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csri/WriteSIEM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/StallW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/WriteMSTATUSM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/WriteSSTATUSM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/WriteUSTATUSM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/TrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/FloatRegWriteW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/NextPrivilegeModeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/mretM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/sretM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/uretM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/MSTATUS_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/SSTATUS_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/USTATUS_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SPP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_TSR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_TW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_TVM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MXR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SUM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SUM_INT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPRV +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPRV_INT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SXL +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_UXL +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_XS +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_FS +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_FS_INT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPP_NEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_SPIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_UPIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrsr/STATUS_UIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/InstrValidW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/LoadStallD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/CSRMWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/BPPredWrongM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/InstrClassM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/CSRAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/MCOUNTINHIBIT_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/MCOUNTEREN_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/SCOUNTEREN_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/CSRCReadValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/IllegalCSRCAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/MCOUNTEN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/#ublk#436867#48/i +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/HPMCOUNTER_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/HPMCOUNTERPlusM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/NextHPMCOUNTERM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/WriteHPMCOUNTERM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/CounterNumM +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[31]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[31]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[31]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[31]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[30]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[30]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[30]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[30]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[29]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[29]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[29]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[29]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[28]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[28]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[28]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[28]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[27]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[27]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[27]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[27]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[26]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[26]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[26]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[26]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[25]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[25]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[25]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[25]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[24]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[24]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[24]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[24]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[23]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[23]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[23]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[23]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[22]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[22]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[22]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[22]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[21]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[21]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[21]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[21]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[20]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[20]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[20]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[20]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[19]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[19]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[19]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[19]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[18]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[18]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[18]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[18]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[17]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[17]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[17]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[17]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[16]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[16]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[16]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[16]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[15]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[15]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[15]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[15]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[14]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[14]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[14]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[14]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[13]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[13]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[13]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[13]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[12]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[12]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[12]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[12]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[11]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[11]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[11]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[11]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[10]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[10]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[10]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[10]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[9]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[9]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[9]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[9]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[8]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[8]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[8]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[8]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[7]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[7]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[7]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[7]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[6]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[6]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[6]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[6]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[5]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[5]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[5]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[5]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[4]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[4]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[4]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[4]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[3]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[3]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[3]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[3]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[2]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[2]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[2]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[2]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[1]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[1]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[1]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[1]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[0]/genblk2/HPMCOUNTERreg_j/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[0]/genblk2/HPMCOUNTERreg_j/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[0]/genblk2/HPMCOUNTERreg_j/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1[0]/genblk2/HPMCOUNTERreg_j/q} +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/CSRMWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/CSRAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/NextEPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/NextCauseM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/NextMtvalM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSTATUS_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/CSRMReadValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEPC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVEC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTEREN_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBIT_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEDELEG_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MIDELEG_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MIP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MIE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMSTATUSM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/IllegalCSRMAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/IllegalCSRMWriteReadonlyM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MISA_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSCRATCH_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCAUSE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVAL_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/PMPCFG01_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/PMPCFG23_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/zero +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/allones +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEDELEG_MASK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MIDELEG_MASK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMTVECM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMEDELEGM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMIDELEGM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMSCRATCHM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMEPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMCAUSEM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMTVALM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMCOUNTERENM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WriteMCOUNTINHIBITM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WritePMPCFG0M +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/WritePMPCFG2M +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MISAbits +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[15]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[15]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[15]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[15]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[15]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[14]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[14]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[14]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[14]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[14]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[13]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[13]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[13]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[13]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[13]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[12]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[12]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[12]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[12]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[12]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[11]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[11]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[11]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[11]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[11]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[10]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[10]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[10]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[10]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[10]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[9]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[9]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[9]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[9]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[9]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[8]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[8]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[8]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[8]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[8]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[7]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[7]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[7]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[7]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[7]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[6]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[6]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[6]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[6]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[6]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[5]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[5]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[5]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[5]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[5]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[4]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[4]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[4]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[4]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[4]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[3]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[3]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[3]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[3]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[3]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[2]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[2]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[2]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[2]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[2]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[1]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[1]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[1]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[1]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[1]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[0]/PMPADDRreg/clk} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[0]/PMPADDRreg/reset} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[0]/PMPADDRreg/en} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[0]/PMPADDRreg/d} +add wave -noupdate -radix hexadecimal {/testbench_busybear/dut/hart/priv/csr/genblk1/csrm/pmp_flop[0]/PMPADDRreg/q} +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG01reg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG01reg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG01reg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG01reg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG01reg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG23reg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG23reg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG23reg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG23reg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk4/PMPCFG23reg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk2/MCOUNTERENreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk2/MCOUNTERENreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk2/MCOUNTERENreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk2/MCOUNTERENreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk2/MCOUNTERENreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk2/MCOUNTERENreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVECreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVECreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVECreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVECreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVECreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVECreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEPCreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEPCreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEPCreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEPCreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MEPCreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVALreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVALreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVALreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVALreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MTVALreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/CSRSWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/STrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/CSRAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/NextEPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/NextCauseM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/NextMtvalM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SSTATUS_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/CSRSReadValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SEPC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/STVEC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SCOUNTEREN_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SEDELEG_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SIDELEG_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SATP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SIP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SIE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/WriteSSTATUSM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/IllegalCSRSAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/zero +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/allones +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/SEDELEG_MASK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSTVECM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSSCRATCHM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSEPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSCAUSEM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSTVALM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSATPM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSCOUNTERENM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCH_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVAL_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/genblk1/SCOUNTERENreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/genblk1/SCOUNTERENreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/genblk1/SCOUNTERENreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/genblk1/SCOUNTERENreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/genblk1/SCOUNTERENreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/genblk1/SCOUNTERENreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/load +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/val +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/reset +add wave -noupdate -radix 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-noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/NextMtvalM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/USTATUS_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/CSRNReadValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/UEPC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/UTVEC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/UIP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/UIE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/WriteUSTATUSM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csrn/IllegalCSRNAccessM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/CSRUWriteM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/CSRAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/CSRWriteValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/CSRUReadValM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/SetFflagsM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/FRM_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/IllegalCSRUAccessM +add wave -noupdate -radix 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/testbench_busybear/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/CSRValWReg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/CSRValWReg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/CSRValWReg/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/CSRValWReg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/CSRValWReg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/csr/genblk1/CSRValWReg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregD/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregD/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregD/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregD/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregD/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregD/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregE/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregE/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregE/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregE/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregE/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregE/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregM/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregM/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregM/clear +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregM/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregM/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/faultregM/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/InstrMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/InstrAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/IllegalInstrFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/BreakpointFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/LoadMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/StoreMisalignedFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/LoadAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/StoreAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/EcallFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/InstrPageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/LoadPageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/StorePageFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/mretM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/sretM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/uretM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/PrivilegeModeW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/NextPrivilegeModeM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MEPC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/SEPC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/UEPC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/UTVEC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/STVEC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MTVEC_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MIP_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MIE_REGW +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/STATUS_MIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/STATUS_SIE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/InstrMisalignedAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MemAdrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/InstrM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/TrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MTrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/STrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/UTrapM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/RetM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/PrivilegedNextPCM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/CauseM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/NextFaultMtvalM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/MIntGlobalEnM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/SIntGlobalEnM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/PendingIntsM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/hart/priv/trap/InterruptM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESETn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HADDR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HWDATAIN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HWRITE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSIZE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HBURST +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HPROT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HTRANS +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HMASTLOCK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRDATAEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADYEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESPEXT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADY +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESP +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HADDRD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSIZED +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HWRITED +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/DataAccessFaultM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/TimerIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/SwIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/ExtIntM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/GPIOPinsIn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/GPIOPinsOut +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/GPIOPinsEn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/UARTSin +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/UARTSout +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HWDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADTim +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADCLINT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADPLIC +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADGPIO +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELTim +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELCLINT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELPLIC +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELGPIO +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/PreHSELUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELTimD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELCLINTD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELPLICD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELGPIOD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HSELUARTD +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESPTim +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESPCLINT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESPPLIC +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESPGPIO +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HRESPUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/HREADYTim +add wave -noupdate -radix hexadecimal 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/testbench_busybear/dut/uncore/gpio/memwritereg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/memwritereg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/memwritereg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/memwritereg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/haddrreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/haddrreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/haddrreg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/haddrreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/gpio/haddrreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HRESETn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HSELUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HADDR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HWRITE +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HWDATA +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HREADUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HRESPUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/HREADYUART +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/SIN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/DSRb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/DCDb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/CTSb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/RIb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/SOUT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/RTSb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/DTRb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/OUT1b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/OUT2b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/INTR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/TXRDYb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/RXRDYb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/A +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/MEMRb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/MEMWb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memread +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memwrite +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/Din +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/Dout +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/BAUDOUTb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memreadreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memreadreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memreadreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memreadreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memwritereg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memwritereg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memwritereg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/memwritereg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/haddrreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/haddrreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/haddrreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/haddrreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/HCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/HRESETn +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/A +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/Din +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/Dout +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/MEMRb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/MEMWb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/INTR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/TXRDYb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RXRDYb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/BAUDOUTb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RCLK +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/SIN +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DSRb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DCDb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/CTSb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RIb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/SOUT +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RTSb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DTRb +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/OUT1b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/OUT2b +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RBR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/FCR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/LCR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/LSR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/SCR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DLL +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DLM +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/IER +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/MSR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/MCR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/SINd +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DSRbd +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DCDbd +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/CTSbd +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RIbd +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/SINsync +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DSRbsync +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DCDbsync +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/CTSbsync +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RIbsync +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DSRb2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DCDb2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/CTSb2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RIb2 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/SOUTbit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/loop +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/DLAB +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/baudpulse +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txbaudpulse +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxbaudpulse +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/baudcount +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxoversampledcnt +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txoversampledcnt +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxbitsreceived +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txbitssent +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxstate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txstate +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxshiftreg +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifohead +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifotail +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txfifohead +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txfifotail +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifotriggerlevel +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifoentries +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txfifoentries +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxbitsexpected +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txbitsexpected +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/RXBR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxtimeoutcnt +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxcentered +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxparity +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxparitybit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxstopbit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxparityerr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxoverrunerr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxframingerr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxbreak +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifohaserr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxdataready +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifoempty +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifotriggered +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifotimeout +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfifodmaready +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxdata9 +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxdata +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxerrbit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxfullbit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/TXHR +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txdata +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/nexttxdata +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txsr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txnextbit +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txhrfull +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txsrfull +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txparity +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txfifoempty +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txfifofull +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txfifodmaready +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/fifoenabled +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/fifodmamodesel +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/evenparitysel +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxlinestatusintr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/rxdataavailintr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/txhremptyintr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/modemstatusintr +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/intrpending +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/uart/u/intrid +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseltimreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseltimreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseltimreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseltimreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselclintreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselclintreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselclintreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselclintreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselplicreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselplicreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselplicreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselplicreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselgpioreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselgpioreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselgpioreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselgpioreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseluartreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseluartreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseluartreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hseluartreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselboottimreg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselboottimreg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselboottimreg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/dut/uncore/hselboottimreg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/PCWReg/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/PCWReg/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/PCWReg/en +add wave -noupdate -radix hexadecimal /testbench_busybear/PCWReg/d +add wave -noupdate -radix hexadecimal /testbench_busybear/PCWReg/q +add wave -noupdate -radix hexadecimal /testbench_busybear/dec/instr +add wave -noupdate -radix hexadecimal /testbench_busybear/dec/op +add wave -noupdate -radix hexadecimal /testbench_busybear/dec/funct3 +add wave -noupdate -radix hexadecimal /testbench_busybear/dec/funct7 +add wave -noupdate -radix hexadecimal /testbench_busybear/dec/imm +add wave -noupdate -radix hexadecimal /testbench_busybear/it/clk +add wave -noupdate -radix hexadecimal /testbench_busybear/it/reset +add wave -noupdate -radix hexadecimal /testbench_busybear/it/FlushE +add wave -noupdate -radix hexadecimal /testbench_busybear/it/InstrD +add wave -noupdate -radix hexadecimal /testbench_busybear/it/InstrE +add wave -noupdate -radix hexadecimal /testbench_busybear/it/InstrM +add wave -noupdate -radix hexadecimal /testbench_busybear/it/InstrW +add wave -noupdate -radix hexadecimal /testbench_busybear/it/ddec/instr +add wave -noupdate -radix hexadecimal /testbench_busybear/it/ddec/op +add wave -noupdate -radix hexadecimal /testbench_busybear/it/ddec/funct3 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/ddec/funct7 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/ddec/imm +add wave -noupdate -radix hexadecimal /testbench_busybear/it/edec/instr +add wave -noupdate -radix hexadecimal /testbench_busybear/it/edec/op +add wave -noupdate -radix hexadecimal /testbench_busybear/it/edec/funct3 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/edec/funct7 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/edec/imm +add wave -noupdate -radix hexadecimal /testbench_busybear/it/mdec/instr +add wave -noupdate -radix hexadecimal /testbench_busybear/it/mdec/op +add wave -noupdate -radix hexadecimal /testbench_busybear/it/mdec/funct3 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/mdec/funct7 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/mdec/imm +add wave -noupdate -radix hexadecimal /testbench_busybear/it/wdec/instr +add wave -noupdate -radix hexadecimal /testbench_busybear/it/wdec/op +add wave -noupdate -radix hexadecimal /testbench_busybear/it/wdec/funct3 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/wdec/funct7 +add wave -noupdate -radix hexadecimal /testbench_busybear/it/wdec/imm +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {34110626 ns} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 150 +configure wave -valuecolwidth 192 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {34110452 ns} {34110672 ns} diff --git a/wally-pipelined/regression/wally-busybear.do b/wally-pipelined/regression/wally-busybear.do index a1c81617c..f4e1a99a3 100644 --- a/wally-pipelined/regression/wally-busybear.do +++ b/wally-pipelined/regression/wally-busybear.do @@ -38,6 +38,8 @@ vsim workopt -suppress 8852,12070 #do ./wave-dos/peripheral-waves.do do ./wave-dos/busybear-waves.do +#do busy-mmu.do + #-- Run the Simulation run -all ##quit From d29ddddc3fb833ae9fec7949566b83c633ba5092 Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Thu, 29 Apr 2021 02:19:46 -0400 Subject: [PATCH 04/12] Remove unused waves from .do files --- wally-pipelined/regression/wave-dos/busybear-waves.do | 1 - wally-pipelined/regression/wave-dos/default-waves.do | 1 - 2 files changed, 2 deletions(-) diff --git a/wally-pipelined/regression/wave-dos/busybear-waves.do b/wally-pipelined/regression/wave-dos/busybear-waves.do index e8bcc3bd2..00df1087a 100644 --- a/wally-pipelined/regression/wave-dos/busybear-waves.do +++ b/wally-pipelined/regression/wave-dos/busybear-waves.do @@ -21,7 +21,6 @@ add wave -hex /testbench/dut/hart/ifu/InstrRawD add wave /testbench/CheckInstrD add wave /testbench/lastCheckInstrD add wave /testbench/speculative -add wave /testbench/dut/hart/ifu/bpred/BPPredWrongE add wave /testbench/lastPC2 add wave -divider add wave -divider diff --git a/wally-pipelined/regression/wave-dos/default-waves.do b/wally-pipelined/regression/wave-dos/default-waves.do index 7baf7fe23..065893e5c 100644 --- a/wally-pipelined/regression/wave-dos/default-waves.do +++ b/wally-pipelined/regression/wave-dos/default-waves.do @@ -26,7 +26,6 @@ add wave -hex /testbench/dut/hart/ifu/PCF add wave -hex /testbench/dut/hart/ifu/PCD add wave -hex /testbench/dut/hart/ifu/InstrD add wave /testbench/InstrDName -add wave -hex /testbench/dut/hart/ifu/ic/InstrRawD add wave -divider add wave -hex /testbench/dut/hart/ifu/PCE add wave -hex /testbench/dut/hart/ifu/InstrE From e091f430e04069bd6e659f4d5e9a98c807822402 Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Thu, 29 Apr 2021 02:20:39 -0400 Subject: [PATCH 05/12] Clean up PMA checker and begin PMP checker --- wally-pipelined/src/ebu/ahblite.sv | 96 ++++++++-------- wally-pipelined/src/privileged/csr.sv | 2 + wally-pipelined/src/privileged/csrm.sv | 3 +- wally-pipelined/src/privileged/csrsr.sv | 5 +- .../src/{ebu => privileged}/pmachecker.sv | 29 +++-- wally-pipelined/src/privileged/pmpchecker.sv | 104 ++++++++++++++++++ wally-pipelined/src/privileged/privileged.sv | 18 ++- .../src/wally/wallypipelinedhart.sv | 4 +- 8 files changed, 196 insertions(+), 65 deletions(-) rename wally-pipelined/src/{ebu => privileged}/pmachecker.sv (75%) create mode 100644 wally-pipelined/src/privileged/pmpchecker.sv diff --git a/wally-pipelined/src/ebu/ahblite.sv b/wally-pipelined/src/ebu/ahblite.sv index 23ae2eb65..d829dee66 100644 --- a/wally-pipelined/src/ebu/ahblite.sv +++ b/wally-pipelined/src/ebu/ahblite.sv @@ -58,7 +58,9 @@ module ahblite ( output logic [`XLEN-1:0] MMUReadPTE, output logic MMUReady, // Signals from PMA checker - input logic SquashAHBAccess, + input logic SquashBusAccess, + // Signals to PMA checker (metadata of proposed access) + output logic AtomicAccessM, ExecuteAccessF, WriteAccessM, ReadAccessM, // Return from bus output logic [`XLEN-1:0] ReadDataW, // AHB-Lite external signals @@ -79,8 +81,7 @@ module ahblite ( output logic HWRITED, // Stalls output logic /*InstrUpdate, */DataStall, - output logic MemAckW - // *** add a chip-level ready signal as part of handshake + output logic MemAckW ); logic GrantData; @@ -90,9 +91,6 @@ module ahblite ( logic IReady, DReady; logic CaptureDataM,CapturedDataAvailable; - // Describes type of access - logic Atomic, Execute, Write, Read; - assign HCLK = clk; assign HRESETn = ~reset; @@ -103,43 +101,56 @@ module ahblite ( // while an instruction read is occuring, the instruction read finishes before // the data access can take place. import ahbliteState::*; - statetype BusState, NextBusState; + statetype BusState, ProposedNextBusState, NextBusState; flopenl #(.TYPE(statetype)) busreg(HCLK, ~HRESETn, 1'b1, NextBusState, IDLE, BusState); - // *** If the SquashAHBAccess signal is high, we need to set NextBusState to IDLE. - // We could either have this case statement set a signal ProposedNextBusState, which gets - // used for NextBusState when we are not squashing. Alternatively, we could add a bunch of - // conditional statments below + // This case statement computes the desired next state for the AHBlite, + // prioritizing address translations, then atomics, then data accesses, and + // finally instructions. This proposition controls HADDR so the PMA and PMP + // checkers can determine whether the access is allowed. If not, the actual + // NextWalkerState is set to IDLE. + + // *** This ability to squash accesses must be replicated by any bus + // interface that might be used in place of the ahblite. always_comb case (BusState) - IDLE: if (MMUTranslate) NextBusState = MMUTRANSLATE; - else if (AtomicMaskedM[1]) NextBusState = ATOMICREAD; - else if (MemReadM) NextBusState = MEMREAD; // Memory has priority over instructions - else if (MemWriteM) NextBusState = MEMWRITE; - else if (InstrReadF) NextBusState = INSTRREAD; - else NextBusState = IDLE; - MMUTRANSLATE: if (~HREADY) NextBusState = MMUTRANSLATE; - else NextBusState = IDLE; - ATOMICREAD: if (~HREADY) NextBusState = ATOMICREAD; - else NextBusState = ATOMICWRITE; - ATOMICWRITE: if (~HREADY) NextBusState = ATOMICWRITE; - else if (InstrReadF) NextBusState = INSTRREAD; - else NextBusState = IDLE; - MEMREAD: if (~HREADY) NextBusState = MEMREAD; - else if (InstrReadF) NextBusState = INSTRREADC; - else NextBusState = IDLE; - MEMWRITE: if (~HREADY) NextBusState = MEMWRITE; - else if (InstrReadF) NextBusState = INSTRREAD; - else NextBusState = IDLE; - INSTRREAD: - if (~HREADY) NextBusState = INSTRREAD; - else NextBusState = IDLE; // if (InstrReadF still high) - INSTRREADC: if (~HREADY) NextBusState = INSTRREADC; // "C" for "competing", meaning please don't mess up the memread in the W stage. - else NextBusState = IDLE; - default: NextBusState = IDLE; + IDLE: if (MMUTranslate) ProposedNextBusState = MMUTRANSLATE; + else if (AtomicMaskedM[1]) ProposedNextBusState = ATOMICREAD; + else if (MemReadM) ProposedNextBusState = MEMREAD; // Memory has priority over instructions + else if (MemWriteM) ProposedNextBusState = MEMWRITE; + else if (InstrReadF) ProposedNextBusState = INSTRREAD; + else ProposedNextBusState = IDLE; + MMUTRANSLATE: if (~HREADY) ProposedNextBusState = MMUTRANSLATE; + else ProposedNextBusState = IDLE; + ATOMICREAD: if (~HREADY) ProposedNextBusState = ATOMICREAD; + else ProposedNextBusState = ATOMICWRITE; + ATOMICWRITE: if (~HREADY) ProposedNextBusState = ATOMICWRITE; + else if (InstrReadF) ProposedNextBusState = INSTRREAD; + else ProposedNextBusState = IDLE; + MEMREAD: if (~HREADY) ProposedNextBusState = MEMREAD; + else if (InstrReadF) ProposedNextBusState = INSTRREADC; + else ProposedNextBusState = IDLE; + MEMWRITE: if (~HREADY) ProposedNextBusState = MEMWRITE; + else if (InstrReadF) ProposedNextBusState = INSTRREAD; + else ProposedNextBusState = IDLE; + INSTRREAD: if (~HREADY) ProposedNextBusState = INSTRREAD; + else ProposedNextBusState = IDLE; // if (InstrReadF still high) + INSTRREADC: if (~HREADY) ProposedNextBusState = INSTRREADC; // "C" for "competing", meaning please don't mess up the memread in the W stage. + else ProposedNextBusState = IDLE; + default: ProposedNextBusState = IDLE; endcase + // Determine access type (important for determining whether to fault) + assign AtomicAccessM = (ProposedNextBusState == ATOMICREAD) || (ProposedNextBusState == ATOMICWRITE); + assign ExecuteAccessF = (ProposedNextBusState == INSTRREAD) || (ProposedNextBusState == INSTRREADC); + assign WriteAccessM = (ProposedNextBusState == MEMWRITE) || (ProposedNextBusState == ATOMICWRITE); + assign ReadAccessM = (ProposedNextBusState == MEMREAD) || (ProposedNextBusState == ATOMICREAD) || + (ProposedNextBusState == MMUTRANSLATE); + + // The PMA and PMP checkers can decide to squash the access + assign NextBusState = (SquashBusAccess) ? IDLE : ProposedNextBusState; + // stall signals // Note that we need to extend both stalls when MMUTRANSLATE goes to idle, // since translation might not be complete. @@ -150,16 +161,9 @@ module ahblite ( assign #1 InstrStall = ((NextBusState == INSTRREAD) || (NextBusState == INSTRREADC) || MMUStall); - // Determine access type (important for determining whether to fault) - assign Atomic = ((NextBusState == ATOMICREAD) || (NextBusState == ATOMICWRITE)); - assign Execute = ((NextBusState == INSTRREAD) || (NextBusState == INSTRREADC)); - assign Write = ((NextBusState == MEMWRITE) || (NextBusState == ATOMICWRITE)); - assign Read = ((NextBusState == MEMREAD) || (NextBusState == ATOMICREAD) || - (NextBusState == MMUTRANSLATE)); - // bus outputs - assign #1 GrantData = (NextBusState == MEMREAD) || (NextBusState == MEMWRITE) || - (NextBusState == ATOMICREAD) || (NextBusState == ATOMICWRITE); + assign #1 GrantData = (ProposedNextBusState == MEMREAD) || (ProposedNextBusState == MEMWRITE) || + (ProposedNextBusState == ATOMICREAD) || (ProposedNextBusState == ATOMICWRITE); assign #1 AccessAddress = (GrantData) ? MemPAdrM[31:0] : InstrPAdrF[31:0]; assign #1 HADDR = (MMUTranslate) ? MMUPAdr[31:0] : AccessAddress; generate @@ -184,7 +188,7 @@ module ahblite ( // Route signals to Instruction and Data Caches // *** assumes AHBW = XLEN - assign MMUReady = (BusState == MMUTRANSLATE && NextBusState == IDLE); + assign MMUReady = (BusState == MMUTRANSLATE && HREADY); assign InstrRData = HRDATA; assign InstrAckF = (BusState == INSTRREAD) && (NextBusState != INSTRREAD) || (BusState == INSTRREADC) && (NextBusState != INSTRREADC); diff --git a/wally-pipelined/src/privileged/csr.sv b/wally-pipelined/src/privileged/csr.sv index b457f7d34..36074415b 100644 --- a/wally-pipelined/src/privileged/csr.sv +++ b/wally-pipelined/src/privileged/csr.sv @@ -54,6 +54,8 @@ module csr #(parameter output logic [11:0] MIP_REGW, MIE_REGW, output logic STATUS_MIE, STATUS_SIE, output logic STATUS_MXR, STATUS_SUM, + output logic STATUS_MPRV, + output logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15], input logic [4:0] SetFflagsM, output logic [2:0] FRM_REGW, // output logic [11:0] MIP_REGW, SIP_REGW, UIP_REGW, MIE_REGW, SIE_REGW, UIE_REGW, diff --git a/wally-pipelined/src/privileged/csrm.sv b/wally-pipelined/src/privileged/csrm.sv index 5ab8fa38d..374a2a594 100644 --- a/wally-pipelined/src/privileged/csrm.sv +++ b/wally-pipelined/src/privileged/csrm.sv @@ -91,6 +91,7 @@ module csrm #(parameter output logic [`XLEN-1:0] CSRMReadValM, MEPC_REGW, MTVEC_REGW, output logic [31:0] MCOUNTEREN_REGW, MCOUNTINHIBIT_REGW, output logic [`XLEN-1:0] MEDELEG_REGW, MIDELEG_REGW, + output logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15], input logic [11:0] MIP_REGW, MIE_REGW, output logic WriteMSTATUSM, output logic IllegalCSRMAccessM, IllegalCSRMWriteReadonlyM @@ -99,8 +100,6 @@ module csrm #(parameter logic [`XLEN-1:0] MISA_REGW; logic [`XLEN-1:0] MSCRATCH_REGW,MCAUSE_REGW, MTVAL_REGW; logic [63:0] PMPCFG01_REGW, PMPCFG23_REGW; // 64-bit registers in RV64, or two 32-bit registers in RV32 - logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15]; // *** Might have to make 16 individual registers - //logic [`XLEN-1:0] PMPADDR0_REGW; logic WriteMTVECM, WriteMEDELEGM, WriteMIDELEGM; logic WriteMSCRATCHM, WriteMEPCM, WriteMCAUSEM, WriteMTVALM; diff --git a/wally-pipelined/src/privileged/csrsr.sv b/wally-pipelined/src/privileged/csrsr.sv index ecfcf4e82..8c5c7a3d1 100644 --- a/wally-pipelined/src/privileged/csrsr.sv +++ b/wally-pipelined/src/privileged/csrsr.sv @@ -37,10 +37,11 @@ module csrsr ( output logic [1:0] STATUS_MPP, output logic STATUS_SPP, STATUS_TSR, output logic STATUS_MIE, STATUS_SIE, - output logic STATUS_MXR, STATUS_SUM + output logic STATUS_MXR, STATUS_SUM, + output logic STATUS_MPRV ); - logic STATUS_SD, STATUS_TW, STATUS_TVM, STATUS_SUM_INT, STATUS_MPRV, STATUS_MPRV_INT; + logic STATUS_SD, STATUS_TW, STATUS_TVM, STATUS_SUM_INT, STATUS_MPRV_INT; logic [1:0] STATUS_SXL, STATUS_UXL, STATUS_XS, STATUS_FS, STATUS_FS_INT, STATUS_MPP_NEXT; logic STATUS_MPIE, STATUS_SPIE, STATUS_UPIE, STATUS_UIE; diff --git a/wally-pipelined/src/ebu/pmachecker.sv b/wally-pipelined/src/privileged/pmachecker.sv similarity index 75% rename from wally-pipelined/src/ebu/pmachecker.sv rename to wally-pipelined/src/privileged/pmachecker.sv index 2f4e32dc2..214b9b4b9 100644 --- a/wally-pipelined/src/ebu/pmachecker.sv +++ b/wally-pipelined/src/privileged/pmachecker.sv @@ -28,22 +28,22 @@ `include "wally-config.vh" module pmachecker ( + input logic clk, reset, + input logic [31:0] HADDR, input logic [2:0] HSIZE, - input logic HWRITE, input logic [2:0] HBURST, - input logic Atomic, Execute, Write, Read, + input logic AtomicAccessM, ExecuteAccessF, WriteAccessM, ReadAccessM, - // *** Add pipeline suffixes output logic Cacheable, Idempotent, AtomicAllowed, - output logic SquashAHBAccess, + output logic PMASquashBusAccess, output logic [5:0] HSELRegions, - output logic InstrAccessFaultF, - output logic LoadAccessFaultM, - output logic StoreAccessFaultM + output logic PMAInstrAccessFaultF, + output logic PMALoadAccessFaultM, + output logic PMAStoreAccessFaultM ); // Signals are high if the memory access is within the given region @@ -51,6 +51,7 @@ module pmachecker ( logic PreHSELUART; + logic ExecutableRegion, ReadableRegion, WritableRegion; logic Empty; // Determine which region of physical memory (if any) is being accessed @@ -61,6 +62,7 @@ module pmachecker ( adrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, PreHSELUART); adrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, HSELPLIC); + // *** Should this fault? assign HSELUART = PreHSELUART && (HSIZE == 3'b000); // only byte writes to UART are supported // Swizzle region bits @@ -75,12 +77,17 @@ module pmachecker ( // *** Temporarily assume only RAM regions allow full atomic operations -- likely wrong assign AtomicAllowed = HSELBootTim | HSELTim; + assign ExecutableRegion = HSELBootTim | HSELTim; + assign ReadableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; + assign WritableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; + assign Empty = ~|HSELRegions; - assign InstrAccessFaultF = Empty && Execute; - assign LoadAccessFaultM = Empty && Read; - assign StoreAccessFaultM = Empty && Write; + assign PMAInstrAccessFaultF = ExecuteAccessF && (Empty || ~ExecutableRegion); + assign PMALoadAccessFaultM = ReadAccessM && (Empty || ~ReadableRegion); + assign PMAStoreAccessFaultM = WriteAccessM && (Empty || ~WritableRegion); - assign SquashAHBAccess = InstrAccessFaultF || LoadAccessFaultM || StoreAccessFaultM; + //assign PMASquashBusAccess = PMAInstrAccessFaultF || PMALoadAccessFaultM || PMAStoreAccessFaultM; + assign PMASquashBusAccess = 0; endmodule diff --git a/wally-pipelined/src/privileged/pmpchecker.sv b/wally-pipelined/src/privileged/pmpchecker.sv new file mode 100644 index 000000000..2ca0b5984 --- /dev/null +++ b/wally-pipelined/src/privileged/pmpchecker.sv @@ -0,0 +1,104 @@ +/////////////////////////////////////////// +// pmpchecker.sv +// +// Written: tfleming@hmc.edu & jtorrey@hmc.edu 28 April 2021 +// Modified: +// +// Purpose: Examines all physical memory accesses and checks them against the +// current values of the physical memory protection (PMP) registers. +// Can raise an access fault on illegal reads, writes, and instruction +// fetches. +// +// A component of the Wally configurable RISC-V project. +// +// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University +// +// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation +// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, +// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software +// is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS +// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +/////////////////////////////////////////// + +`include "wally-config.vh" + +module pmpchecker ( + input logic clk, reset, + + input logic [31:0] HADDR, + + input logic [1:0] PrivilegeModeW, + + input logic [1:0] STATUS_MPP, + input logic STATUS_MPRV, + + input logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15], + + input logic ExecuteAccessF, WriteAccessM, ReadAccessM, + + output logic PMPSquashBusAccess, + + output logic PMPInstrAccessFaultF, + output logic PMPLoadAccessFaultM, + output logic PMPStoreAccessFaultM +); + + assign PMPSquashBusAccess = '0; + assign PMPInstrAccessFaultF = '0; + assign PMPLoadAccessFaultM = '0; + assign PMPStoreAccessFaultM = '0; + + + + /* + // Signals are high if the memory access is within the given region + logic HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC; + + logic PreHSELUART; + + logic ExecutableRegion, ReadableRegion, WritableRegion; + logic Empty; + + // Determine which region of physical memory (if any) is being accessed + adrdec boottimdec(HADDR, `BOOTTIMBASE, `BOOTTIMRANGE, HSELBootTim); + adrdec timdec(HADDR, `TIMBASE, `TIMRANGE, HSELTim); + adrdec clintdec(HADDR, `CLINTBASE, `CLINTRANGE, HSELCLINT); + adrdec gpiodec(HADDR, `GPIOBASE, `GPIORANGE, HSELGPIO); + adrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, PreHSELUART); + adrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, HSELPLIC); + + // *** Should this fault? + assign HSELUART = PreHSELUART && (HSIZE == 3'b000); // only byte writes to UART are supported + + // Swizzle region bits + assign HSELRegions = {HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC}; + + // Only RAM memory regions are cacheable + assign Cacheable = HSELBootTim | HSELTim; + + // *** Temporarily assume only RAM regions are idempotent -- likely wrong + assign Idempotent = HSELBootTim | HSELTim; + + // *** Temporarily assume only RAM regions allow full atomic operations -- likely wrong + assign AtomicAllowed = HSELBootTim | HSELTim; + + assign ExecutableRegion = HSELBootTim | HSELTim; + assign ReadableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; + assign WritableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; + + assign Empty = ~|HSELRegions; + + assign InstrAccessFaultF = ExecuteAccessF && (Empty || ~ExecutableRegion); + assign LoadAccessFaultM = ReadAccessM && (Empty || ~ReadableRegion); + assign StoreAccessFaultM = WriteAccessM && (Empty || ~WritableRegion); + + assign SquashBusAccess = InstrAccessFaultF || LoadAccessFaultM || StoreAccessFaultM; + */ + +endmodule diff --git a/wally-pipelined/src/privileged/privileged.sv b/wally-pipelined/src/privileged/privileged.sv index ef312c7b6..493f8c894 100644 --- a/wally-pipelined/src/privileged/privileged.sv +++ b/wally-pipelined/src/privileged/privileged.sv @@ -62,9 +62,9 @@ module privileged ( input logic [31:0] HADDR, input logic [2:0] HSIZE, HBURST, input logic HWRITE, - input logic Atomic, Execute, Write, Read, + input logic AtomicAccessM, ExecuteAccessF, WriteAccessM, ReadAccessM, output logic Cacheable, Idempotent, AtomicAllowed, - output logic SquashAHBAccess, + output logic SquashBusAccess, output logic [5:0] HSELRegions ); @@ -90,9 +90,16 @@ module privileged ( logic [1:0] STATUS_MPP; logic STATUS_SPP, STATUS_TSR; logic STATUS_MIE, STATUS_SIE; + logic STATUS_MPRV; logic [11:0] MIP_REGW, MIE_REGW; logic md, sd; + logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15]; + + logic PMASquashBusAccess, PMPSquashBusAccess; + logic PMAInstrAccessFaultF, PMALoadAccessFaultM, PMAStoreAccessFaultM; + logic PMPInstrAccessFaultF, PMPLoadAccessFaultM, PMPStoreAccessFaultM; + /////////////////////////////////////////// // track the current privilege level /////////////////////////////////////////// @@ -137,6 +144,7 @@ module privileged ( /////////////////////////////////////////// pmachecker pmachecker(.*); + pmpchecker pmpchecker(.*); /////////////////////////////////////////// // Extract exceptions by name and handle them @@ -153,6 +161,12 @@ module privileged ( assign LoadPageFaultM = DTLBLoadPageFaultM || WalkerLoadPageFaultM; assign StorePageFaultM = DTLBStorePageFaultM || WalkerStorePageFaultM; + assign InstrAccessFaultF = PMAInstrAccessFaultF || PMPInstrAccessFaultF; + assign LoadAccessFaultM = PMALoadAccessFaultM || PMPLoadAccessFaultM; + assign StoreAccessFaultM = PMAStoreAccessFaultM || PMPStoreAccessFaultM; + + assign SquashBusAccess = PMASquashBusAccess || PMPSquashBusAccess; + // pipeline fault signals flopenrc #(2) faultregD(clk, reset, FlushD, ~StallD, {InstrPageFaultF, InstrAccessFaultF}, diff --git a/wally-pipelined/src/wally/wallypipelinedhart.sv b/wally-pipelined/src/wally/wallypipelinedhart.sv index 8bf503c9b..b91e2e3a5 100644 --- a/wally-pipelined/src/wally/wallypipelinedhart.sv +++ b/wally-pipelined/src/wally/wallypipelinedhart.sv @@ -112,9 +112,9 @@ module wallypipelinedhart ( logic [1:0] PageTypeF, PageTypeM; // PMA checker signals - logic Atomic, Execute, Write, Read; + logic AtomicAccessM, ExecuteAccessF, WriteAccessM, ReadAccessM; logic Cacheable, Idempotent, AtomicAllowed; - logic SquashAHBAccess; + logic SquashBusAccess; // IMem stalls logic ICacheStallF; From 00c3b5a0335d09a09d7d6509d48196f3f448436e Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Mon, 3 May 2021 17:36:25 -0400 Subject: [PATCH 06/12] Remove remnants of InstrReadC --- wally-pipelined/src/ebu/ahblite.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/wally-pipelined/src/ebu/ahblite.sv b/wally-pipelined/src/ebu/ahblite.sv index 9fc645cef..29bdd7bb6 100644 --- a/wally-pipelined/src/ebu/ahblite.sv +++ b/wally-pipelined/src/ebu/ahblite.sv @@ -129,7 +129,7 @@ module ahblite ( else if (InstrReadF) ProposedNextBusState = INSTRREAD; else ProposedNextBusState = IDLE; MEMREAD: if (~HREADY) ProposedNextBusState = MEMREAD; - else if (InstrReadF) ProposedNextBusState = INSTRREADC; + else if (InstrReadF) ProposedNextBusState = INSTRREAD; else ProposedNextBusState = IDLE; MEMWRITE: if (~HREADY) ProposedNextBusState = MEMWRITE; else if (InstrReadF) ProposedNextBusState = INSTRREAD; @@ -141,7 +141,7 @@ module ahblite ( // Determine access type (important for determining whether to fault) assign AtomicAccessM = (ProposedNextBusState == ATOMICREAD) || (ProposedNextBusState == ATOMICWRITE); - assign ExecuteAccessF = (ProposedNextBusState == INSTRREAD) || (ProposedNextBusState == INSTRREADC); + assign ExecuteAccessF = (ProposedNextBusState == INSTRREAD); assign WriteAccessM = (ProposedNextBusState == MEMWRITE) || (ProposedNextBusState == ATOMICWRITE); assign ReadAccessM = (ProposedNextBusState == MEMREAD) || (ProposedNextBusState == ATOMICREAD) || (ProposedNextBusState == MMUTRANSLATE); From 86a93d77b4441f643a58a5d87edd8b02db86f486 Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Mon, 3 May 2021 17:37:42 -0400 Subject: [PATCH 07/12] Implement PMP checker and revise PMA checker --- wally-pipelined/src/privileged/csr.sv | 1 + wally-pipelined/src/privileged/csrm.sv | 5 +- wally-pipelined/src/privileged/pmachecker.sv | 98 +++++++++---- wally-pipelined/src/privileged/pmpadrdec.sv | 120 ++++++++++++++++ wally-pipelined/src/privileged/pmpchecker.sv | 142 +++++++++++-------- wally-pipelined/src/privileged/privileged.sv | 1 + 6 files changed, 277 insertions(+), 90 deletions(-) create mode 100644 wally-pipelined/src/privileged/pmpadrdec.sv diff --git a/wally-pipelined/src/privileged/csr.sv b/wally-pipelined/src/privileged/csr.sv index 3c0a193e8..744b8f9bf 100644 --- a/wally-pipelined/src/privileged/csr.sv +++ b/wally-pipelined/src/privileged/csr.sv @@ -56,6 +56,7 @@ module csr #(parameter output logic STATUS_MIE, STATUS_SIE, output logic STATUS_MXR, STATUS_SUM, output logic STATUS_MPRV, + output logic [63:0] PMPCFG01_REGW, PMPCFG23_REGW, output logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15], input logic [4:0] SetFflagsM, output logic [2:0] FRM_REGW, diff --git a/wally-pipelined/src/privileged/csrm.sv b/wally-pipelined/src/privileged/csrm.sv index 959fb1cca..4fecb2d9c 100644 --- a/wally-pipelined/src/privileged/csrm.sv +++ b/wally-pipelined/src/privileged/csrm.sv @@ -90,7 +90,9 @@ module csrm #(parameter input logic [`XLEN-1:0] CSRWriteValM, output logic [`XLEN-1:0] CSRMReadValM, MEPC_REGW, MTVEC_REGW, output logic [31:0] MCOUNTEREN_REGW, MCOUNTINHIBIT_REGW, - output logic [`XLEN-1:0] MEDELEG_REGW, MIDELEG_REGW, + output logic [`XLEN-1:0] MEDELEG_REGW, MIDELEG_REGW, + // 64-bit registers in RV64, or two 32-bit registers in RV32 + output logic [63:0] PMPCFG01_REGW, PMPCFG23_REGW, output logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15], input logic [11:0] MIP_REGW, MIE_REGW, output logic WriteMSTATUSM, @@ -99,7 +101,6 @@ module csrm #(parameter logic [`XLEN-1:0] MISA_REGW; logic [`XLEN-1:0] MSCRATCH_REGW, MCAUSE_REGW, MTVAL_REGW; - logic [63:0] PMPCFG01_REGW, PMPCFG23_REGW; // 64-bit registers in RV64, or two 32-bit registers in RV32 logic WriteMTVECM, WriteMEDELEGM, WriteMIDELEGM; logic WriteMSCRATCHM, WriteMEPCM, WriteMCAUSEM, WriteMTVALM; diff --git a/wally-pipelined/src/privileged/pmachecker.sv b/wally-pipelined/src/privileged/pmachecker.sv index 214b9b4b9..37c780c42 100644 --- a/wally-pipelined/src/privileged/pmachecker.sv +++ b/wally-pipelined/src/privileged/pmachecker.sv @@ -47,47 +47,83 @@ module pmachecker ( ); // Signals are high if the memory access is within the given region + logic BootTim, Tim, CLINT, GPIO, UART, PLIC; + logic [5:0] Regions; + + // Actual HSEL signals sent to uncore logic HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC; + logic ValidBootTim, ValidTim, ValidCLINT, ValidGPIO, ValidUART, ValidPLIC; - logic PreHSELUART; + // Attributes of memory region accessed + logic Executable, Readable, Writable; - logic ExecutableRegion, ReadableRegion, WritableRegion; - logic Empty; + logic Fault; - // Determine which region of physical memory (if any) is being accessed - adrdec boottimdec(HADDR, `BOOTTIMBASE, `BOOTTIMRANGE, HSELBootTim); - adrdec timdec(HADDR, `TIMBASE, `TIMRANGE, HSELTim); - adrdec clintdec(HADDR, `CLINTBASE, `CLINTRANGE, HSELCLINT); - adrdec gpiodec(HADDR, `GPIOBASE, `GPIORANGE, HSELGPIO); - adrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, PreHSELUART); - adrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, HSELPLIC); + attributes attributes(.Address(HADDR), .*); - // *** Should this fault? - assign HSELUART = PreHSELUART && (HSIZE == 3'b000); // only byte writes to UART are supported + // Unswizzle region bits + assign {BootTim, Tim, CLINT, GPIO, UART, PLIC} = Regions; + + assign ValidBootTim = '1; + assign ValidTim = '1; + assign ValidCLINT = ~ExecuteAccessF && (HSIZE == 3'b010); + assign ValidGPIO = ~ExecuteAccessF && (HSIZE == 3'b010); + assign ValidUART = ~ExecuteAccessF && (HSIZE == 3'b000); + + assign HSELBootTim = BootTim && ValidBootTim; + assign HSELTim = Tim && ValidTim; + assign HSELCLINT = CLINT && ValidCLINT; + assign HSELGPIO = GPIO && ValidGPIO; + assign HSELUART = UART && ValidUART; // only byte writes to UART are supported + assign HSELPLIC = PLIC && ValidPLIC; // Swizzle region bits assign HSELRegions = {HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC}; - // Only RAM memory regions are cacheable - assign Cacheable = HSELBootTim | HSELTim; + assign Fault = ~|HSELRegions; - // *** Temporarily assume only RAM regions are idempotent -- likely wrong - assign Idempotent = HSELBootTim | HSELTim; + assign PMAInstrAccessFaultF = ExecuteAccessF && Fault; + assign PMALoadAccessFaultM = ReadAccessM && Fault; + assign PMAStoreAccessFaultM = WriteAccessM && Fault; - // *** Temporarily assume only RAM regions allow full atomic operations -- likely wrong - assign AtomicAllowed = HSELBootTim | HSELTim; - - assign ExecutableRegion = HSELBootTim | HSELTim; - assign ReadableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; - assign WritableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; - - assign Empty = ~|HSELRegions; - - assign PMAInstrAccessFaultF = ExecuteAccessF && (Empty || ~ExecutableRegion); - assign PMALoadAccessFaultM = ReadAccessM && (Empty || ~ReadableRegion); - assign PMAStoreAccessFaultM = WriteAccessM && (Empty || ~WritableRegion); - - //assign PMASquashBusAccess = PMAInstrAccessFaultF || PMALoadAccessFaultM || PMAStoreAccessFaultM; - assign PMASquashBusAccess = 0; + assign PMASquashBusAccess = PMAInstrAccessFaultF || PMALoadAccessFaultM || PMAStoreAccessFaultM; + +endmodule + +module attributes ( + input logic clk, reset, + + input logic [31:0] Address, + + output logic [5:0] Regions, + + output logic Cacheable, Idempotent, AtomicAllowed, + output logic Executable, Readable, Writable +); + + // Signals are high if the memory access is within the given region + logic BootTim, Tim, CLINT, GPIO, UART, PLIC; + + // Determine which region of physical memory (if any) is being accessed + adrdec boottimdec(Address, `BOOTTIMBASE, `BOOTTIMRANGE, BootTim); + adrdec timdec(Address, `TIMBASE, `TIMRANGE, Tim); + adrdec clintdec(Address, `CLINTBASE, `CLINTRANGE, CLINT); + adrdec gpiodec(Address, `GPIOBASE, `GPIORANGE, GPIO); + adrdec uartdec(Address, `UARTBASE, `UARTRANGE, UART); + adrdec plicdec(Address, `PLICBASE, `PLICRANGE, PLIC); + + // Swizzle region bits + assign Regions = {BootTim, Tim, CLINT, GPIO, UART, PLIC}; + + // Only RAM memory regions are cacheable + assign Cacheable = BootTim | Tim; + + assign Idempotent = BootTim | Tim; + + assign AtomicAllowed = BootTim | Tim; + + assign Executable = BootTim | Tim; + assign Readable = BootTim | Tim | CLINT | GPIO | UART | PLIC; + assign Writable = BootTim | Tim | CLINT | GPIO | UART | PLIC; endmodule diff --git a/wally-pipelined/src/privileged/pmpadrdec.sv b/wally-pipelined/src/privileged/pmpadrdec.sv new file mode 100644 index 000000000..e3aef02ee --- /dev/null +++ b/wally-pipelined/src/privileged/pmpadrdec.sv @@ -0,0 +1,120 @@ +/////////////////////////////////////////// +// pmpadrdec.sv +// +// Written: tfleming@hmc.edu 28 April 2021 +// Modified: +// +// Purpose: Address decoder for the PMP checker. Decides whether a given address +// falls within the PMP range for each address-matching mode +// (top-of-range/TOR, naturally aligned four-byte region/NA4, and +// naturally aligned power-of-two region/NAPOT), then selects the +// output based on which mode is input. +// +// A component of the Wally configurable RISC-V project. +// +// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University +// +// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation +// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, +// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software +// is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS +// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +/////////////////////////////////////////// + +`include "wally-config.vh" +`include "wally-constants.vh" + +module pmpadrdec ( + input logic [31:0] HADDR, + + input logic [1:0] AdrMode, + input logic [`XLEN-1:0] PreviousPMPAdr, CurrentPMPAdr, + output logic Match +); + + localparam TOR = 2'b01; + localparam NA4 = 2'b10; + localparam NAPOT = 2'b11; + + logic TORMatch, NA4Match, NAPOTMatch; + + logic [31:0] PreviousAdrFull, CurrentAdrFull; + + logic [33:0] Range; + + assign PreviousAdrFull = {PreviousPMPAdr[29:0], 2'b00}; + assign CurrentAdrFull = {CurrentPMPAdr[29:0], 2'b00}; + + // Top-of-range (TOR) + // *** Check if this synthesizes + // if not, literally do comparison (HADDR - PreviousAdrFull == 0) + assign TORMatch = HADDR inside {[PreviousAdrFull:CurrentAdrFull]}; + // *** cut number of comparators in half (treat entire pmp space as TOR and have 16 comparators) + + // Naturally aligned four-byte region + adrdec na4dec(HADDR, CurrentAdrFull, (2**2)-1, NA4Match); + + generate + if (`XLEN == 32 || `XLEN == 64) begin + // priority encoder to translate address to range + // *** We'd like to replace this with a + // *** We should not be truncating 64 bit physical addresses to 32 bits... + always_comb + casez (CurrentPMPAdr[31:0]) + 32'b???????????????????????????????0: Range = (2**3) - 1; + 32'b??????????????????????????????01: Range = (2**4) - 1; + 32'b?????????????????????????????011: Range = (2**5) - 1; + 32'b????????????????????????????0111: Range = (2**6) - 1; + 32'b???????????????????????????01111: Range = (2**7) - 1; + 32'b??????????????????????????011111: Range = (2**8) - 1; + 32'b?????????????????????????0111111: Range = (2**9) - 1; + 32'b????????????????????????01111111: Range = (2**10) - 1; + 32'b???????????????????????011111111: Range = (2**11) - 1; + 32'b??????????????????????0111111111: Range = (2**12) - 1; + 32'b?????????????????????01111111111: Range = (2**13) - 1; + 32'b????????????????????011111111111: Range = (2**14) - 1; + 32'b???????????????????0111111111111: Range = (2**15) - 1; + 32'b??????????????????01111111111111: Range = (2**16) - 1; + 32'b?????????????????011111111111111: Range = (2**17) - 1; + 32'b????????????????0111111111111111: Range = (2**18) - 1; + 32'b???????????????01111111111111111: Range = (2**19) - 1; + 32'b??????????????011111111111111111: Range = (2**20) - 1; + 32'b?????????????0111111111111111111: Range = (2**21) - 1; + 32'b????????????01111111111111111111: Range = (2**22) - 1; + 32'b???????????011111111111111111111: Range = (2**23) - 1; + 32'b??????????0111111111111111111111: Range = (2**24) - 1; + 32'b?????????01111111111111111111111: Range = (2**25) - 1; + 32'b????????011111111111111111111111: Range = (2**26) - 1; + 32'b???????0111111111111111111111111: Range = (2**27) - 1; + 32'b??????01111111111111111111111111: Range = (2**28) - 1; + 32'b?????011111111111111111111111111: Range = (2**29) - 1; + 32'b????0111111111111111111111111111: Range = (2**30) - 1; + 32'b???01111111111111111111111111111: Range = (2**31) - 1; + 32'b??011111111111111111111111111111: Range = (2**32) - 1; + 32'b?0111111111111111111111111111111: Range = (2**33) - 1; + 32'b01111111111111111111111111111111: Range = (2**34) - 1; + 32'b11111111111111111111111111111111: Range = (2**35) - 1; + default: Range = '0; + endcase + end else begin + assign Range = '0; + end + endgenerate + + // *** Range should not be truncated... but our physical address space is + // currently only 32 bits wide. + adrdec napotdec(HADDR, CurrentAdrFull, Range[31:0], NAPOTMatch); + + assign Match = (AdrMode == TOR) ? TORMatch : + (AdrMode == NA4) ? NA4Match : + (AdrMode == NAPOT) ? NAPOTMatch : + 0; + +endmodule + diff --git a/wally-pipelined/src/privileged/pmpchecker.sv b/wally-pipelined/src/privileged/pmpchecker.sv index 2ca0b5984..f25156015 100644 --- a/wally-pipelined/src/privileged/pmpchecker.sv +++ b/wally-pipelined/src/privileged/pmpchecker.sv @@ -29,76 +29,104 @@ `include "wally-config.vh" module pmpchecker ( - input logic clk, reset, + input logic clk, reset, - input logic [31:0] HADDR, + input logic [31:0] HADDR, - input logic [1:0] PrivilegeModeW, + input logic [1:0] PrivilegeModeW, - input logic [1:0] STATUS_MPP, - input logic STATUS_MPRV, + input logic [1:0] STATUS_MPP, + input logic STATUS_MPRV, + + input logic [63:0] PMPCFG01_REGW, PMPCFG23_REGW, input logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15], - input logic ExecuteAccessF, WriteAccessM, ReadAccessM, + input logic ExecuteAccessF, WriteAccessM, ReadAccessM, - output logic PMPSquashBusAccess, + output logic PMPSquashBusAccess, - output logic PMPInstrAccessFaultF, - output logic PMPLoadAccessFaultM, - output logic PMPStoreAccessFaultM + output logic PMPInstrAccessFaultF, + output logic PMPLoadAccessFaultM, + output logic PMPStoreAccessFaultM ); - assign PMPSquashBusAccess = '0; - assign PMPInstrAccessFaultF = '0; - assign PMPLoadAccessFaultM = '0; - assign PMPStoreAccessFaultM = '0; + // Bit i is high when the address falls in PMP region i + logic [15:0] Regions; + logic [3:0] MatchedRegion; + logic Match; - + logic [7:0] PMPCFG [0:15]; + + logic L_Bit, X_Bit, W_Bit, R_Bit; + logic InvalidExecute, InvalidWrite, InvalidRead; + + assign {PMPCFG[15], PMPCFG[14], PMPCFG[13], PMPCFG[12], + PMPCFG[11], PMPCFG[10], PMPCFG[9], PMPCFG[8]} = PMPCFG23_REGW; + + assign {PMPCFG[7], PMPCFG[6], PMPCFG[5], PMPCFG[4], + PMPCFG[3], PMPCFG[2], PMPCFG[1], PMPCFG[0]} = PMPCFG01_REGW; + + pmpadrdec pmpadrdec0(HADDR, PMPCFG[0][4:3], + '0, PMPADDR_ARRAY_REGW[0], + Regions[0]); + + generate + genvar i; + for (i = 1; i < 16; i++) begin + pmpadrdec pmpadrdec(HADDR, PMPCFG[i][4:3], + PMPADDR_ARRAY_REGW[i-1], PMPADDR_ARRAY_REGW[i], + Regions[i]); + end + endgenerate + + assign Match = |Regions; + + always_comb + casez (Regions) + 16'b???????????????1: MatchedRegion = 0; + 16'b??????????????10: MatchedRegion = 1; + 16'b?????????????100: MatchedRegion = 2; + 16'b????????????1000: MatchedRegion = 3; + 16'b???????????10000: MatchedRegion = 4; + 16'b??????????100000: MatchedRegion = 5; + 16'b?????????1000000: MatchedRegion = 6; + 16'b????????10000000: MatchedRegion = 7; + 16'b???????100000000: MatchedRegion = 8; + 16'b??????1000000000: MatchedRegion = 9; + 16'b?????10000000000: MatchedRegion = 10; + 16'b????100000000000: MatchedRegion = 11; + 16'b???1000000000000: MatchedRegion = 12; + 16'b??10000000000000: MatchedRegion = 13; + 16'b?100000000000000: MatchedRegion = 14; + 16'b1000000000000000: MatchedRegion = 15; + default: MatchedRegion = 0; // Should only occur if there is no match + endcase + + assign L_Bit = PMPCFG[MatchedRegion][7]; + assign X_Bit = PMPCFG[MatchedRegion][2]; + assign W_Bit = PMPCFG[MatchedRegion][1]; + assign R_Bit = PMPCFG[MatchedRegion][0]; + + assign InvalidExecute = ExecuteAccessF && ~X_Bit; + assign InvalidWrite = WriteAccessM && ~W_Bit; + assign InvalidRead = ReadAccessM && ~R_Bit; + + assign PMPInstrAccessFaultF = (PrivilegeModeW == `M_MODE) ? + Match && L_Bit && InvalidExecute : + ~Match || InvalidExecute; + assign PMPStoreAccessFaultM = (PrivilegeModeW == `M_MODE) ? + Match && L_Bit && InvalidWrite : + ~Match || InvalidWrite; + assign PMPLoadAccessFaultM = (PrivilegeModeW == `M_MODE) ? + Match && L_Bit && InvalidRead : + ~Match || InvalidRead; /* - // Signals are high if the memory access is within the given region - logic HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC; + If no PMP entry matches an M-mode access, the access succeeds. If no PMP entry matches an +S-mode or U-mode access, but at least one PMP entry is implemented, the access fails. +*/ - logic PreHSELUART; - - logic ExecutableRegion, ReadableRegion, WritableRegion; - logic Empty; - - // Determine which region of physical memory (if any) is being accessed - adrdec boottimdec(HADDR, `BOOTTIMBASE, `BOOTTIMRANGE, HSELBootTim); - adrdec timdec(HADDR, `TIMBASE, `TIMRANGE, HSELTim); - adrdec clintdec(HADDR, `CLINTBASE, `CLINTRANGE, HSELCLINT); - adrdec gpiodec(HADDR, `GPIOBASE, `GPIORANGE, HSELGPIO); - adrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, PreHSELUART); - adrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, HSELPLIC); - - // *** Should this fault? - assign HSELUART = PreHSELUART && (HSIZE == 3'b000); // only byte writes to UART are supported - - // Swizzle region bits - assign HSELRegions = {HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC}; - - // Only RAM memory regions are cacheable - assign Cacheable = HSELBootTim | HSELTim; - - // *** Temporarily assume only RAM regions are idempotent -- likely wrong - assign Idempotent = HSELBootTim | HSELTim; - - // *** Temporarily assume only RAM regions allow full atomic operations -- likely wrong - assign AtomicAllowed = HSELBootTim | HSELTim; - - assign ExecutableRegion = HSELBootTim | HSELTim; - assign ReadableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; - assign WritableRegion = HSELBootTim | HSELTim | HSELCLINT | HSELGPIO | HSELUART | HSELPLIC; - - assign Empty = ~|HSELRegions; - - assign InstrAccessFaultF = ExecuteAccessF && (Empty || ~ExecutableRegion); - assign LoadAccessFaultM = ReadAccessM && (Empty || ~ReadableRegion); - assign StoreAccessFaultM = WriteAccessM && (Empty || ~WritableRegion); - - assign SquashBusAccess = InstrAccessFaultF || LoadAccessFaultM || StoreAccessFaultM; - */ + assign PMPSquashBusAccess = PMPInstrAccessFaultF || PMPLoadAccessFaultM || PMPStoreAccessFaultM; endmodule diff --git a/wally-pipelined/src/privileged/privileged.sv b/wally-pipelined/src/privileged/privileged.sv index 900afc0e2..509f769aa 100644 --- a/wally-pipelined/src/privileged/privileged.sv +++ b/wally-pipelined/src/privileged/privileged.sv @@ -96,6 +96,7 @@ module privileged ( logic [11:0] MIP_REGW, MIE_REGW; logic md, sd; + logic [63:0] PMPCFG01_REGW, PMPCFG23_REGW; logic [`XLEN-1:0] PMPADDR_ARRAY_REGW [0:15]; logic PMASquashBusAccess, PMPSquashBusAccess; From f78f2b3b5d409735b3011cbc287a2ab3d208057f Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Mon, 3 May 2021 21:58:32 -0400 Subject: [PATCH 09/12] Adjust attributes in PMA checker --- wally-pipelined/src/privileged/pmachecker.sv | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/wally-pipelined/src/privileged/pmachecker.sv b/wally-pipelined/src/privileged/pmachecker.sv index 37c780c42..2526ec5e6 100644 --- a/wally-pipelined/src/privileged/pmachecker.sv +++ b/wally-pipelined/src/privileged/pmachecker.sv @@ -66,9 +66,10 @@ module pmachecker ( assign ValidBootTim = '1; assign ValidTim = '1; - assign ValidCLINT = ~ExecuteAccessF && (HSIZE == 3'b010); + assign ValidCLINT = ~ExecuteAccessF && ((HSIZE == 3'b011) || (HSIZE == 3'b010)); assign ValidGPIO = ~ExecuteAccessF && (HSIZE == 3'b010); assign ValidUART = ~ExecuteAccessF && (HSIZE == 3'b000); + assign ValidPLIC = ~ExecuteAccessF && (HSIZE == 3'b010); assign HSELBootTim = BootTim && ValidBootTim; assign HSELTim = Tim && ValidTim; From 1f6db293fab072b34e5384708ee76830695da0af Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Mon, 3 May 2021 23:15:23 -0400 Subject: [PATCH 10/12] Enable mmu tests in testbench --- wally-pipelined/testbench/testbench-imperas.sv | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv index debbd96c0..1505acf90 100644 --- a/wally-pipelined/testbench/testbench-imperas.sv +++ b/wally-pipelined/testbench/testbench-imperas.sv @@ -48,7 +48,7 @@ module testbench(); }; string tests64mmu[] = '{ - "rv64mmu/WALLY-VIRTUALMEMORY", "5000" + "rv64mmu/WALLY-VIRTUALMEMORY", "2000" }; string tests64f[] = '{ @@ -509,14 +509,14 @@ string tests32f[] = '{ end if (TESTSPERIPH) begin tests = tests64periph; end else begin - tests = {tests64i,tests64p,tests64periph}; + tests = {tests64p,tests64i,tests64periph}; if (`C_SUPPORTED) tests = {tests, tests64ic}; else tests = {tests, tests64iNOc}; if (`M_SUPPORTED) tests = {tests, tests64m}; // if (`F_SUPPORTED) tests = {tests64f, tests}; // if (`D_SUPPORTED) tests = {tests64d, tests}; if (`A_SUPPORTED) tests = {tests, tests64a}; - // if (`MEM_VIRTMEM) tests = {tests64mmu, tests}; + if (`MEM_VIRTMEM) tests = {tests, tests64mmu}; end //tests = {tests64a, tests}; @@ -532,7 +532,7 @@ string tests32f[] = '{ if (`M_SUPPORTED % 2 == 1) tests = {tests, tests32m}; // if (`F_SUPPORTED) tests = {tests32f, tests}; if (`A_SUPPORTED) tests = {tests, tests32a}; - if (`MEM_VIRTMEM) tests = {tests32mmu, tests}; + if (`MEM_VIRTMEM) tests = {tests, tests32mmu}; end end end From 4f5ef65aeb5750a3c040050628e51bf1936cf196 Mon Sep 17 00:00:00 2001 From: Thomas Fleming Date: Mon, 3 May 2021 23:50:21 -0400 Subject: [PATCH 11/12] Restore original order of tests --- wally-pipelined/testbench/testbench-imperas.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv index d1040d8fc..b4dc3c0d1 100644 --- a/wally-pipelined/testbench/testbench-imperas.sv +++ b/wally-pipelined/testbench/testbench-imperas.sv @@ -412,7 +412,7 @@ module testbench(); end if (TESTSPERIPH) begin tests = tests64periph; end else begin - tests = {tests64p,tests64i,tests64periph}; + tests = {tests64i,tests64p,tests64periph}; if (`C_SUPPORTED) tests = {tests, tests64ic}; else tests = {tests, tests64iNOc}; if (`M_SUPPORTED) tests = {tests, tests64m}; From 1556cc5b9fd15bcf8b75157ebe175abba30660fa Mon Sep 17 00:00:00 2001 From: Domenico Ottolia Date: Tue, 4 May 2021 01:04:12 -0400 Subject: [PATCH 12/12] Use correct begin_signature for rv64p/MCAUSE and rv64p/SCAUSE --- wally-pipelined/testbench/testbench-imperas.sv | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv index c186ae160..8e43f036d 100644 --- a/wally-pipelined/testbench/testbench-imperas.sv +++ b/wally-pipelined/testbench/testbench-imperas.sv @@ -348,8 +348,8 @@ module testbench(); }; string tests64p[] = '{ - "rv64p/WALLY-MCAUSE", "4000", - "rv64p/WALLY-SCAUSE", "3000", + "rv64p/WALLY-MCAUSE", "3000", + "rv64p/WALLY-SCAUSE", "2000", "rv64p/WALLY-MEPC", "5000", "rv64p/WALLY-SEPC", "4000", "rv64p/WALLY-MTVAL", "6000", @@ -423,7 +423,7 @@ module testbench(); end //tests = {tests64a, tests}; - //tests = tests64p; + tests = tests64p; end else begin // RV32 // *** add the 32 bit bp tests if (TESTSPERIPH) begin