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fix spacing in sha_instructions for style

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This commit is contained in:
James E. Stine 2024-03-05 08:59:45 -06:00
parent 0d7ea36883
commit 7bbc6413fb
5 changed files with 7 additions and 7 deletions
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6
src/ieu/sha_instructions/sha256sig0.sv
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@ -25,9 +25,9 @@
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module sha256sig0 #(parameter WIDTH=32) (
input logic [WIDTH-1:0] rs1,
output logic [WIDTH-1:0] result);
module sha256sig0 #(parameter WIDTH=32)
(input logic [WIDTH-1:0] rs1,
output logic [WIDTH-1:0] result);
logic [31:0] ror7;
logic [31:0] ror18;

2
src/ieu/sha_instructions/sha512sig0.sv
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@ -25,7 +25,7 @@
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module sha512sig0 (input logic [63:0] rs1, output logic [63:0] result);
module sha512sig0(input logic [63:0] rs1, output logic [63:0] result);
logic [63:0] ror1;
logic [63:0] ror8;

2
src/ieu/sha_instructions/sha512sig1.sv
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@ -25,7 +25,7 @@
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module sha512sig1 (input logic [63:0] rs1, output logic [63:0] result);
module sha512sig1(input logic [63:0] rs1, output logic [63:0] result);
logic [63:0] ror19;
logic [63:0] ror61;

2
src/ieu/sha_instructions/sha512sum0.sv
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@ -25,7 +25,7 @@
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module sha512sum0 (input logic [63:0] rs1, output logic [63:0] result);
module sha512sum0(input logic [63:0] rs1, output logic [63:0] result);
logic [63:0] ror28;
logic [63:0] ror34;

2
src/ieu/sha_instructions/sha512sum1.sv
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@ -25,7 +25,7 @@
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module sha512sum1 (input logic [63:0] rs1, output logic [63:0] result);
module sha512sum1(input logic [63:0] rs1, output logic [63:0] result);
logic [63:0] ror14;
logic [63:0] ror18;