From 7b0d1a78834d76e1e190a420b1c6b55265239055 Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 16 May 2023 11:37:01 -0700 Subject: [PATCH] Factored FMA tests out of the main 32/64 f/d tests to run in parallel and speed up sim --- sim/regression-wally | 4 ++-- testbench/testbench.sv | 4 ++++ testbench/tests.vh | 42 +++++++++++++++++++++++++++++++----------- 3 files changed, 37 insertions(+), 13 deletions(-) diff --git a/sim/regression-wally b/sim/regression-wally index fa112731a..6e7ccf388 100755 --- a/sim/regression-wally +++ b/sim/regression-wally @@ -85,7 +85,7 @@ for test in tests64i: configs.append(tc) tests32gcimperas = ["imperas32i", "imperas32f", "imperas32m", "imperas32c"] # unused -tests32gc = ["arch32f", "arch32d", "arch32i", "arch32priv", "arch32c", "arch32m", "arch32zi", "arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "wally32a", "wally32priv", "wally32periph"] +tests32gc = ["arch32f", "arch32d", "arch32f_fma", "arch32d_fma", "arch32i", "arch32priv", "arch32c", "arch32m", "arch32zi", "arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "wally32a", "wally32priv", "wally32periph"] for test in tests32gc: tc = TestCase( name=test, @@ -132,7 +132,7 @@ for test in ahbTests: grepstr="All tests ran without failures") configs.append(tc) -tests64gc = ["arch64f", "arch64d", "arch64i", "arch64zba", "arch64zbb", "arch64zbc", "arch64zbs", +tests64gc = ["arch64f", "arch64d", "arch64f_fma", "arch64d_fma", "arch64i", "arch64zba", "arch64zbb", "arch64zbc", "arch64zbs", "arch64priv", "arch64c", "arch64m", "arch64zi", "wally64a", "wally64periph", "wally64priv"] if (coverage): # delete all but 64gc tests when running coverage configs = [] diff --git a/testbench/testbench.sv b/testbench/testbench.sv index 9021b6448..f43b6a429 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -93,6 +93,8 @@ module testbench; "arch64m": if (`M_SUPPORTED) tests = arch64m; "arch64f": if (`F_SUPPORTED) tests = arch64f; "arch64d": if (`D_SUPPORTED) tests = arch64d; + "arch64f_fma": if (`F_SUPPORTED) tests = arch64f_fma; + "arch64d_fma": if (`D_SUPPORTED) tests = arch64d_fma; "arch64zi": if (`ZIFENCEI_SUPPORTED) tests = arch64zi; "imperas64i": tests = imperas64i; "imperas64f": if (`F_SUPPORTED) tests = imperas64f; @@ -124,6 +126,8 @@ module testbench; "arch32m": if (`M_SUPPORTED) tests = arch32m; "arch32f": if (`F_SUPPORTED) tests = arch32f; "arch32d": if (`D_SUPPORTED) tests = arch32d; + "arch32f_fma": if (`F_SUPPORTED) tests = arch32f_fma; + "arch32d_fma": if (`D_SUPPORTED) tests = arch32d_fma; "arch32zi": if (`ZIFENCEI_SUPPORTED) tests = arch32zi; "imperas32i": tests = imperas32i; "imperas32f": if (`F_SUPPORTED) tests = imperas32f; diff --git a/testbench/tests.vh b/testbench/tests.vh index ffe718188..822705fae 100644 --- a/testbench/tests.vh +++ b/testbench/tests.vh @@ -1066,6 +1066,14 @@ string imperas32f[] = '{ "rv64i_m/I/src/xori-01.S" }; + string arch64f_fma[] = '{ + `RISCVARCHTEST, + //"rv64i_m/F/src/fmadd_b15-01.S", + "rv64i_m/F/src/fmsub_b15-01.S" + // "rv64i_m/F/src/fnmadd_b15-01.S", + // "rv64i_m/F/src/fnmsub_b15-01.S" + }; + string arch64f[] = '{ `RISCVARCHTEST, "rv64i_m/F/src/fdiv_b1-01.S", @@ -1088,8 +1096,6 @@ string imperas32f[] = '{ "rv64i_m/F/src/fsqrt_b7-01.S", "rv64i_m/F/src/fsqrt_b8-01.S", "rv64i_m/F/src/fsqrt_b9-01.S", - - "rv64i_m/F/src/fadd_b10-01.S", "rv64i_m/F/src/fadd_b1-01.S", "rv64i_m/F/src/fadd_b11-01.S", @@ -1140,7 +1146,6 @@ string imperas32f[] = '{ "rv64i_m/F/src/flw-align-01.S", "rv64i_m/F/src/fmadd_b1-01.S", "rv64i_m/F/src/fmadd_b14-01.S", - //"rv64i_m/F/src/fmadd_b15-01.S", "rv64i_m/F/src/fmadd_b16-01.S", "rv64i_m/F/src/fmadd_b17-01.S", "rv64i_m/F/src/fmadd_b18-01.S", @@ -1157,7 +1162,6 @@ string imperas32f[] = '{ "rv64i_m/F/src/fmin_b19-01.S", "rv64i_m/F/src/fmsub_b1-01.S", "rv64i_m/F/src/fmsub_b14-01.S", - "rv64i_m/F/src/fmsub_b15-01.S", "rv64i_m/F/src/fmsub_b16-01.S", "rv64i_m/F/src/fmsub_b17-01.S", "rv64i_m/F/src/fmsub_b18-01.S", @@ -1188,7 +1192,6 @@ string imperas32f[] = '{ "rv64i_m/F/src/fmv.x.w_b29-01.S", "rv64i_m/F/src/fnmadd_b1-01.S", "rv64i_m/F/src/fnmadd_b14-01.S", - // "rv64i_m/F/src/fnmadd_b15-01.S", "rv64i_m/F/src/fnmadd_b16-01.S", "rv64i_m/F/src/fnmadd_b17-01.S", "rv64i_m/F/src/fnmadd_b18-01.S", @@ -1201,7 +1204,6 @@ string imperas32f[] = '{ "rv64i_m/F/src/fnmadd_b8-01.S", "rv64i_m/F/src/fnmsub_b1-01.S", "rv64i_m/F/src/fnmsub_b14-01.S", - // "rv64i_m/F/src/fnmsub_b15-01.S", "rv64i_m/F/src/fnmsub_b16-01.S", "rv64i_m/F/src/fnmsub_b17-01.S", "rv64i_m/F/src/fnmsub_b18-01.S", @@ -1238,6 +1240,13 @@ string imperas32f[] = '{ "rv64i_m/F/src/fsw-align-01.S" }; + string arch64d_fma[] = '{ + `RISCVARCHTEST, + //"rv64i_m/D/src/fmadd.d_b15-01.S", + //"rv64i_m/D/src/fmsub.d_b15-01.S", + "rv64i_m/D/src/fnmadd.d_b15-01.S" + // "rv64i_m/D/src/fnmsub.d_b15-01.S" + }; string arch64d[] = '{ `RISCVARCHTEST, @@ -1262,7 +1271,6 @@ string imperas32f[] = '{ "rv64i_m/D/src/fsqrt.d_b7-01.S", "rv64i_m/D/src/fsqrt.d_b8-01.S", "rv64i_m/D/src/fsqrt.d_b9-01.S", - "rv64i_m/D/src/fadd.d_b10-01.S", "rv64i_m/D/src/fadd.d_b1-01.S", "rv64i_m/D/src/fadd.d_b11-01.S", @@ -1526,6 +1534,14 @@ string arch64zbs[] = '{ "rv32i_m/M/src/mulhu-01.S" }; + string arch32f_fma[] = '{ + `RISCVARCHTEST, + "rv32i_m/F/src/fmadd_b15-01.S" + //"rv32i_m/F/src/fmsub_b15-01.S", + // "rv32i_m/F/src/fnmadd_b15-01.S", + // "rv32i_m/F/src/fnmsub_b15-01.S" + }; + string arch32f[] = '{ `RISCVARCHTEST, "rv32i_m/F/src/fdiv_b20-01.S", @@ -1579,7 +1595,6 @@ string arch64zbs[] = '{ "rv32i_m/F/src/flw-align-01.S", "rv32i_m/F/src/fmadd_b1-01.S", "rv32i_m/F/src/fmadd_b14-01.S", - "rv32i_m/F/src/fmadd_b15-01.S", "rv32i_m/F/src/fmadd_b16-01.S", "rv32i_m/F/src/fmadd_b17-01.S", "rv32i_m/F/src/fmadd_b18-01.S", @@ -1596,7 +1611,6 @@ string arch64zbs[] = '{ "rv32i_m/F/src/fmin_b19-01.S", "rv32i_m/F/src/fmsub_b1-01.S", "rv32i_m/F/src/fmsub_b14-01.S", - //"rv32i_m/F/src/fmsub_b15-01.S", "rv32i_m/F/src/fmsub_b16-01.S", "rv32i_m/F/src/fmsub_b17-01.S", "rv32i_m/F/src/fmsub_b18-01.S", @@ -1627,7 +1641,6 @@ string arch64zbs[] = '{ "rv32i_m/F/src/fmv.x.w_b29-01.S", "rv32i_m/F/src/fnmadd_b1-01.S", "rv32i_m/F/src/fnmadd_b14-01.S", - // "rv32i_m/F/src/fnmadd_b15-01.S", "rv32i_m/F/src/fnmadd_b16-01.S", "rv32i_m/F/src/fnmadd_b17-01.S", "rv32i_m/F/src/fnmadd_b18-01.S", @@ -1640,7 +1653,6 @@ string arch64zbs[] = '{ "rv32i_m/F/src/fnmadd_b8-01.S", "rv32i_m/F/src/fnmsub_b1-01.S", "rv32i_m/F/src/fnmsub_b14-01.S", - // "rv32i_m/F/src/fnmsub_b15-01.S", "rv32i_m/F/src/fnmsub_b16-01.S", "rv32i_m/F/src/fnmsub_b17-01.S", "rv32i_m/F/src/fnmsub_b18-01.S", @@ -1677,6 +1689,14 @@ string arch64zbs[] = '{ "rv32i_m/F/src/fsw-align-01.S" }; + string arch32d_fma[] = '{ + `RISCVARCHTEST, + //"rv32i_m/D/src/fmadd.d_b15-01.S", + //"rv32i_m/D/src/fmsub.d_b15-01.S", + // "rv32i_m/D/src/fnmadd.d_b15-01.S", + "rv32i_m/D/src/fnmsub.d_b15-01.S" + }; + string arch32d[] = '{ `RISCVARCHTEST, "rv32i_m/D/src/fadd.d_b10-01.S",