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https://github.com/openhwgroup/cvw
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Removed UncachedRW
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@ -55,7 +55,7 @@ module busfsm #(parameter integer LOGWPL)
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logic UnCachedBusRead;
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logic UnCachedBusRead;
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logic UnCachedBusWrite;
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logic UnCachedBusWrite;
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logic WordCountFlag;
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logic WordCountFlag;
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logic UnCachedAccess, UnCachedRW;
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logic UnCachedAccess;
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logic [2:0] LocalBurstType;
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logic [2:0] LocalBurstType;
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@ -100,8 +100,8 @@ module busfsm #(parameter integer LOGWPL)
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assign LocalBurstType = 3'b000;
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assign LocalBurstType = 3'b000;
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assign HBURST = (UnCachedRW) ? 3'b0 : LocalBurstType; // Don't want to use burst when doing an Uncached Access.
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assign HBURST = 3'b0;
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assign BusTransComplete = (UnCachedRW) ? BusAck : WordCountFlag & BusAck;
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assign BusTransComplete = BusAck;
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// Use SEQ if not doing first word, NONSEQ if doing the first read/write, and IDLE if finishing up.
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// Use SEQ if not doing first word, NONSEQ if doing the first read/write, and IDLE if finishing up.
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assign HTRANS = (BusRead | BusWrite) & (~BusTransComplete) ? AHB_NONSEQ : AHB_IDLE;
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assign HTRANS = (BusRead | BusWrite) & (~BusTransComplete) ? AHB_NONSEQ : AHB_IDLE;
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@ -119,8 +119,5 @@ module busfsm #(parameter integer LOGWPL)
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assign BusRead = UnCachedBusRead;
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assign BusRead = UnCachedBusRead;
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assign BufferCaptureEn = UnCachedBusRead;
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assign BufferCaptureEn = UnCachedBusRead;
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// Makes bus only do uncached reads/writes when we actually do uncached reads/writes. Needed because Cacheable is 0 when flushing cache.
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assign BusCommitted = BusCurrState != STATE_BUS_READY;
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assign UnCachedRW = UnCachedBusWrite | UnCachedBusRead;
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assign BusCommitted = BusCurrState != STATE_BUS_READY;
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endmodule
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endmodule
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