From bb072fba84731270db703bf1e039f761b461758c Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Sat, 6 Apr 2024 18:25:53 -0500 Subject: [PATCH 1/3] Fixed the buildroot issue. --- sim/questa/wally.do | 4 ++-- testbench/testbench.sv | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sim/questa/wally.do b/sim/questa/wally.do index 25dc33c6d..184da43d0 100644 --- a/sim/questa/wally.do +++ b/sim/questa/wally.do @@ -69,7 +69,7 @@ if {$argc >= 3} { set tbArgs $lst } set tbArgsLst [split $lst " "] - # might be able to remove this, but I'm keeping the code for now in case we need to separate the two types of args. + # separate the +args from the -G parameters foreach otherArg $tbArgsLst { if {[string index $otherArg 0] eq "+"} { lappend PlusArgs $otherArg @@ -105,7 +105,7 @@ vlog -lint -work ${WKDIR} +incdir+${CONFIG}/$1 +incdir+${CONFIG}/deriv/$1 +incdi # remove +acc flag for faster sim during regressions if there is no need to access internal signals vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${tbArgs} -o testbenchopt ${CoverageVoptArg} # *** tbArgs producees a warning that TEST not found in design when running sim-testfloat-batch. Need to separate -G and + arguments to pass separately to vopt and vsim -vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} -fatal 7 -suppress 3829 ${CoverageVsimArg} +vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 -suppress 3829 ${CoverageVsimArg} # vsim -lib wkdir/work_${1}_${2} testbenchopt -fatal 7 -suppress 3829 # power add generates the logging necessary for said generation. diff --git a/testbench/testbench.sv b/testbench/testbench.sv index 7145a2735..035e625b7 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -337,7 +337,7 @@ module testbench; memfilename = {RISCV_DIR, "/linux-testvectors/ram.bin"}; bootmemfilename = {RISCV_DIR, "/linux-testvectors/bootmem.bin"}; uartoutfilename = {"logs/", TEST, "_uart.out"}; - rmCmd = {"rm ", uartoutfilename}; + rmCmd = {"rm -f ", uartoutfilename}; $system(rmCmd); // Delete existing UARToutfile end else memfilename = {pathname, tests[test], ".elf.memfile"}; From fd2f88ef33503313fbf7756df9c5d13cfc39229d Mon Sep 17 00:00:00 2001 From: Kunlin Han Date: Sat, 6 Apr 2024 17:06:06 -0700 Subject: [PATCH 2/3] Add fallback on site-setup.sh if no RISCV/site-setup.sh exists. --- setup.sh | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/setup.sh b/setup.sh index f609c1e3d..d8063b2aa 100644 --- a/setup.sh +++ b/setup.sh @@ -27,6 +27,10 @@ export PATH=$WALLY/bin:$PATH ulimit -s 100000 # load site licenses and tool locations -source $RISCV/site-setup.sh +if [ -f ${RISCV}/site-setup.sh ]; then + source ${RISCV}/site-setup.sh +else + source ${WALLY}/site-setup.sh +fi echo "setup done" From 6ef6bc042ddbf420239c9dac36311a99a6a58086 Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sat, 6 Apr 2024 18:18:50 -0700 Subject: [PATCH 3/3] Update RISCOF ISA config MISA values to be consistent --- tests/riscof/spike/spike_rv64gc_isa.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/riscof/spike/spike_rv64gc_isa.yaml b/tests/riscof/spike/spike_rv64gc_isa.yaml index f7e6b8c73..b8fabebde 100644 --- a/tests/riscof/spike/spike_rv64gc_isa.yaml +++ b/tests/riscof/spike/spike_rv64gc_isa.yaml @@ -27,7 +27,7 @@ hart0: warl: dependency_fields: [] legal: - - extensions[25:0] bitmask [0x014112D, 0x0000000] + - extensions[25:0] bitmask [0x015112D, 0x0000000] wr_illegal: - Unchanged