merge testbench

wally-pipelined/regression/wally-peripherals.do

@@ -1,43 +0,0 @@
-# wally-peripherals.do 
-#
-# Created by Ben Bracker (bbracker@hmc.edu) on 11 Feb. 2021
-#
-# Based on wally-pipelined.do by 
-# James Stine, 2008; David Harris 2021
-# Go Cowboys!!!!!!
-
-# Use this wally-pipelined.do file to run this example.
-# Either bring up ModelSim and type the following at the "ModelSim>" prompt:
-#     do wally-pipelined.do
-# or, to run from a shell, type the following at the shell prompt:
-#     vsim -do wally-pipelined.do -c
-# (omit the "-c" to see the GUI while running from the shell)
-
-onbreak {resume}
-
-# create library
-if [file exists work] {
-    vdel -all
-}
-vlib work
-
-# compile source files
-# suppress spurious warnngs about 
-# "Extra checking for conflicts with always_comb done at vopt time"
-# because vsim will run vopt
-
-# default to config/rv64ic, but allow this to be overridden at the command line.  For example:
-# do wally-pipelined.do ../config/rv32ic
-# That said, I don't think there are any peripherals that use anything but rv64i just yet.
-switch $argc {
-    0 {vlog +incdir+../config/rv64ic ../testbench/testbench-peripherals.sv ../src/*/*.sv -suppress 2583}
-    1 {vlog +incdir+$1 ../testbench/testbench-peripherals.sv ../src/*/*.sv -suppress 2583}
-}
-# start and run simulation
-# remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt +acc work.testbench -o workopt 
-vsim workopt
-
-
-view wave
-do wave-dos/peripheral-waves.do

wally-pipelined/regression/wally-pipelined.do

@@ -38,17 +38,15 @@ switch $argc {
 vopt +acc work.testbench -o workopt 
 vsim workopt
 
-
 view wave
-
 -- display input and output signals as hexidecimal values
-do ./wave-dos/ahb-waves.do
+do ./wave-dos/peripheral-waves.do
 
 -- Set Wave Output Items 
 TreeUpdate [SetDefaultTree]
 WaveRestoreZoom {0 ps} {100 ps}
 configure wave -namecolwidth 250
-configure wave -valuecolwidth 140
+configure wave -valuecolwidth 120
 configure wave -justifyvalue left
 configure wave -signalnamewidth 0
 configure wave -snapdistance 10
@@ -58,6 +56,8 @@ configure wave -childrowmargin 2
 set DefaultRadix hexadecimal
 
 -- Run the Simulation 
-#run 4100
+#run 5000 
 run -all
 #quit
+noview ../testbench/testbench-imperas.sv
+view wave

wally-pipelined/regression/wave-dos/peripheral-waves.do

@@ -71,22 +71,3 @@ add wave -divider
 # everything else
 add wave -hex -r /testbench/*
 
--- Set Wave Output Items 
-TreeUpdate [SetDefaultTree]
-WaveRestoreZoom {0 ps} {100 ps}
-configure wave -namecolwidth 250
-configure wave -valuecolwidth 120
-configure wave -justifyvalue left
-configure wave -signalnamewidth 0
-configure wave -snapdistance 10
-configure wave -datasetprefix 0
-configure wave -rowmargin 4
-configure wave -childrowmargin 2
-set DefaultRadix hexadecimal
-
--- Run the Simulation 
-#run 5000 
-run -all
-#quit
-noview ../testbench/testbench-peripherals.sv
-view wave

wally-pipelined/testbench/testbench-imperas.sv

@@ -29,6 +29,7 @@
 module testbench();
   parameter DEBUG = 0;
   parameter TESTSBP = 0;
+  parameter TESTSPERIPH = 1;
   
   logic        clk;
   logic        reset;
@@ -58,21 +59,23 @@ module testbench();
     "rv64a/WALLY-AMO", "2110",
     "rv64a/WALLY-LRSC", "2110"
   };
+
   string tests64m[] = '{
     "rv64m/I-MUL-01", "3000",
     "rv64m/I-MULH-01", "3000",
     "rv64m/I-MULHSU-01", "3000",
     "rv64m/I-MULHU-01", "3000",
     "rv64m/I-MULW-01", "3000"
-//                    "rv64m/I-DIV-01", "3000",
+    //"rv64m/I-DIV-01", "3000",
-//                    "rv64m/I-DIVU-01", "3000"
+    //"rv64m/I-DIVU-01", "3000"
- //                   "rv64m/I-DIVUW-01", "3000",
+    //"rv64m/I-DIVUW-01", "3000",
- //                   "rv64m/I-DIVW-01", "3000",
+    //"rv64m/I-DIVW-01", "3000",
-//                    "rv64m/I-REM-01", "3000",
+    //"rv64m/I-REM-01", "3000",
-//                    "rv64m/I-REMU-01", "3000",
+    //"rv64m/I-REMU-01", "3000",
-//                    "rv64m/I-REMUW-01", "3000",
+    //"rv64m/I-REMUW-01", "3000",
-//                    "rv64m/I-REMW-01", "3000"
+    //"rv64m/I-REMW-01", "3000"
   };
+
   string tests64ic[] = '{
     "rv64ic/I-C-ADD-01", "3000",
     "rv64ic/I-C-ADDI-01", "3000",
@@ -106,9 +109,11 @@ module testbench();
     "rv64ic/I-C-SWSP-01", "3000",
     "rv64ic/I-C-XOR-01", "3000"
   };
-string tests64iNOc[] = {
+
+  string tests64iNOc[] = {
     "rv64i/I-MISALIGN_JMP-01","2000"
   };
+
   string tests64i[] = '{
     "rv64i/I-ADD-01", "3000",
     "rv64i/I-ADDI-01", "3000",
@@ -205,23 +210,25 @@ string tests64iNOc[] = {
     "rv64i/WALLY-CSRRWI", "4000",
     "rv64i/WALLY-CSRRSI", "4000",
     "rv64i/WALLY-CSRRCI", "4000"
-
   };
+
   string tests32a[] = '{
     "rv64a/WALLY-AMO", "2110",
     "rv64a/WALLY-LRSC", "2110"
   };
+
   string tests32m[] = '{
     "rv32m/I-MUL-01", "2000",
     "rv32m/I-MULH-01", "2000",
     "rv32m/I-MULHSU-01", "2000",
     "rv32m/I-MULHU-01", "2000"
-//                    "rv32m/I-DIV-01", "2000",
+    //"rv32m/I-DIV-01", "2000",
-//                    "rv32m/I-DIVU-01", "2000",
+    //"rv32m/I-DIVU-01", "2000",
-//                    "rv32m/I-REM-01", "2000",
+    //"rv32m/I-REM-01", "2000",
-//                    "rv32m/I-REMU-01", "2000"
+    //"rv32m/I-REMU-01", "2000"
   };
-string tests32ic[] = '{
+
+  string tests32ic[] = '{
     "rv32ic/I-C-ADD-01", "2000",
     "rv32ic/I-C-ADDI-01", "2000",
     "rv32ic/I-C-AND-01", "2000",
@@ -246,11 +253,13 @@ string tests32ic[] = '{
     "rv32ic/I-C-SW-01", "2000",
     "rv32ic/I-C-SWSP-01", "2000",
     "rv32ic/I-C-XOR-01", "2000"
-};
+  };
-string tests32iNOc[] = {
+
+  string tests32iNOc[] = {
     "rv32i/I-MISALIGN_JMP-01","2000"
-};
+  };
-string tests32i[] = {
+
+  string tests32i[] = {
     "rv32i/I-ADD-01", "2000",
     "rv32i/I-ADDI-01","2000",
     "rv32i/I-AND-01","2000",
@@ -326,21 +335,12 @@ string tests32i[] = {
     "rv32i/WALLY-CSRRWI", "3000",
     "rv32i/WALLY-CSRRSI", "3000",
     "rv32i/WALLY-CSRRCI", "3000"
-
+  };
-};
 
   string testsBP64[] = '{
     "rv64BP/reg-test", "10000"
   };
 
-   // string tests64p[] = '{
-   //           "rv64p/WALLY-CAUSE", "3000",
-   //           "rv64p/WALLY-EPC", "3000",
-   //           "rv64p/WALLY-TVAL", "3000"
-   // };
-
-   
-
   string tests64p[] = '{
     "rv64p/WALLY-CAUSE", "3000",
     "rv64p/WALLY-EPC", "3000",
@@ -351,6 +351,14 @@ string tests32i[] = {
     "rv64p/WALLY-MVENDORID", "4000"
   };
 
+  string tests64periph[] = '{
+    "rv64i-periph/WALLY-PLIC", "2000"
+  };
+
+  string tests32periph[] = '{
+    "rv32i-periph/WALLY-PLIC", "2000"
+  };
+
    
 
   string tests[];
@@ -375,8 +383,10 @@ string tests32i[] = {
     if (`XLEN == 64) begin // RV64
       if (TESTSBP) begin
         tests = testsBP64;
+      end if (TESTSPERIPH) begin 
+        tests = tests64periph;
       end else begin 
-	      tests = {tests64i};
+        tests = {tests64i,tests64periph};
         if (`C_SUPPORTED) tests = {tests, tests64ic};
         else              tests = {tests, tests64iNOc};
         if (`M_SUPPORTED) tests = {tests, tests64m};
@@ -385,11 +395,14 @@ string tests32i[] = {
         if (`A_SUPPORTED) tests = {tests, tests64a};
         if (`MEM_VIRTMEM) tests = {tests64mmu, tests};
       end
- //     tests = {tests64a, tests};
+      //tests = {tests64a, tests};
       tests = {tests, tests64p};
     end else begin // RV32
       // *** add the 32 bit bp tests
-      tests = {tests32i};
+      if (TESTSPERIPH) begin 
+        tests = tests32periph;
+      end else begin
+          tests = {tests32i,tests32periph};
           if (`C_SUPPORTED % 2 == 1) tests = {tests, tests32ic};    
           else                       tests = {tests, tests32iNOc};
           if (`M_SUPPORTED % 2 == 1) tests = {tests, tests32m};
@@ -397,7 +410,7 @@ string tests32i[] = {
           if (`A_SUPPORTED) tests = {tests, tests32a};
           if (`MEM_VIRTMEM) tests = {tests32mmu, tests};
       end
-
+    end
     //tests = tests64p;
   end