From 72d8d34e3c6d94f64035e41674157428b959e648 Mon Sep 17 00:00:00 2001 From: David Harris Date: Fri, 18 Jun 2021 08:05:50 -0400 Subject: [PATCH] allow all size memory access in CLINT; added underscore to peripheral address symbols --- .../config/buildroot/wally-config.vh | 40 +++++++++---------- .../config/busybear/wally-config.vh | 40 +++++++++---------- .../config/coremark-64i/wally-config.vh | 40 +++++++++---------- .../config/coremark/wally-config.vh | 40 +++++++++---------- .../config/coremark_bare/wally-config.vh | 40 +++++++++---------- wally-pipelined/config/rv32ic/wally-config.vh | 40 +++++++++---------- wally-pipelined/config/rv64BP/wally-config.vh | 40 +++++++++---------- wally-pipelined/config/rv64ic/wally-config.vh | 40 +++++++++---------- .../config/rv64icfd/wally-config.vh | 40 +++++++++---------- .../config/rv64imc/wally-config.vh | 40 +++++++++---------- wally-pipelined/src/mmu/pmachecker.sv | 17 +++----- wally-pipelined/src/uncore/imem.sv | 16 ++++---- wally-pipelined/src/uncore/uncore.sv | 4 +- .../testbench/testbench-imperas.sv | 8 ++-- .../testbench/testbench-privileged.sv | 4 +- 15 files changed, 222 insertions(+), 227 deletions(-) diff --git a/wally-pipelined/config/buildroot/wally-config.vh b/wally-pipelined/config/buildroot/wally-config.vh index 065a6ebc1..c5469e357 100644 --- a/wally-pipelined/config/buildroot/wally-config.vh +++ b/wally-pipelined/config/buildroot/wally-config.vh @@ -61,26 +61,26 @@ // Peripheral Addresses // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Bus Interface width `define AHBW 64 diff --git a/wally-pipelined/config/busybear/wally-config.vh b/wally-pipelined/config/busybear/wally-config.vh index da7db2288..516ebcae7 100644 --- a/wally-pipelined/config/busybear/wally-config.vh +++ b/wally-pipelined/config/busybear/wally-config.vh @@ -62,26 +62,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Bus Interface width `define AHBW 64 diff --git a/wally-pipelined/config/coremark-64i/wally-config.vh b/wally-pipelined/config/coremark-64i/wally-config.vh index 848cb3bc4..f72b4f616 100644 --- a/wally-pipelined/config/coremark-64i/wally-config.vh +++ b/wally-pipelined/config/coremark-64i/wally-config.vh @@ -54,26 +54,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/config/coremark/wally-config.vh b/wally-pipelined/config/coremark/wally-config.vh index 615e18024..13d364dd7 100644 --- a/wally-pipelined/config/coremark/wally-config.vh +++ b/wally-pipelined/config/coremark/wally-config.vh @@ -62,26 +62,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/config/coremark_bare/wally-config.vh b/wally-pipelined/config/coremark_bare/wally-config.vh index 219e42253..5b62a23e0 100644 --- a/wally-pipelined/config/coremark_bare/wally-config.vh +++ b/wally-pipelined/config/coremark_bare/wally-config.vh @@ -62,26 +62,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh index 6f17e2591..f6f1860ad 100644 --- a/wally-pipelined/config/rv32ic/wally-config.vh +++ b/wally-pipelined/config/rv32ic/wally-config.vh @@ -61,26 +61,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Bus Interface width `define AHBW 32 diff --git a/wally-pipelined/config/rv64BP/wally-config.vh b/wally-pipelined/config/rv64BP/wally-config.vh index 0cf38f28e..477055def 100644 --- a/wally-pipelined/config/rv64BP/wally-config.vh +++ b/wally-pipelined/config/rv64BP/wally-config.vh @@ -63,26 +63,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh index d9928cdb6..32943165e 100644 --- a/wally-pipelined/config/rv64ic/wally-config.vh +++ b/wally-pipelined/config/rv64ic/wally-config.vh @@ -65,26 +65,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/config/rv64icfd/wally-config.vh b/wally-pipelined/config/rv64icfd/wally-config.vh index 20da468c4..1a7df3c40 100644 --- a/wally-pipelined/config/rv64icfd/wally-config.vh +++ b/wally-pipelined/config/rv64icfd/wally-config.vh @@ -65,26 +65,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/config/rv64imc/wally-config.vh b/wally-pipelined/config/rv64imc/wally-config.vh index 5e63f6dae..b6f5ab9af 100644 --- a/wally-pipelined/config/rv64imc/wally-config.vh +++ b/wally-pipelined/config/rv64imc/wally-config.vh @@ -61,26 +61,26 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits -`define BOOTTIMSUPPORTED 1'b1 -`define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -`define BOOTTIMRANGE 32'h00003FFF -//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder -//`define BOOTTIMRANGE 32'h00000FFF -`define TIMSUPPORTED 1'b1 -`define TIMBASE 32'h80000000 -`define TIMRANGE 32'h07FFFFFF -`define CLINTSUPPORTED 1'b1 -`define CLINTBASE 32'h02000000 -`define CLINTRANGE 32'h0000FFFF -`define GPIOSUPPORTED 1'b1 -`define GPIOBASE 32'h10012000 -`define GPIORANGE 32'h000000FF -`define UARTSUPPORTED 1'b1 -`define UARTBASE 32'h10000000 -`define UARTRANGE 32'h00000007 -`define PLICSUPPORTED 1'b1 -`define PLICBASE 32'h0C000000 -`define PLICRANGE 32'h03FFFFFF +`define BOOTTIM_SUPPORTED 1'b1 +`define BOOTTIM_BASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +`define BOOTTIM_RANGE 32'h00003FFF +//`define BOOTTIM_BASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIM_RANGE 32'h00000FFF +`define TIM_SUPPORTED 1'b1 +`define TIM_BASE 32'h80000000 +`define TIM_RANGE 32'h07FFFFFF +`define CLINT_SUPPORTED 1'b1 +`define CLINT_BASE 32'h02000000 +`define CLINT_RANGE 32'h0000FFFF +`define GPIO_SUPPORTED 1'b1 +`define GPIO_BASE 32'h10012000 +`define GPIO_RANGE 32'h000000FF +`define UART_SUPPORTED 1'b1 +`define UART_BASE 32'h10000000 +`define UART_RANGE 32'h00000007 +`define PLIC_SUPPORTED 1'b1 +`define PLIC_BASE 32'h0C000000 +`define PLIC_RANGE 32'h03FFFFFF // Test modes diff --git a/wally-pipelined/src/mmu/pmachecker.sv b/wally-pipelined/src/mmu/pmachecker.sv index b8ecc366a..0aaa8b976 100644 --- a/wally-pipelined/src/mmu/pmachecker.sv +++ b/wally-pipelined/src/mmu/pmachecker.sv @@ -57,23 +57,18 @@ module pmachecker ( // Determine which region of physical memory (if any) is being accessed // *** linux tests fail early when Access is anything other than 1b1 - pmaadrdec boottimdec(HADDR, `BOOTTIMBASE, `BOOTTIMRANGE, `BOOTTIMSUPPORTED, 1'b1/*AccessRX*/, HSIZE, 4'b1111, HSELRegions[5]); - pmaadrdec timdec(HADDR, `TIMBASE, `TIMRANGE, `TIMSUPPORTED, 1'b1/*AccessRWX*/, HSIZE, 4'b1111, HSELRegions[4]); - pmaadrdec clintdec(HADDR, `CLINTBASE, `CLINTRANGE, `CLINTSUPPORTED, AccessRW, HSIZE, (`XLEN==64 ? 4'b1000 : 4'b0100), HSELRegions[3]); - pmaadrdec gpiodec(HADDR, `GPIOBASE, `GPIORANGE, `GPIOSUPPORTED, AccessRW, HSIZE, 4'b0100, HSELRegions[2]); - pmaadrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, `UARTSUPPORTED, AccessRW, HSIZE, 4'b0001, HSELRegions[1]); - pmaadrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, `PLICSUPPORTED, AccessRW, HSIZE, 4'b0100, HSELRegions[0]); + pmaadrdec boottimdec(HADDR, `BOOTTIM_BASE, `BOOTTIM_RANGE, `BOOTTIM_SUPPORTED, 1'b1/*AccessRX*/, HSIZE, 4'b1111, HSELRegions[5]); + pmaadrdec timdec(HADDR, `TIM_BASE, `TIM_RANGE, `TIM_SUPPORTED, 1'b1/*AccessRWX*/, HSIZE, 4'b1111, HSELRegions[4]); + pmaadrdec clintdec(HADDR, `CLINT_BASE, `CLINT_RANGE, `CLINT_SUPPORTED, AccessRW, HSIZE, 4'b1111, HSELRegions[3]); + pmaadrdec gpiodec(HADDR, `GPIO_BASE, `GPIO_RANGE, `GPIO_SUPPORTED, AccessRW, HSIZE, 4'b0100, HSELRegions[2]); + pmaadrdec uartdec(HADDR, `UART_BASE, `UART_RANGE, `UART_SUPPORTED, AccessRW, HSIZE, 4'b0001, HSELRegions[1]); + pmaadrdec plicdec(HADDR, `PLIC_BASE, `PLIC_RANGE, `PLIC_SUPPORTED, AccessRW, HSIZE, 4'b0100, HSELRegions[0]); // Only RAM memory regions are cacheable assign Cacheable = HSELRegions[5] | HSELRegions[4]; assign Idempotent = HSELRegions[4]; assign AtomicAllowed = HSELRegions[4]; - /*ExecuteAccessF | ReadAccessM | WriteAccessM; */ - - // Swizzle region bits - //assign HSELRegions = {BootTim, Tim, CLINT, GPIO, UART, PLIC}; - // Detect access faults assign PMAAccessFault = ~|HSELRegions; assign PMAInstrAccessFaultF = ExecuteAccessF && PMAAccessFault; diff --git a/wally-pipelined/src/uncore/imem.sv b/wally-pipelined/src/uncore/imem.sv index 6aaad5982..85362edf7 100644 --- a/wally-pipelined/src/uncore/imem.sv +++ b/wally-pipelined/src/uncore/imem.sv @@ -32,8 +32,8 @@ module imem ( output logic InstrAccessFaultF); /* verilator lint_off UNDRIVEN */ - logic [`XLEN-1:0] RAM[`TIMBASE>>(1+`XLEN/32):(`TIMRANGE+`TIMBASE)>>(1+`XLEN/32)]; - logic [`XLEN-1:0] bootram[`BOOTTIMBASE>>(1+`XLEN/32):(`BOOTTIMRANGE+`BOOTTIMBASE)>>(1+`XLEN/32)]; + logic [`XLEN-1:0] RAM[`TIM_BASE>>(1+`XLEN/32):(`TIM_RANGE+`TIM_BASE)>>(1+`XLEN/32)]; + logic [`XLEN-1:0] bootram[`BOOTTIM_BASE>>(1+`XLEN/32):(`BOOTTIM_RANGE+`BOOTTIM_BASE)>>(1+`XLEN/32)]; /* verilator lint_on UNDRIVEN */ logic [31:0] adrbits; // needs to be 32 bits to index RAM logic [`XLEN-1:0] rd; @@ -44,27 +44,27 @@ module imem ( else assign adrbits = AdrF[31:3]; endgenerate - assign #2 rd = (AdrF < (`TIMBASE >> 1)) ? bootram[adrbits] : RAM[adrbits]; // busybear: 2 memory options + assign #2 rd = (AdrF < (`TIM_BASE >> 1)) ? bootram[adrbits] : RAM[adrbits]; // busybear: 2 memory options // hack right now for unaligned 32-bit instructions // eventually this will need to cause a stall like a cache miss // when the instruction wraps around a cache line // could be optimized to only stall when the instruction wrapping is 32 bits - assign #2 rd2 = (AdrF < (`TIMBASE >> 1)) ? bootram[adrbits+1][15:0] : RAM[adrbits+1][15:0]; //busybear: 2 memory options + assign #2 rd2 = (AdrF < (`TIM_BASE >> 1)) ? bootram[adrbits+1][15:0] : RAM[adrbits+1][15:0]; //busybear: 2 memory options generate if (`XLEN==32) begin assign InstrF = AdrF[1] ? {rd2[15:0], rd[31:16]} : rd; // First, AdrF needs to get its last bit appended back onto it - // Then not-XORing it with TIMBASE checks if it matches TIMBASE exactly - // Then ORing it with TIMRANGE introduces some leeway into the previous check, by allowing the lower bits to be either high or low + // Then not-XORing it with TIM_BASE checks if it matches TIM_BASE exactly + // Then ORing it with TIM_RANGE introduces some leeway into the previous check, by allowing the lower bits to be either high or low - assign InstrAccessFaultF = (~&(({AdrF,1'b0} ~^ `TIMBASE) | `TIMRANGE)) & (~&(({AdrF,1'b0} ~^ `BOOTTIMBASE) | `BOOTTIMRANGE)); + assign InstrAccessFaultF = (~&(({AdrF,1'b0} ~^ `TIM_BASE) | `TIM_RANGE)) & (~&(({AdrF,1'b0} ~^ `BOOTTIM_BASE) | `BOOTTIM_RANGE)); end else begin assign InstrF = AdrF[2] ? (AdrF[1] ? {rd2[15:0], rd[63:48]} : rd[63:32]) : (AdrF[1] ? rd[47:16] : rd[31:0]); // - assign InstrAccessFaultF = (|AdrF[`XLEN-1:32] | ~&({AdrF[31:1],1'b0} ~^ `TIMBASE | `TIMRANGE)) & (|AdrF[`XLEN-1:32] | ~&({AdrF[31:1],1'b0} ~^ `BOOTTIMBASE | `BOOTTIMRANGE)); + assign InstrAccessFaultF = (|AdrF[`XLEN-1:32] | ~&({AdrF[31:1],1'b0} ~^ `TIM_BASE | `TIM_RANGE)) & (|AdrF[`XLEN-1:32] | ~&({AdrF[31:1],1'b0} ~^ `BOOTTIM_BASE | `BOOTTIM_RANGE)); end endgenerate endmodule diff --git a/wally-pipelined/src/uncore/uncore.sv b/wally-pipelined/src/uncore/uncore.sv index fb8483768..d49414a79 100644 --- a/wally-pipelined/src/uncore/uncore.sv +++ b/wally-pipelined/src/uncore/uncore.sv @@ -80,8 +80,8 @@ module uncore ( subwordwrite sww(.*); // tightly integrated memory - dtim #(.BASE(`TIMBASE), .RANGE(`TIMRANGE)) dtim (.*); - dtim #(.BASE(`BOOTTIMBASE), .RANGE(`BOOTTIMRANGE)) bootdtim(.HSELTim(HSELBootTim), .HREADTim(HREADBootTim), .HRESPTim(HRESPBootTim), .HREADYTim(HREADYBootTim), .*); + dtim #(.BASE(`TIM_BASE), .RANGE(`TIM_RANGE)) dtim (.*); + dtim #(.BASE(`BOOTTIM_BASE), .RANGE(`BOOTTIM_RANGE)) bootdtim(.HSELTim(HSELBootTim), .HREADTim(HREADBootTim), .HRESPTim(HRESPBootTim), .HREADYTim(HREADYBootTim), .*); // memory-mapped I/O peripherals clint clint(.HADDR(HADDR[15:0]), .MTIME(MTIME_CLINT), .MTIMECMP(MTIMECMP_CLINT), .*); diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv index e67606ec1..f87f369b4 100644 --- a/wally-pipelined/testbench/testbench-imperas.sv +++ b/wally-pipelined/testbench/testbench-imperas.sv @@ -582,8 +582,8 @@ string tests32f[] = '{ InstrFName, InstrDName, InstrEName, InstrMName, InstrWName); // initialize tests - localparam integer MemStartAddr = `TIMBASE>>(1+`XLEN/32); - localparam integer MemEndAddr = (`TIMRANGE+`TIMBASE)>>1+(`XLEN/32); + localparam integer MemStartAddr = `TIM_BASE>>(1+`XLEN/32); + localparam integer MemEndAddr = (`TIM_RANGE+`TIM_BASE)>>1+(`XLEN/32); initial begin @@ -655,9 +655,9 @@ string tests32f[] = '{ errors = (i == SIGNATURESIZE+1); // error if file is empty i = 0; if (`XLEN == 32) - testadr = (`TIMBASE+tests[test+1].atohex())/4; + testadr = (`TIM_BASE+tests[test+1].atohex())/4; else - testadr = (`TIMBASE+tests[test+1].atohex())/8; + testadr = (`TIM_BASE+tests[test+1].atohex())/8; /* verilator lint_off INFINITELOOP */ while (signature[i] !== 'bx) begin //$display("signature[%h] = %h", i, signature[i]); diff --git a/wally-pipelined/testbench/testbench-privileged.sv b/wally-pipelined/testbench/testbench-privileged.sv index a10959b3e..c3e8e20f1 100644 --- a/wally-pipelined/testbench/testbench-privileged.sv +++ b/wally-pipelined/testbench/testbench-privileged.sv @@ -159,9 +159,9 @@ module testbench(); i = 0; errors = 0; if (`XLEN == 32) - testadr = (`TIMBASE+tests[test+1].atohex())/4; + testadr = (`TIM_BASE+tests[test+1].atohex())/4; else - testadr = (`TIMBASE+tests[test+1].atohex())/8; + testadr = (`TIM_BASE+tests[test+1].atohex())/8; /* verilator lint_off INFINITELOOP */ while (signature[i] !== 'bx) begin //$display("signature[%h] = %h", i, signature[i]);