From 70d0169019d5ff974b726084c7fe409708aa3f59 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Wed, 20 Dec 2023 14:57:52 -0600 Subject: [PATCH] All regression tests which matter are running! --- testbench/testbench.sv | 4 ---- .../riscv-test-suite/rv64i_m/privilege/src/WALLY-periph-01.S | 3 +++ 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/testbench/testbench.sv b/testbench/testbench.sv index 6bce57714..3f7aeea33 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -360,8 +360,6 @@ module testbench; StartIndex = begin_signature_addr >> LogXLEN; EndIndex = (end_signature_addr >> LogXLEN) + 8; BaseIndex = P.UNCORE_RAM_BASE >> LogXLEN; - $display("Copying from uncore RAM to shadow RAM. begin_signature_addr = %x, end_signature_addr = %x, StartIndex = %x, EndIndex = %x, BaseIndex = %x, LogXLEN = %x", - begin_signature_addr, end_signature_addr, StartIndex, EndIndex, BaseIndex, LogXLEN); for(ShadowIndex = StartIndex; ShadowIndex <= EndIndex; ShadowIndex++) begin testbench.DCacheFlushFSM.ShadowRAM[ShadowIndex] = dut.uncore.uncore.ram.ram.memory.RAM[ShadowIndex - BaseIndex]; end @@ -379,8 +377,6 @@ module testbench; StartIndex = begin_signature_addr >> LogXLEN; EndIndex = (end_signature_addr >> LogXLEN) + 8; BaseIndex = P.UNCORE_RAM_BASE >> LogXLEN; - $display("Copying from uncore RAM to shadow RAM. begin_signature_addr = %x, end_signature_addr = %x, StartIndex = %x, EndIndex = %x, BaseIndex = %x, LogXLEN = %x", - begin_signature_addr, end_signature_addr, StartIndex, EndIndex, BaseIndex, LogXLEN); for(ShadowIndex = StartIndex; ShadowIndex <= EndIndex; ShadowIndex++) begin testbench.DCacheFlushFSM.ShadowRAM[ShadowIndex] = dut.core.lsu.dtim.dtim.ram.RAM[ShadowIndex - BaseIndex]; end diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-periph-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-periph-01.S index 6c985c98b..dc6dde0af 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-periph-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-periph-01.S @@ -917,4 +917,7 @@ RVMODEL_DATA_BEGIN # signature output wally_signature: .fill 0x200, 8, 0x00000000 +sig_end_canary: +.int 0x0 +rvtest_sig_end: RVMODEL_DATA_END