From 6ffbdaac0ade68b45c11c3bb46d187186af80870 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Mon, 21 Aug 2023 12:55:07 -0500 Subject: [PATCH] Working CBO tests for 64 bit! --- testbench/tests.vh | 1 + .../rv64i_m/privilege/Makefrag | 1 + .../references/WALLY-cbom-01.reference_output | 46 ++++++++++++++++++- .../rv64i_m/privilege/src/WALLY-cbom-01.S | 6 +-- 4 files changed, 50 insertions(+), 4 deletions(-) diff --git a/testbench/tests.vh b/testbench/tests.vh index 116d39424..06c4cbe5a 100644 --- a/testbench/tests.vh +++ b/testbench/tests.vh @@ -1936,6 +1936,7 @@ string arch64zbs[] = '{ string wally64priv[] = '{ `WALLYTEST, "rv64i_m/privilege/src/WALLY-csr-permission-s-01.S", + "rv64i_m/privilege/src/WALLY-cbom-01.S", "rv64i_m/privilege/src/WALLY-csr-permission-u-01.S", "rv64i_m/privilege/src/WALLY-mie-01.S", "rv64i_m/privilege/src/WALLY-minfo-01.S", diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag index 319c5d930..6b13612ce 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag @@ -56,6 +56,7 @@ target_tests_nosim = \ WALLY-trap-u-01 \ WALLY-status-fp-enabled-01 \ WALLY-wfi-01 \ + WALLY-cbom-01 \ # unclear why status-fp-enabled and wfi aren't simulating ok diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-cbom-01.reference_output b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-cbom-01.reference_output index 5ec4c1a60..a44010745 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-cbom-01.reference_output +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-cbom-01.reference_output @@ -1,3 +1,31 @@ +deadbeef # begin_signature +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef +deadbeef deadbeef # destination 1 deadbeef deadbeef @@ -523,6 +551,22 @@ ffffffff ffffffff ffffffff ffffffff -0bad0bad # controls +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +ffffffff +0bad0bad # controls +0bad0bad +0bad0bad +0bad0bad 0bad0bad 0bad0bad diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S index b3f22aca7..374ee1c88 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-cbom-01.S @@ -444,7 +444,7 @@ SourceData: .int 48, 49, 50, 51, 52, 53, 54, 55 .int 56, 57, 58, 59, 60, 61, 62, 63 .int 64, 65, 66, 67, 68, 69, 70, 71 - .int 72, 73, 74, 75, 76, 77, 79, 79 + .int 72, 73, 74, 75, 76, 77, 78, 79 .int 80, 81, 82, 83, 84, 85, 86, 87 .int 88, 89, 90, 91, 92, 93, 94, 95 .int 96, 97, 98, 99, 100, 101, 102, 103 @@ -458,7 +458,7 @@ RVMODEL_DATA_BEGIN .fill 28, 4, 0xdeadbeef # this is annoying, but RVMODEL_DATA_END and BEGIN insert # 4 bytes. This needs to be aligned to a cacheline -.align 6 + .align 6 Destination1: .fill 128, 4, 0xdeadbeef Destination2: @@ -469,7 +469,7 @@ Destination4: .fill 128, 4, 0xdeadbeef signature: - .fill 128, 4, 0xdeadbeef + .fill 32, 4, 0x0bad0bad RVMODEL_DATA_END