From 9a70480ef6abed99cbedb632b10ea6ae0549b9ea Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Fri, 9 Aug 2024 21:50:18 -0700
Subject: [PATCH 01/13] Update CacheSim scripts with new wsim and directory
 structure. Give simulator choice and switch default to verilator.

---
 .gitignore             |  2 +-
 bin/CacheSim.py        |  1 -
 sim/rv64gc_CacheSim.py | 35 ++++++++++++++++++-----------------
 3 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/.gitignore b/.gitignore
index 3d3d875f0..7e6809e84 100644
--- a/.gitignore
+++ b/.gitignore
@@ -123,7 +123,7 @@ sim/test1.rep
 sim/questa/vsim.log
 tests/coverage/*.elf
 *.elf.memfile
-sim/*Cache.log
+sim/*/*Cache.log
 sim/branch
 tests/fp/combined_IF_vectors/IF_vectors/*.tv
 /sim/branch-march14.tar.gz
diff --git a/bin/CacheSim.py b/bin/CacheSim.py
index f6b2cb7e1..447ed9145 100755
--- a/bin/CacheSim.py
+++ b/bin/CacheSim.py
@@ -41,7 +41,6 @@
 # Add -d or --dist to report the distribution of loads, stores, and atomic ops.
 # These distributions may not add up to 100; this is because of flushes or invalidations.
 
-import sys
 import math
 import argparse
 import os
diff --git a/sim/rv64gc_CacheSim.py b/sim/rv64gc_CacheSim.py
index bc75fc13a..a33749803 100755
--- a/sim/rv64gc_CacheSim.py
+++ b/sim/rv64gc_CacheSim.py
@@ -7,7 +7,7 @@
 ## Created: 11 April 2023
 ## Modified: 12 April 2023
 ##
-## Purpose: Run the cache simulator on each rv64gc test suite in turn. 
+## Purpose: Run the cache simulator on each rv64gc test suite in turn.
 ##
 ## A component of the CORE-V-WALLY configurable RISC-V project.
 ## https://github.com/openhwgroup/cvw
@@ -16,24 +16,23 @@
 ##
 ## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 ##
-## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
-## except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
+## except in compliance with the License, or, at your option, the Apache License version 2.0. You
 ## may obtain a copy of the License at
 ##
 ## https:##solderpad.org/licenses/SHL-2.1/
 ##
-## Unless required by applicable law or agreed to in writing, any work distributed under the 
-## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
-## either express or implied. See the License for the specific language governing permissions 
+## Unless required by applicable law or agreed to in writing, any work distributed under the
+## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+## either express or implied. See the License for the specific language governing permissions
 ## and limitations under the License.
 ################################################################################################
-import sys
 import os
 import argparse
 
 # NOTE: make sure testbench.sv has the ICache and DCache loggers enabled!
 # This does not check the test output for correctness, run regression for that.
-# Add -p or --perf to report the hit/miss ratio. 
+# Add -p or --perf to report the hit/miss ratio.
 # Add -d or --dist to report the distribution of loads, stores, and atomic ops.
 # These distributions may not add up to 100; this is because of flushes or invalidations.
 
@@ -48,36 +47,38 @@ class bcolors:
     BOLD = '\033[1m'
     UNDERLINE = '\033[4m'
 
-# tests64gc = ["coverage64gc", "arch64f", "arch64d", "arch64i", "arch64priv", "arch64c",  "arch64m", 
-tests64gc = ["coverage64gc", "arch64i", "arch64priv", "arch64c",  "arch64m",             
-             "arch64zi", "wally64a", "wally64periph", "wally64priv", 
-             "arch64zba",  "arch64zbb",  "arch64zbc",  "arch64zbs", 
+# tests64gc = ["coverage64gc", "arch64f", "arch64d", "arch64i", "arch64priv", "arch64c",  "arch64m",
+tests64gc = ["coverage64gc", "arch64i", "arch64priv", "arch64c",  "arch64m",
+             "arch64zi", "wally64a", "wally64periph", "wally64priv",
+             "arch64zba",  "arch64zbb",  "arch64zbc",  "arch64zbs",
              "imperas64f", "imperas64d", "imperas64c", "imperas64i"]
 # arch64i is the most interesting case.  Uncomment line below to run just that case
 tests64gc = ["arch64i"]
 
 cachetypes = ["ICache", "DCache"]
-simdir = os.path.expanduser("~/cvw/sim")
+simdir = os.path.expandvars("$WALLY/sim")
 
 if __name__ == '__main__':
     parser = argparse.ArgumentParser(description="Runs the cache simulator on all rv64gc test suites")
     parser.add_argument('-p', "--perf", action='store_true', help="Report hit/miss ratio")
     parser.add_argument('-d', "--dist", action='store_true', help="Report distribution of operations")
+    parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator")
 
     args = parser.parse_args()
 
-    testcmd = "vsim -do \"do wally-batch.do rv64gc {}\" -c > /dev/null"
+    testcmd = "wsim --sim " + args.sim + " rv64gc {} > /dev/null"
     cachecmd = "CacheSim.py 64 4 56 44 -f {}"
-    
+
     if args.perf:
         cachecmd += " -p"
     if args.dist:
         cachecmd += " -d"
-    
+
     for test in tests64gc:
         print(f"{bcolors.HEADER}Commencing test", test+f":{bcolors.ENDC}")
+        print(testcmd.format(test))
         os.system(testcmd.format(test))
         for cache in cachetypes:
             print(f"{bcolors.OKCYAN}Running the", cache, f"simulator.{bcolors.ENDC}")
-            os.system(cachecmd.format(cache+".log"))
+            os.system(cachecmd.format(args.sim+"/"+cache+".log"))
         print()

From 8b1d49b5d02d6e85621eab96839e4766b2a36895 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sat, 10 Aug 2024 12:16:46 -0700
Subject: [PATCH 02/13] Use tcl variable expansion in wally.do to avoid temp
 variables

---
 sim/questa/wally.do | 24 +++++++-----------------
 1 file changed, 7 insertions(+), 17 deletions(-)

diff --git a/sim/questa/wally.do b/sim/questa/wally.do
index db1cbbae1..dd0965860 100644
--- a/sim/questa/wally.do
+++ b/sim/questa/wally.do
@@ -1,8 +1,8 @@
-# wally-batch.do 
+# wally-batch.do
 # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 #
 # Modification by Oklahoma State University & Harvey Mudd College
-# Use with Testbench 
+# Use with Testbench
 # James Stine, 2008; David Harris 2021
 # Go Cowboys!!!!!!
 #
@@ -68,7 +68,7 @@ set FCdefineIDV_TRACE2COV ""
 set lockstep 0
 # ok this is annoying. vlog, vopt, and vsim are very picky about how arguments are passed.
 # unforunately it won't allow these to be grouped as one argument per command so they are broken
-# apart. 
+# apart.
 set lockstepvoptstring ""
 set SVLib ""
 set SVLibPath ""
@@ -148,7 +148,7 @@ if {$FunctCoverageIndex >= 0} {
     set FCdefineIDV_TRACE2COV "+IDV_TRACE2COV=1"
     set lst [lreplace $lst $FunctCoverageIndex $FunctCoverageIndex]
 }\
- 
+
 set LockStepIndex [lsearch -exact $lst "--lockstep"]
 # ugh.  can't have more than 9 arguments passed to vsim. why? I'll have to remove --lockstep when running
 # functional coverage and imply it.
@@ -196,18 +196,10 @@ foreach x $PlusArgs {
     echo "Element is $x"
 }
 
-# need a better solution this is really ugly
-# Questa really don't like passing $PlusArgs on the command line to vsim.  It treats the whole things
-# as one string rather than mutliple separate +args.  Is there an automated way to pass these?
-set temp0 [lindex $PlusArgs 0]
-set temp1 [lindex $PlusArgs 1]
-set temp2 [lindex $PlusArgs 2]
-set temp3 [lindex $PlusArgs 3]
-
 #quit
 
 # compile source files
-# suppress spurious warnngs about 
+# suppress spurious warnngs about
 # "Extra checking for conflicts with always_comb done at vopt time"
 # because vsim will run vopt
 
@@ -215,11 +207,9 @@ vlog -lint -work ${WKDIR}  +incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CF
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${ParamArgs} -o testbenchopt ${CoverageVoptArg}
+vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} {*}${ParamArgs} -o testbenchopt ${CoverageVoptArg}
 
-#vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 ${SVLib} ${SVLibPath} ${OtherFlags} +TRACE2COV_ENABLE=1 -suppress 3829 ${CoverageVsimArg}
-#vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 ${SVLib} ${SVLibPath} +IDV_TRACE2COV=1 +TRACE2COV_ENABLE=1 -suppress 3829 ${CoverageVsimArg}
-vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} $temp0 $temp1 $temp2 $temp3 -fatal 7 ${SVLib} ${SVLibPath} ${OtherFlags} ${FCTRACE2COV} ${FCdefineIDV_TRACE2COV} -suppress 3829 ${CoverageVsimArg}
+vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} {*}${PlusArgs} -fatal 7 ${SVLib} ${SVLibPath} ${OtherFlags} ${FCTRACE2COV} ${FCdefineIDV_TRACE2COV} -suppress 3829 ${CoverageVsimArg}
 
 #    vsim -lib wkdir/work_${1}_${2} testbenchopt  -fatal 7 -suppress 3829
 # power add generates the logging necessary for said generation.

From c19916a1d0f0bef22969a0990e2a350bed53e55e Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sat, 10 Aug 2024 12:18:54 -0700
Subject: [PATCH 03/13] Allow Verilator to pass extra args at compile time
 (like -G...)

---
 bin/wsim               | 4 ++--
 sim/verilator/Makefile | 6 +++++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/bin/wsim b/bin/wsim
index e35ec6841..ea7086bdf 100755
--- a/bin/wsim
+++ b/bin/wsim
@@ -127,7 +127,7 @@ if (args.sim == "questa"):
 elif (args.sim == "verilator"):
     # PWD=${WALLY}/sim CONFIG=rv64gc TESTSUITE=arch64i
     print(f"Running Verilator on {args.config} {args.testsuite}")
-    os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite} TESTBENCH={args.tb} EXTRA_ARGS='{args.args}'")
+    os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite} TESTBENCH={args.tb} EXTRA_ARGS=\"{args.args}\"")
 elif (args.sim == "vcs"):
     print(f"Running VCS on " + args.config + " " + args.testsuite)
     if (args.gui):  
@@ -135,7 +135,7 @@ elif (args.sim == "vcs"):
     if (args.args == ""):
         vcsargs = ""
     else:
-        vcsargs = " --args " + args.args
+        vcsargs = " --args \"" + args.args + "\""
     if (ElfFile != ""):
         ElfFile = " --elffile " + ElfFile
     cmd = cd + "; " + prefix + " ./run_vcs " + args.config + " " + args.testsuite + vcsargs + ElfFile + " " + flags
diff --git a/sim/verilator/Makefile b/sim/verilator/Makefile
index a7a57244e..04544a914 100644
--- a/sim/verilator/Makefile
+++ b/sim/verilator/Makefile
@@ -12,6 +12,8 @@ NONPROF?=--stats
 VERILATOR_DIR=${WALLY}/sim/verilator
 SOURCE=${WALLY}/config/shared/*.vh ${WALLY}/config/${WALLYCONF} ${WALLY}/config/deriv/${WALLYCONF} ${WALLY}/src/cvw.sv ${WALLY}/testbench/*.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
 EXTRA_ARGS=
+PLUS_ARGS:=$(filter pattern +%, $(EXTRA_ARGS))
+PARAM_ARGS:=$(filter-out pattern +%, $(EXTRA_ARGS))
 
 
 WALLYCONF?=rv64gc
@@ -44,7 +46,7 @@ default: run
 
 run: wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH}
 	mkdir -p $(VERILATOR_DIR)/logs
-	wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH} ${ARGTEST} $(EXTRA_ARGS) 
+	wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH} ${ARGTEST} $(PLUS_ARGS)
 
 profile: obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF)
 	$(VERILATOR_DIR)/obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF) ${ARGTEST}
@@ -65,6 +67,7 @@ wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH}: $(DEPENDENCIES)
 	$(INCLUDE_PATH) \
 	${WRAPPER} \
 	${GTEST} \
+	${PARAM_ARGS} \
 	$(SOURCES)
 
 obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF): $(DEPENDENCIES)
@@ -77,6 +80,7 @@ obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF): $(DEPENDENCIES)
 	$(INCLUDE_PATH) \
 	${WRAPPER} \
 	${GTEST} \
+	${PARAM_ARGS} \
 	$(SOURCES)
 
 clean:

From 4ffd10bbb80201186ec58088c35af203e68eca54 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sat, 10 Aug 2024 12:21:44 -0700
Subject: [PATCH 04/13] Automatically enable I_CACHE_ADDR_LOGGER and
 I_CACHE_ADDR_LOGGER in rv64gc_CacheSim.py. Working for Questa and Verilator.

---
 sim/rv64gc_CacheSim.py | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/sim/rv64gc_CacheSim.py b/sim/rv64gc_CacheSim.py
index a33749803..6896c996c 100755
--- a/sim/rv64gc_CacheSim.py
+++ b/sim/rv64gc_CacheSim.py
@@ -65,8 +65,8 @@ if __name__ == '__main__':
     parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator")
 
     args = parser.parse_args()
-
-    testcmd = "wsim --sim " + args.sim + " rv64gc {} > /dev/null"
+    simargs = "-GI_CACHE_ADDR_LOGGER=1\\\'b1 -GD_CACHE_ADDR_LOGGER=1\\\'b1"
+    testcmd = "wsim --sim " + args.sim + " rv64gc {} --args \"" + simargs + "\" > /dev/null"
     cachecmd = "CacheSim.py 64 4 56 44 -f {}"
 
     if args.perf:
@@ -76,6 +76,9 @@ if __name__ == '__main__':
 
     for test in tests64gc:
         print(f"{bcolors.HEADER}Commencing test", test+f":{bcolors.ENDC}")
+        # remove wkdir to force recompile with logging enabled
+        os.system("rm -rf " + simdir + "/" + args.sim + "/wkdir/rv64gc_" + test)
+        os.system("rm -rf " + simdir + "/" + args.sim + "/*Cache.log")
         print(testcmd.format(test))
         os.system(testcmd.format(test))
         for cache in cachetypes:

From 413a3fca0e72e24f9cc480250c65a9dc048eb6a9 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 09:34:29 -0700
Subject: [PATCH 05/13] Use $finish for VCS and Verilator in testbench_fp

---
 testbench/testbench_fp.sv | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/testbench/testbench_fp.sv b/testbench/testbench_fp.sv
index 61fa12fcc..58d37ba29 100644
--- a/testbench/testbench_fp.sv
+++ b/testbench/testbench_fp.sv
@@ -637,7 +637,11 @@ module testbench_fp;
       // check if nothing is being tested
       if (Tests.size() == 0) begin
 	 $display("TEST %s not supported in this configuration", TEST);
-	 $stop;
+`ifdef QUESTA
+    $stop;  // if this is changed to $finish for Questa, wally.do terminates without allowing GUI debug
+`else
+    $finish;
+`endif
       end
    end
 
@@ -987,7 +991,11 @@ module testbench_fp;
             X[P.FLEN-1:0], Y[P.FLEN-1:0], Z[P.FLEN-1:0], SrcA, Res[P.FLEN-1:0], ResFlg, Ans[P.FLEN-1:0], AnsFlg);
          //$display("  fma.Xs %h Xe %h Xm %h Ys %h Ye %h Ym %h Ss %h Se %h Sm %h", fma.Xs, fma.Xe, fma.Xm, fma.Ys, fma.Ye, fma.Ym, fma.Ss, fma.Se, fma.Sm);
          //$display("  readvectors.unpack.X %h Xs %h Xe %h Xm %h", readvectors.unpack.X, readvectors.unpack.Xs, readvectors.unpack.Xe, readvectors.unpack.Xm);
-         $stop;
+`ifdef QUESTA
+        $stop;  // if this is changed to $finish for Questa, wally.do terminates without allowing GUI debug
+`else
+        $finish;
+`endif
       end
 
       if (TestVectors[VectorNum] == '1 & Tests[TestNum] !== "") begin // if reached the eof
@@ -1013,7 +1021,11 @@ module testbench_fp;
          // if no more Tests - finish
          if (Tests[TestNum] === "") begin
                   $display("\nAll Tests completed with %d errors\n", errors);
-                  $stop;
+`ifdef QUESTA
+                  $stop;  // if this is changed to $finish for Questa, wally.do terminates without allowing GUI debug
+`else
+                  $finish;
+`endif
          end 
          $display("Running %s vectors", Tests[TestNum]);
       end

From e48d5775458b994ffb7770a248bb1b30ea113f05 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 10:44:53 -0700
Subject: [PATCH 06/13] More wally.do simplifications. Use variable expansion
 to combine multiple variables

---
 sim/questa/wally.do | 158 ++++++++++++++++++--------------------------
 1 file changed, 63 insertions(+), 95 deletions(-)

diff --git a/sim/questa/wally.do b/sim/questa/wally.do
index dd0965860..a8c9193d2 100644
--- a/sim/questa/wally.do
+++ b/sim/questa/wally.do
@@ -1,4 +1,4 @@
-# wally-batch.do
+# wally.do
 # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 #
 # Modification by Oklahoma State University & Harvey Mudd College
@@ -11,23 +11,36 @@
 # Usage: do wally-batch.do <config> <testcases> <testbench> [--ccov] [--fcov] [+acc] [any number of +value] [any number of -G VAR=VAL]
 # Example: do wally-batch.do rv64gc arch64i testbench
 
-# Use this wally-batch.do file to run this example.
+# Use this wally.do file to run this example.
 # Either bring up ModelSim and type the following at the "ModelSim>" prompt:
-#     do wally-batch.do
+#     do wally.do
 # or, to run from a shell, type the following at the shell prompt:
-#     vsim -do wally-batch.do -c
+#     vsim -do wally.do -c
 # (omit the "-c" to see the GUI while running from the shell)
 
-set DEBUG 1
+# lcheck - return 1 if value is in list and remove it from list
+proc lcheck {listVariable value} {
+    upvar 1 $listVariable list
+    set index [lsearch -exact $list $value]
+    if {$index >= 0} {
+        set list [lreplace $list $index $index]
+        return 1
+    } else {
+        return 0
+    }
+}
 
+set DEBUG 1
 onbreak {resume}
 onerror {quit -f}
 
+# Initialize variables
 set CFG ${1}
 set TESTSUITE ${2}
 set TESTBENCH ${3}
 set WKDIR wkdir/${CFG}_${TESTSUITE}
 set WALLY $::env(WALLY)
+set IMPERAS_HOME $::env(IMPERAS_HOME)
 set CONFIG ${WALLY}/config
 set SRC ${WALLY}/src
 set TB ${WALLY}/testbench
@@ -38,11 +51,8 @@ if [file exists ${WKDIR}] {
     vdel -lib ${WKDIR} -all
 }
 vlib ${WKDIR}
-# Create directory for coverage data
-mkdir -p cov
 # Create directory for functional coverage data
-mkdir -p ${WALLY}/addins/cvw-arch-verif/work
-
+mkdir -p ${FCRVVI}
 set ccov 0
 set CoverageVoptArg ""
 set CoverageVsimArg ""
@@ -51,41 +61,22 @@ set FuncCovRVVI 0
 set FCdefineRVVI_COVERAGE ""
 
 set FunctCoverage 0
-set riscvISACOVsrc ""
-set FCdefineINCLUDE_TRACE2COV ""
-set FCdefineCOVER_BASE_RV64I ""
-set FCdefineCOVER_LEVEL_DV_PR_EXT  ""
-set FCdefineCOVER_RV64I ""
-set FCdefineCOVER_RV64M ""
-set FCdefineCOVER_RV64A ""
-set FCdefineCOVER_RV64F ""
-set FCdefineCOVER_RV64D ""
-set FCdefineCOVER_RV64ZICSR ""
-set FCdefineCOVER_RV64C ""
-set FCdefineIDV_INCLUDE_TRACE2COV ""
-set FCTRACE2COV ""
-set FCdefineIDV_TRACE2COV ""
+set FCvlog ""
+set FCvopt ""
+set FCdefineCOVER_EXTS {}
+
 set lockstep 0
-# ok this is annoying. vlog, vopt, and vsim are very picky about how arguments are passed.
-# unforunately it won't allow these to be grouped as one argument per command so they are broken
-# apart.
-set lockstepvoptstring ""
+set lockstepvlog ""
 set SVLib ""
-set SVLibPath ""
 set OtherFlags ""
-set ImperasPubInc ""
-set ImperasPrivInc ""
-set rvviFiles ""
-set idvFiles ""
 
 set GUI 0
 set accFlag ""
 
 # Need to be able to pass arguments to vopt.  Unforunately argv does not work because
 # it takes on different values if vsim and the do file are called from the command line or
-# if the do file isd called from questa sim directly.  This chunk of code uses the $4 through $n
+# if the do file is called from questa sim directly.  This chunk of code uses the $4 through $n
 # variables and compacts into a single list for passing to vopt.
-set tbArgs ""
 set from 4
 set step 1
 set lst {}
@@ -103,74 +94,55 @@ echo "number of args = $argc"
 echo "lst = $lst"
 
 # if +acc found set flag and remove from list
-set AccIndex [lsearch -exact $lst "+acc"]
-if {$AccIndex >= 0} {
+if {[lcheck lst "+acc"]} {
     set GUI 1
     set accFlag "+acc"
-    set lst [lreplace $lst $AccIndex $AccIndex]
 }
 
-# if +coverage found set flag and remove from list
-set CoverageIndex [lsearch -exact $lst "--ccov"]
-if {$CoverageIndex >= 0} {
+# if --ccov found set flag and remove from list
+if {[lcheck lst "--ccov"]} {
     set ccov 1
     set CoverageVoptArg "+cover=sbecf"
     set CoverageVsimArg "-coverage"
-    set lst [lreplace $lst $CoverageIndex $CoverageIndex]
 }
 
-set FCoverageIndexRVVI [lsearch -exact $lst "--fcovrvvi"]
-if {$FCoverageIndexRVVI >= 0} {
+# if --fcovrvvi found set flag and remove from list
+if {[lcheck lst "--fcovrvvi"]} {
     set FuncCovRVVI 1
     set FCdefineRVVI_COVERAGE "+define+RVVI_COVERAGE"
-    set lst [lreplace $lst $FCoverageIndexRVVI $FCoverageIndexRVVI]
 }
 
-# if +coverage found set flag and remove from list
-set FunctCoverageIndex [lsearch -exact $lst "--fcov"]
-if {$FunctCoverageIndex >= 0} {
+# if --fcov found set flag and remove from list
+if {[lcheck lst "--fcov"]} {
     set FunctCoverage 1
-    set riscvISACOVsrc +incdir+$env(IMPERAS_HOME)/ImpProprietary/source/host/riscvISACOV/source
-
-    set FCdefineINCLUDE_TRACE2COV "+define+INCLUDE_TRACE2COV"
-    set FCdefineCOVER_BASE_RV64I "+define+COVER_BASE_RV64I"
-    set FCdefineCOVER_LEVEL_DV_PR_EXT  "+define+COVER_LEVEL_DV_PR_EXT"
+    set FCvlog "+define+INCLUDE_TRACE2COV \
+                +define+IDV_INCLUDE_TRACE2COV \
+                +define+COVER_BASE_RV64I \
+                +define+COVER_LEVEL_DV_PR_EXT \
+                +incdir+${IMPERAS_HOME}/ImpProprietary/source/host/riscvISACOV/source"
+    set FCvopt "+TRACE2COV_ENABLE=1 +IDV_TRACE2COV=1"
     # Uncomment various cover statements below to control which extensions get functional coverage
-    set FCdefineCOVER_RV64I "+define+COVER_RV64I"
-    #set FCdefineCOVER_RV64M "+define+COVER_RV64M"
-    #set FCdefineCOVER_RV64A "+define+COVER_RV64A"
-    #set FCdefineCOVER_RV64F "+define+COVER_RV64F"
-    #set FCdefineCOVER_RV64D "+define+COVER_RV64D"
-    #set FCdefineCOVER_RV64ZICSR "+define+COVER_RV64ZICSR"
-    #set FCdefineCOVER_RV64C "+define+COVER_RV64C"
-    set FCdefineIDV_INCLUDE_TRACE2COV "+define+IDV_INCLUDE_TRACE2COV"
-    set FCTRACE2COV "+TRACE2COV_ENABLE=1"
-    set FCdefineIDV_TRACE2COV "+IDV_TRACE2COV=1"
-    set lst [lreplace $lst $FunctCoverageIndex $FunctCoverageIndex]
-}\
+    lappend FCdefineCOVER_EXTS "+define+COVER_RV64I"
+    #lappend FCdefineCOVER_EXTS "+define+COVER_RV64M"
+    #lappend FCdefineCOVER_EXTS "+define+COVER_RV64A"
+    #lappend FCdefineCOVER_EXTS "+define+COVER_RV64F"
+    #lappend FCdefineCOVER_EXTS "+define+COVER_RV64D"
+    #lappend FCdefineCOVER_EXTS "+define+COVER_RV64ZICSR"
+    #lappend FCdefineCOVER_EXTS "+define+COVER_RV64C"
 
-set LockStepIndex [lsearch -exact $lst "--lockstep"]
-# ugh.  can't have more than 9 arguments passed to vsim. why? I'll have to remove --lockstep when running
-# functional coverage and imply it.
-if {$LockStepIndex >= 0 || $FunctCoverageIndex >= 0} {
-    set lockstep 1
-
-    # ideally this would all be one or two variables, but questa is having a real hard time
-    # with this.  For now they have to be separate.
-    set lockstepvoptstring "+define+USE_IMPERAS_DV"
-    set ImperasPubInc +incdir+$env(IMPERAS_HOME)/ImpPublic/include/host
-    set ImperasPrivInc +incdir+$env(IMPERAS_HOME)/ImpProprietary/include/host
-    set rvviFiles       $env(IMPERAS_HOME)/ImpPublic/source/host/rvvi/*.sv
-    set idvFiles $env(IMPERAS_HOME)/ImpProprietary/source/host/idv/*.sv
-    set SVLib "-sv_lib"
-    set SVLibPath $env(IMPERAS_HOME)/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model
-    #set OtherFlags $::env(OTHERFLAGS)  # not working 7/15/24 dh; this should be the way to pass things like --verbose (Issue 871)
-
-    if {$LockStepIndex >= 0} {
-        set lst [lreplace $lst $LockStepIndex $LockStepIndex]
-    }
 }
 
+# if --lockstep or --fcov found set flag and remove from list
+if {[lcheck lst "--lockstep"] || $FunctCoverage == 1} {
+    set lockstep 1
+    set lockstepvlog "+define+USE_IMPERAS_DV \
+                      +incdir+${IMPERAS_HOME}/ImpPublic/include/host \
+                      +incdir+${IMPERAS_HOME}/ImpProprietary/include/host \
+                      ${IMPERAS_HOME}/ImpPublic/source/host/rvvi/*.sv \
+                      ${IMPERAS_HOME}/ImpProprietary/source/host/idv/*.sv"
+    set SVLib "-sv_lib ${IMPERAS_HOME}/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model"
+    #set OtherFlags $::env(OTHERFLAGS)  # not working 7/15/24 dh; this should be the way to pass things like --verbose (Issue 871)
+}
 
 # separate the +args from the -G parameters
 foreach otherArg $lst {
@@ -181,6 +153,7 @@ foreach otherArg $lst {
     }
 }
 
+# Debug print statements
 if {$DEBUG > 0} {
     echo "GUI = $GUI"
     echo "ccov = $ccov"
@@ -192,28 +165,24 @@ if {$DEBUG > 0} {
     echo "Extra -args = $ParamArgs"
 }
 
-foreach x $PlusArgs {
-    echo "Element is $x"
-}
-
-#quit
-
 # compile source files
 # suppress spurious warnngs about
 # "Extra checking for conflicts with always_comb done at vopt time"
 # because vsim will run vopt
-
-vlog -lint -work ${WKDIR}  +incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared ${lockstepvoptstring} ${FCdefineIDV_INCLUDE_TRACE2COV} ${FCdefineINCLUDE_TRACE2COV} ${ImperasPubInc} ${ImperasPrivInc} ${rvviFiles} ${FCdefineCOVER_BASE_RV64I} ${FCdefineCOVER_LEVEL_DV_PR_EXT} ${FCdefineCOVER_RV64I} ${FCdefineCOVER_RV64M} ${FCdefineCOVER_RV64A} ${FCdefineCOVER_RV64F} ${FCdefineCOVER_RV64D} ${FCdefineCOVER_RV64ZICSR} ${FCdefineCOVER_RV64C} ${FCdefineRVVI_COVERAGE} ${idvFiles}   ${riscvISACOVsrc} ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv  ${SRC}/*/*.sv ${SRC}/*/*/*.sv +incdir+${FCRVVI}/common +incdir+${FCRVVI} ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
+set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared +incdir+${FCRVVI}/common +incdir+${FCRVVI}"
+set SOURCES "${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv"
+vlog -lint -work ${WKDIR} {*}${INC_DIRS} {*}${FCvlog} {*}${FCdefineCOVER_EXTS} {*}${lockstepvlog} ${FCdefineRVVI_COVERAGE} {*}${SOURCES} -suppress 2583 -suppress 7063,2596,13286
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
 vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} {*}${ParamArgs} -o testbenchopt ${CoverageVoptArg}
 
-vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} {*}${PlusArgs} -fatal 7 ${SVLib} ${SVLibPath} ${OtherFlags} ${FCTRACE2COV} ${FCdefineIDV_TRACE2COV} -suppress 3829 ${CoverageVsimArg}
+vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} {*}${PlusArgs} -fatal 7 {*}${SVLib} ${OtherFlags} {*}${FCvopt} -suppress 3829 ${CoverageVsimArg}
 
-#    vsim -lib wkdir/work_${1}_${2} testbenchopt  -fatal 7 -suppress 3829
 # power add generates the logging necessary for said generation.
 # power add -r /dut/core/*
+
+# add waveforms if GUI is enabled
 if { ${GUI} } {
     add log -recursive /*
     if { ${TESTBENCH} eq "testbench_fp" } {
@@ -255,4 +224,3 @@ if {$ccov} {
 if { ${GUI} == 0} {
     quit
 }
-

From e6ddebde725dba69999bb6e0c3384f233bfa7430 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 11:02:23 -0700
Subject: [PATCH 07/13] Add number of mismatches exit code to cachesim scripts

---
 bin/CacheSim.py        | 14 +++++++++-----
 sim/rv64gc_CacheSim.py | 14 +++++++++++---
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/bin/CacheSim.py b/bin/CacheSim.py
index 447ed9145..d07ded9ea 100755
--- a/bin/CacheSim.py
+++ b/bin/CacheSim.py
@@ -192,7 +192,7 @@ class Cache:
         return self.__str__()
     
 
-if __name__ == "__main__":
+def main():
     parser = argparse.ArgumentParser(description="Simulates a L1 cache.")
     parser.add_argument('numlines', type=int, help="The number of lines per way (a power of 2)", metavar="L")
     parser.add_argument('numways', type=int, help="The number of ways (a power of 2)", metavar='W')
@@ -206,7 +206,7 @@ if __name__ == "__main__":
     args = parser.parse_args()
     cache = Cache(args.numlines, args.numways, args.addrlen, args.taglen)
     extfile = os.path.expanduser(args.file)
-    nofails = True
+    mismatches = 0
 
     if args.perf:
         hits = 0
@@ -268,7 +268,7 @@ if __name__ == "__main__":
                     
                     if not result == lninfo[2]:
                         print("Result mismatch at address", lninfo[0]+ ". Wally:", lninfo[2]+", Sim:", result)
-                        nofails = False
+                        mismatches += 1
     if args.dist:
         percent_loads = str(round(100*loads/totalops))
         percent_stores = str(round(100*stores/totalops))
@@ -279,5 +279,9 @@ if __name__ == "__main__":
         ratio = round(hits/misses,3)
         print("There were", hits, "hits and", misses, "misses. The hit/miss ratio was", str(ratio)+".")
     
-    if nofails:
-        print("SUCCESS! There were no mismatches between Wally and the sim.")
\ No newline at end of file
+    if mismatches == 0:
+        print("SUCCESS! There were no mismatches between Wally and the sim.")
+    return mismatches
+
+if __name__ == '__main__':
+    exit(main())
diff --git a/sim/rv64gc_CacheSim.py b/sim/rv64gc_CacheSim.py
index 6896c996c..aedc7c9ca 100755
--- a/sim/rv64gc_CacheSim.py
+++ b/sim/rv64gc_CacheSim.py
@@ -29,6 +29,7 @@
 ################################################################################################
 import os
 import argparse
+import subprocess
 
 # NOTE: make sure testbench.sv has the ICache and DCache loggers enabled!
 # This does not check the test output for correctness, run regression for that.
@@ -58,16 +59,17 @@ tests64gc = ["arch64i"]
 cachetypes = ["ICache", "DCache"]
 simdir = os.path.expandvars("$WALLY/sim")
 
-if __name__ == '__main__':
+def main():
     parser = argparse.ArgumentParser(description="Runs the cache simulator on all rv64gc test suites")
     parser.add_argument('-p', "--perf", action='store_true', help="Report hit/miss ratio")
     parser.add_argument('-d', "--dist", action='store_true', help="Report distribution of operations")
     parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator")
-
     args = parser.parse_args()
+
     simargs = "-GI_CACHE_ADDR_LOGGER=1\\\'b1 -GD_CACHE_ADDR_LOGGER=1\\\'b1"
     testcmd = "wsim --sim " + args.sim + " rv64gc {} --args \"" + simargs + "\" > /dev/null"
     cachecmd = "CacheSim.py 64 4 56 44 -f {}"
+    mismatches = 0
 
     if args.perf:
         cachecmd += " -p"
@@ -83,5 +85,11 @@ if __name__ == '__main__':
         os.system(testcmd.format(test))
         for cache in cachetypes:
             print(f"{bcolors.OKCYAN}Running the", cache, f"simulator.{bcolors.ENDC}")
-            os.system(cachecmd.format(args.sim+"/"+cache+".log"))
+            result = subprocess.run(cachecmd.format(args.sim+"/"+cache+".log"), shell=True)
+            mismatches += result.returncode
         print()
+    return mismatches
+
+if __name__ == '__main__':
+    exit(main())
+

From 78bd6822c63f9cbdf1e62c20ec52a0029d3020c1 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 13:08:16 -0700
Subject: [PATCH 08/13] Add --params argument to wsim and use for overriding
 top-level params

---
 bin/wsim               | 46 +++++++++++++++++++++++++++---------------
 sim/questa/wally.do    | 36 ++++++++++++++++++++++-----------
 sim/rv64gc_CacheSim.py | 17 ++++++++--------
 sim/vcs/run_vcs        | 23 +++++++++++++++++----
 sim/verilator/Makefile | 17 ++++++----------
 5 files changed, 87 insertions(+), 52 deletions(-)

diff --git a/bin/wsim b/bin/wsim
index ea7086bdf..4edd562da 100755
--- a/bin/wsim
+++ b/bin/wsim
@@ -30,6 +30,7 @@ parser.add_argument("--ccov", "-c", help="Code Coverage", action="store_true")
 parser.add_argument("--fcov", "-f", help="Functional Coverage, implies lockstep", action="store_true")
 parser.add_argument("--fcovrvvi", "-fr", help="Functional Coverage RVVI", action="store_true")
 parser.add_argument("--args", "-a", help="Optional arguments passed to simulator via $value$plusargs", default="")
+parser.add_argument("--params", "-p", help="Optional top-level parameter overrides of the form param=value", default="")
 parser.add_argument("--vcd", "-v", help="Generate testbench.vcd", action="store_true")
 parser.add_argument("--lockstep", "-l", help="Run ImperasDV lock, step, and compare.", action="store_true")
 parser.add_argument("--locksteplog", "-b", help="Retired instruction number to be begin logging.", default=0)
@@ -67,7 +68,10 @@ if (args.vcd):
     args.args += " -DMAKEVCD=1"
 
 if (args.rvvi):
-    args.args += " -GRVVI_SYNTH_SUPPORTED=1"
+    args.params += " RVVI_SYNTH_SUPPORTED=1 "
+
+if (args.tb == "testbench_fp"):
+    args.params += " TEST=\"" + args.testsuite + "\" "
 
 # if lockstep is enabled, then we need to pass the Imperas lockstep arguments
 if(int(args.locksteplog) >= 1): EnableLog = 1
@@ -77,10 +81,10 @@ if (args.lockstep):
     if(args.locksteplog != 0): ImperasPlusArgs = " +IDV_TRACE2LOG=" + str(EnableLog) + " +IDV_TRACE2LOG_AFTER=" + str(args.locksteplog) 
     else: ImperasPlusArgs = ""
     if(args.fcov):
-        CovEnableStr = "1" if int(args.covlog) > 0  else "0";
+        CovEnableStr = "1" if int(args.covlog) > 0  else "0"
         if(args.covlog >= 1): EnableLog = 1
         else: EnableLog = 0
-        ImperasPlusArgs = " +IDV_TRACE2COV=" + str(EnableLog) + " +TRACE2LOG_AFTER=" + str(args.covlog) + " +TRACE2COV_ENABLE=" + CovEnableStr;
+        ImperasPlusArgs = " +IDV_TRACE2COV=" + str(EnableLog) + " +TRACE2LOG_AFTER=" + str(args.covlog) + " +TRACE2COV_ENABLE=" + CovEnableStr
         suffix = ""
     else:
         CovEnableStr = ""
@@ -89,7 +93,8 @@ else:
     prefix = ""
     ImperasPlusArgs = ""
     suffix = ""
-flags = suffix + " " + ImperasPlusArgs
+flags = suffix
+args.args += ImperasPlusArgs
 
 # other flags
 if (args.ccov):
@@ -111,15 +116,18 @@ cd = "cd $WALLY/sim/" +args.sim
 
 # per-simulator launch
 if (args.sim == "questa"):
+    if (args.gui) and (args.testbench == "testbench"):
+        args.params += "DEBUG=1"
+    if (ElfFile != ""):
+        args.args += " " + ElfFile
+    if (args.args != ""):
+        args.args = " --args \\\"" + args.args + "\\\""
+    if (args.params != ""):
+        args.params = " --params \\\"" + args.params + "\\\""
     # Questa cannot accept more than 9 arguments.  fcov implies lockstep
-    if (args.tb == "testbench_fp"):
-        args.args = " -GTEST=\"" + args.testsuite + "\" " + args.args
-    cmd = "do wally.do " + args.config + " " + args.testsuite + " " + args.tb + " " + args.args + " " + ElfFile + " " + flags
+    cmd = "do wally.do " + args.config + " " + args.testsuite + " " + args.tb + " " + args.args + " " + args.params + " " + flags
     if (args.gui):  # launch Questa with GUI; add +acc to keep variables accessible
-        if(args.tb == "testbench"): 
-            cmd = cd + "; " + prefix + " vsim -do \"" + cmd + " +acc -GDEBUG=1\""
-        elif(args.tb == "testbench_fp"):
-            cmd = cd + "; " + prefix + " vsim -do \"" + cmd + " +acc\""
+        cmd = cd + "; " + prefix + " vsim -do \"" + cmd + " +acc\""
     else: # launch Questa in batch mode
         cmd = cd + "; " + prefix + " vsim -c -do \"" + cmd + "\""
     print("Running Questa with command: " + cmd)
@@ -127,17 +135,23 @@ if (args.sim == "questa"):
 elif (args.sim == "verilator"):
     # PWD=${WALLY}/sim CONFIG=rv64gc TESTSUITE=arch64i
     print(f"Running Verilator on {args.config} {args.testsuite}")
-    os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite} TESTBENCH={args.tb} EXTRA_ARGS=\"{args.args}\"")
+    os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite} TESTBENCH={args.tb} PLUS_ARGS=\"{args.args}\" PARAM_ARGS=\"{args.params}\"")
 elif (args.sim == "vcs"):
+    print("wsim params: " + args.params)
     print(f"Running VCS on " + args.config + " " + args.testsuite)
-    if (args.gui):  
-        args.args += "gui"
+    # if (args.gui):
+    #     flags += " --gui"
     if (args.args == ""):
         vcsargs = ""
     else:
-        vcsargs = " --args \"" + args.args + "\""
+        vcsargs = " --args \"" + args.args + "\" "
+    if (args.params == ""):
+        vcsparams = ""
+    else:
+        vcsparams = " --params \"" + args.params + "\" "
+    print("VCS params: " + vcsparams)
     if (ElfFile != ""):
         ElfFile = " --elffile " + ElfFile
-    cmd = cd + "; " + prefix + " ./run_vcs " + args.config + " " + args.testsuite + vcsargs + ElfFile + " " + flags
+    cmd = cd + "; " + prefix + " ./run_vcs " + args.config + " " + args.testsuite + " " + args.tb + " " + vcsargs + vcsparams + ElfFile + " " + flags
     print(cmd)
     os.system(cmd)
diff --git a/sim/questa/wally.do b/sim/questa/wally.do
index a8c9193d2..6437634e5 100644
--- a/sim/questa/wally.do
+++ b/sim/questa/wally.do
@@ -8,8 +8,8 @@
 #
 # Takes 1:10 to run RV64IC tests using gui
 
-# Usage: do wally-batch.do <config> <testcases> <testbench> [--ccov] [--fcov] [+acc] [any number of +value] [any number of -G VAR=VAL]
-# Example: do wally-batch.do rv64gc arch64i testbench
+# Usage: do wally.do <config> <testcases> <testbench> [--ccov] [--fcov] [+acc] [--args "any number of +value"] [--params "any number of VAR=VAL parameter overrides"]
+# Example: do wally.do rv64gc arch64i testbench
 
 # Use this wally.do file to run this example.
 # Either bring up ModelSim and type the following at the "ModelSim>" prompt:
@@ -53,6 +53,11 @@ if [file exists ${WKDIR}] {
 vlib ${WKDIR}
 # Create directory for functional coverage data
 mkdir -p ${FCRVVI}
+
+set PlusArgs ""
+set ParamArgs ""
+set ExpandedParamArgs {}
+
 set ccov 0
 set CoverageVoptArg ""
 set CoverageVsimArg ""
@@ -81,8 +86,6 @@ set from 4
 set step 1
 set lst {}
 
-set PlusArgs {}
-set ParamArgs {}
 for {set i 0} true {incr i} {
     set x [expr {$i*$step + $from}]
     if {$x > $argc} break
@@ -144,13 +147,22 @@ if {[lcheck lst "--lockstep"] || $FunctCoverage == 1} {
     #set OtherFlags $::env(OTHERFLAGS)  # not working 7/15/24 dh; this should be the way to pass things like --verbose (Issue 871)
 }
 
-# separate the +args from the -G parameters
-foreach otherArg $lst {
-    if {[string index $otherArg 0] eq "+"} {
-        lappend PlusArgs $otherArg
-    } else {
-        lappend ParamArgs $otherArg
+# Set PlusArgs passed using the --args flag
+set PlusArgsIndex [lsearch -exact $lst "--args"]
+if {$PlusArgsIndex >= 0} {
+    set PlusArgs [lindex $lst [expr {$PlusArgsIndex + 1}]]
+    set lst [lreplace $lst $PlusArgsIndex [expr {$PlusArgsIndex + 1}]]
+}
+
+# Set ParamArgs passed using the --params flag and expand into a list of -G<param> arguments
+set ParamArgsIndex [lsearch -exact $lst "--params"]
+if {$ParamArgsIndex >= 0} {
+    set ParamArgs [lindex $lst [expr {$ParamArgsIndex + 1}]]
+    set ParamArgs [regexp -all -inline {\S+} $ParamArgs]
+    foreach param $ParamArgs {
+        lappend ExpandedParamArgs -G$param
     }
+    set lst [lreplace $lst $ParamArgsIndex [expr {$ParamArgsIndex + 1}]]
 }
 
 # Debug print statements
@@ -162,7 +174,7 @@ if {$DEBUG > 0} {
     echo "FunctCoverage = $FunctCoverage"
     echo "remaining list = $lst"
     echo "Extra +args = $PlusArgs"
-    echo "Extra -args = $ParamArgs"
+    echo "Extra -args = $ExpandedParamArgs"
 }
 
 # compile source files
@@ -175,7 +187,7 @@ vlog -lint -work ${WKDIR} {*}${INC_DIRS} {*}${FCvlog} {*}${FCdefineCOVER_EXTS} {
 
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} {*}${ParamArgs} -o testbenchopt ${CoverageVoptArg}
+vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} {*}${ExpandedParamArgs} -o testbenchopt ${CoverageVoptArg}
 
 vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} {*}${PlusArgs} -fatal 7 {*}${SVLib} ${OtherFlags} {*}${FCvopt} -suppress 3829 ${CoverageVsimArg}
 
diff --git a/sim/rv64gc_CacheSim.py b/sim/rv64gc_CacheSim.py
index aedc7c9ca..60dc092b5 100755
--- a/sim/rv64gc_CacheSim.py
+++ b/sim/rv64gc_CacheSim.py
@@ -6,6 +6,7 @@
 ## Written: lserafini@hmc.edu
 ## Created: 11 April 2023
 ## Modified: 12 April 2023
+## Modified: 10 August 2023, jcarlin@hmc.edu
 ##
 ## Purpose: Run the cache simulator on each rv64gc test suite in turn.
 ##
@@ -48,13 +49,12 @@ class bcolors:
     BOLD = '\033[1m'
     UNDERLINE = '\033[4m'
 
-# tests64gc = ["coverage64gc", "arch64f", "arch64d", "arch64i", "arch64priv", "arch64c",  "arch64m",
-tests64gc = ["coverage64gc", "arch64i", "arch64priv", "arch64c",  "arch64m",
-             "arch64zi", "wally64a", "wally64periph", "wally64priv",
-             "arch64zba",  "arch64zbb",  "arch64zbc",  "arch64zbs",
-             "imperas64f", "imperas64d", "imperas64c", "imperas64i"]
+tests64gc = ["coverage64gc", "arch64i", "arch64priv", "arch64c",  "arch64m", "arch64zcb",
+             "arch64zifencei", "arch64zicond", "arch64a_amo", "wally64a_lrsc", "wally64periph", "wally64priv",
+             "arch64zbkb", "arch64zbkc", "arch64zbkx", "arch64zknd", "arch64zkne", "arch64zknh",
+             "arch64zba",  "arch64zbb",  "arch64zbc", "arch64zbs"]
 # arch64i is the most interesting case.  Uncomment line below to run just that case
-tests64gc = ["arch64i"]
+# tests64gc = ["arch64i"]
 
 cachetypes = ["ICache", "DCache"]
 simdir = os.path.expandvars("$WALLY/sim")
@@ -65,9 +65,8 @@ def main():
     parser.add_argument('-d', "--dist", action='store_true', help="Report distribution of operations")
     parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator")
     args = parser.parse_args()
-
-    simargs = "-GI_CACHE_ADDR_LOGGER=1\\\'b1 -GD_CACHE_ADDR_LOGGER=1\\\'b1"
-    testcmd = "wsim --sim " + args.sim + " rv64gc {} --args \"" + simargs + "\" > /dev/null"
+    simargs = "I_CACHE_ADDR_LOGGER=1\\\'b1 D_CACHE_ADDR_LOGGER=1\\\'b1"
+    testcmd = "wsim --sim " + args.sim + " rv64gc {} --params \"" + simargs + "\" > /dev/null"
     cachecmd = "CacheSim.py 64 4 56 44 -f {}"
     mismatches = 0
 
diff --git a/sim/vcs/run_vcs b/sim/vcs/run_vcs
index 00bfea9c7..6d5a7a677 100755
--- a/sim/vcs/run_vcs
+++ b/sim/vcs/run_vcs
@@ -23,10 +23,12 @@ def runfindcmd(cmd):
 parser = argparse.ArgumentParser()
 parser.add_argument("config", help="Configuration file")
 parser.add_argument("testsuite", help="Test suite (or none, when running a single ELF file) ")
+parser.add_argument("--tb", "-t", help="Testbench", choices=["testbench", "testbench_fp"], default="testbench")
 parser.add_argument("--elffile", "-e", help="ELF file name", default="")
 parser.add_argument("--coverage", "-c", help="Code & Functional Coverage", action="store_true")
 parser.add_argument("--fcov", "-f", help="Code & Functional Coverage", action="store_true")
 parser.add_argument("--args", "-a", help="Optional arguments passed to simulator via $value$plusargs", default="")
+parser.add_argument("--params", "-p", help="Optional top-level parameter overrides of the form param=value", default="")
 parser.add_argument("--lockstep", "-l", help="Run ImperasDV lock, step, and compare.", action="store_true")
 # GUI not yet implemented
 #parser.add_argument("--gui", "-g", help="Simulate with GUI", action="store_true")
@@ -49,7 +51,8 @@ rtlsrc_cmd = "find " + srcdir + ' -name "*.sv" ! -path "' + srcdir + '/generic/m
 rtlsrc_files = runfindcmd(rtlsrc_cmd)
 tbcommon_cmd = 'find ' + tbdir+'/common -name "*.sv" ! -path "' + tbdir+'/common/wallyTracer.sv"'
 tbcommon_files = runfindcmd(tbcommon_cmd)
-RTL_FILES = tbdir+'/testbench.sv ' + str(rtlsrc_files) + ' '  + str(tbcommon_files)
+tb_file = tbdir + "/" + args.tb + ".sv"
+RTL_FILES = tb_file + ' ' + str(rtlsrc_files) + ' '  + str(tbcommon_files)
 
 # Include directories
 INCLUDE_PATH="+incdir+" + cfgdir + "/" + args.config + " +incdir+" + cfgdir + "/deriv/" + args.config + " +incdir+" + cfgdir + "/shared +incdir+$WALLY/tests +incdir+" + tbdir + " +incdir+" + srcdir
@@ -68,10 +71,23 @@ if (args.coverage):
 else:
     COV_OPTIONS = ""
 
+# Write parameter overrides to a file
+f = open(os.path.expandvars(wkdir) + "/param_overrides.txt", "x")
+for param in args.params.split():
+    [param, value] = param.split("=")
+    value = value.replace("\\'", "'")
+    # print("param=" + param + " value=" + value)
+    f.write("assign " + value + " " + args.tb + "/" + param + "\n")
+# testbench_fp override
+if (args.tb == "testbench_fp"):
+    f.write("assign \"" + args.testsuite + "\" testbench_fp/TEST\n")
+f.close()
+PARAM_OVERRIDES=" -parameters " + wkdir + "/param_overrides.txt "
+
 # Simulation commands
 OUTPUT="sim_out"
-VCS_CMD="vcs +lint=all,noGCWM,noUI,noSVA-UA,noIDTS,noNS,noULCO,noCAWM-L,noWMIA-L,noSV-PIU,noSTASKW_CO,noSTASKW_CO1,noSTASKW_RMCOF -suppress +warn -sverilog +vc -Mupdate -line -full64 -lca -ntb_opts sensitive_dyn " + INCLUDE_PATH # Disabled Debug flags; add them back for a GUI mode -debug_access+all+reverse  -kdb +vcs+vcdpluson 
-VCS = VCS_CMD + " -Mdir=" + wkdir + " " + srcdir + "/cvw.sv " + LOCKSTEP_OPTIONS + " " + COV_OPTIONS + " " + RTL_FILES + " -o " + wkdir + "/" + OUTPUT + " -work " + wkdir + " -Mlib " + wkdir + " -l " + logdir + "/" + args.config + "_" + args.testsuite + ".log"
+VCS_CMD="vcs +lint=all,noGCWM,noUI,noSVA-UA,noIDTS,noNS,noULCO,noCAWM-L,noWMIA-L,noSV-PIU,noSTASKW_CO,noSTASKW_CO1,noSTASKW_RMCOF -suppress +warn -sverilog +vc -Mupdate -line -full64 -lca -ntb_opts sensitive_dyn " + "-top " + args.tb + PARAM_OVERRIDES + INCLUDE_PATH # Disabled Debug flags; add them back for a GUI mode -debug_access+all+reverse  -kdb +vcs+vcdpluson
+VCS = VCS_CMD + " -Mdir=" + wkdir + " " + srcdir + "/cvw.sv " + LOCKSTEP_OPTIONS + " " + COV_OPTIONS + " " + RTL_FILES + " -o " + wkdir + "/" + OUTPUT + " -work " + wkdir + " -Mlib=" + wkdir + " -l " + logdir + "/" + args.config + "_" + args.testsuite + ".log"
 SIMV_CMD= wkdir + "/" + OUTPUT + " +TEST=" + args.testsuite + " " + args.elffile + " " + args.args + " -no_save " + LOCKSTEP_SIMV 
 
 # Run simulation
@@ -81,4 +97,3 @@ subprocess.run(SIMV_CMD, shell=True)
 if (args.coverage):
     COV_RUN = "urg -dir " + wkdir + "/coverage.vdb -format text -report IndividualCovReport/" + args.config + "_" + args.testsuite
     subprocess.run(COV_RUN, shell=True)
-
diff --git a/sim/verilator/Makefile b/sim/verilator/Makefile
index 04544a914..326c397de 100644
--- a/sim/verilator/Makefile
+++ b/sim/verilator/Makefile
@@ -7,14 +7,13 @@ SHELL := /bin/bash
 
 # verilator configurations
 OPT=
-PARAMS?=-DVERILATOR=1 --no-trace-top
+PARAMS?=--no-trace-top
 NONPROF?=--stats
 VERILATOR_DIR=${WALLY}/sim/verilator
 SOURCE=${WALLY}/config/shared/*.vh ${WALLY}/config/${WALLYCONF} ${WALLY}/config/deriv/${WALLYCONF} ${WALLY}/src/cvw.sv ${WALLY}/testbench/*.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
-EXTRA_ARGS=
-PLUS_ARGS:=$(filter pattern +%, $(EXTRA_ARGS))
-PARAM_ARGS:=$(filter-out pattern +%, $(EXTRA_ARGS))
-
+PLUS_ARGS=
+PARAM_ARGS=
+EXPANDED_PARAM_ARGS:=$(patsubst %,-G%,$(PARAM_ARGS))
 
 WALLYCONF?=rv64gc
 TEST?=arch64i
@@ -34,11 +33,9 @@ DEPENDENCIES=${WALLY}/config/shared/*.vh $(SOURCES)
 # regular testbench requires a wrapper defining getenvval
 ifeq ($(TESTBENCH), testbench)
 	WRAPPER=${WALLY}/sim/verilator/wrapper.c
-	GTEST=
 	ARGTEST=+TEST=$(TEST)
 else
 	WRAPPER=
-	GTEST=-GTEST="\"${TEST}\"" 
 	ARGTEST=
 endif
 
@@ -66,8 +63,7 @@ wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH}: $(DEPENDENCIES)
 	--top-module ${TESTBENCH}  --relative-includes \
 	$(INCLUDE_PATH) \
 	${WRAPPER} \
-	${GTEST} \
-	${PARAM_ARGS} \
+	${EXPANDED_PARAM_ARGS} \
 	$(SOURCES)
 
 obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF): $(DEPENDENCIES)
@@ -79,8 +75,7 @@ obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF): $(DEPENDENCIES)
 	--top-module ${TESTBENCH}  --relative-includes \
 	$(INCLUDE_PATH) \
 	${WRAPPER} \
-	${GTEST} \
-	${PARAM_ARGS} \
+	${EXPANDED_PARAM_ARGS} \
 	$(SOURCES)
 
 clean:

From cfa3422d616f4a3b9d9bb2892be5edac7433a12c Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 14:20:55 -0700
Subject: [PATCH 09/13] Fix typo in wsim

---
 bin/wsim | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/bin/wsim b/bin/wsim
index 713c9a4a7..e6d72c3b9 100755
--- a/bin/wsim
+++ b/bin/wsim
@@ -124,7 +124,7 @@ cd = "cd $WALLY/sim/" +args.sim
 
 # per-simulator launch
 if (args.sim == "questa"):
-    if (args.gui) and (args.testbench == "testbench"):
+    if (args.gui) and (args.tb == "testbench"):
         args.params += "DEBUG=1"
     if (ElfFile != ""):
         args.args += " " + ElfFile

From 3edbdf8e86cb286782c8892c6d119125398e69ab Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 17:15:26 -0700
Subject: [PATCH 10/13] Fix VCS testbench argument

---
 bin/wsim | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/bin/wsim b/bin/wsim
index e6d72c3b9..b13019e1c 100755
--- a/bin/wsim
+++ b/bin/wsim
@@ -160,6 +160,6 @@ elif (args.sim == "vcs"):
     print("VCS params: " + vcsparams)
     if (ElfFile != ""):
         ElfFile = " --elffile " + ElfFile
-    cmd = cd + "; " + prefix + " ./run_vcs " + args.config + " " + args.testsuite + " " + args.tb + " " + vcsargs + vcsparams + ElfFile + " " + flags
+    cmd = cd + "; " + prefix + " ./run_vcs " + args.config + " " + args.testsuite + " " + " --tb " + args.tb + " " + vcsargs + vcsparams + ElfFile + " " + flags
     print(cmd)
     os.system(cmd)

From d96dbc313077ab86ce067c557d92678e166a71c7 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 17:23:05 -0700
Subject: [PATCH 11/13] Update VCS to work if param_overrides.txt already
 exists

---
 sim/vcs/run_vcs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/vcs/run_vcs b/sim/vcs/run_vcs
index 6d5a7a677..e15b4b962 100755
--- a/sim/vcs/run_vcs
+++ b/sim/vcs/run_vcs
@@ -72,7 +72,7 @@ else:
     COV_OPTIONS = ""
 
 # Write parameter overrides to a file
-f = open(os.path.expandvars(wkdir) + "/param_overrides.txt", "x")
+f = open(os.path.expandvars(wkdir) + "/param_overrides.txt", "w")
 for param in args.params.split():
     [param, value] = param.split("=")
     value = value.replace("\\'", "'")

From 23b4f929c4af6688eea0d7874f6075813c2a1ac8 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Sun, 11 Aug 2024 17:40:36 -0700
Subject: [PATCH 12/13] More VCS parameter cleanup

---
 sim/vcs/run_vcs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sim/vcs/run_vcs b/sim/vcs/run_vcs
index e15b4b962..02eccc59b 100755
--- a/sim/vcs/run_vcs
+++ b/sim/vcs/run_vcs
@@ -75,12 +75,12 @@ else:
 f = open(os.path.expandvars(wkdir) + "/param_overrides.txt", "w")
 for param in args.params.split():
     [param, value] = param.split("=")
-    value = value.replace("\\'", "'")
+    if "\\'" in value: # for bit values
+        value = value.replace("\\'", "'")
+    else:              # for strings
+        value = "\"" + value + "\""
     # print("param=" + param + " value=" + value)
     f.write("assign " + value + " " + args.tb + "/" + param + "\n")
-# testbench_fp override
-if (args.tb == "testbench_fp"):
-    f.write("assign \"" + args.testsuite + "\" testbench_fp/TEST\n")
 f.close()
 PARAM_OVERRIDES=" -parameters " + wkdir + "/param_overrides.txt "
 

From 492958157611191a454010e0097769b264eeb935 Mon Sep 17 00:00:00 2001
From: Jordan Carlin <jordanmcarlin@gmail.com>
Date: Fri, 30 Aug 2024 11:57:31 -0700
Subject: [PATCH 13/13] Cleanup

---
 sim/questa/wally.do | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/questa/wally.do b/sim/questa/wally.do
index fa69be865..503fc710b 100644
--- a/sim/questa/wally.do
+++ b/sim/questa/wally.do
@@ -152,7 +152,7 @@ if {[lcheck lst "--fcov2"]} {
     #lappend FCdefineCOVER_EXTS "+define+COVER_RV64D"
     #lappend FCdefineCOVER_EXTS "+define+COVER_RV64ZICSR"
     #lappend FCdefineCOVER_EXTS "+define+COVER_RV64C"
-}\
+}
 
 # if --lockstep or --fcov found set flag and remove from list
 if {[lcheck lst "--lockstep"] || $FunctCoverage == 1} {