From 6ddd8d4e2b80cdca401f231995bcfd02e72b1782 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Fri, 14 Jul 2023 15:47:05 -0500 Subject: [PATCH] Fixed the icache and dcache overlogging issue. --- testbench/common/loggers.sv | 2 ++ 1 file changed, 2 insertions(+) diff --git a/testbench/common/loggers.sv b/testbench/common/loggers.sv index 18aa2de34..9dd2a7950 100644 --- a/testbench/common/loggers.sv +++ b/testbench/common/loggers.sv @@ -138,6 +138,7 @@ module loggers import cvw::*; #(parameter cvw_t P, assign Enable = dut.core.ifu.bus.icache.icache.cachefsm.LRUWriteEn & dut.core.ifu.immu.immu.pmachecker.Cacheable & ~dut.core.ifu.bus.icache.icache.cachefsm.FlushStage & + dut.core.ifu.bus.icache.icache.cachefsm.CacheEn & ~reset; flop #(1) ResetDReg(clk, reset, resetD); assign resetEdge = ~reset & resetD; @@ -190,6 +191,7 @@ module loggers import cvw::*; #(parameter cvw_t P, assign Enabled = dut.core.lsu.bus.dcache.dcache.cachefsm.LRUWriteEn & ~dut.core.lsu.bus.dcache.dcache.cachefsm.FlushStage & dut.core.lsu.dmmu.dmmu.pmachecker.Cacheable & + dut.core.lsu.bus.dcache.dcache.cachefsm.CacheEn & (AccessTypeString != "NULL"); initial begin