Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Simplified integer division preprocessing in fdivsqrt

Browse Source
This commit is contained in:
David Harris 2023-04-06 16:43:28 -07:00
parent 4ce223281a
commit 6db65f30b1
1 changed files with 8 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/fpu/fdivsqrt/fdivsqrtpreproc.sv
View File

@ -61,7 +61,7 @@ module fdivsqrtpreproc (
if (`IDIV_ON_FPU) begin:intpreproc // Int Supported if (`IDIV_ON_FPU) begin:intpreproc // Int Supported
logic signedDiv, NegQuotE; logic signedDiv, NegQuotE;
logic AsBit, BsBit, AsE, BsE, ALTBE; logic AsE, BsE, ALTBE;
logic [`XLEN-1:0] AE, BE, PosA, PosB; logic [`XLEN-1:0] AE, BE, PosA, PosB;
logic [`DIVBLEN:0] ZeroDiff, p; logic [`DIVBLEN:0] ZeroDiff, p;
@ -71,22 +71,16 @@ module fdivsqrtpreproc (
// Source handling // Source handling
if (`XLEN==64) begin // 64-bit, supports W64 if (`XLEN==64) begin // 64-bit, supports W64
mux2 #(1) azeromux(~(|ForwardedSrcAE), ~(|ForwardedSrcAE[31:0]), W64E, AZeroE); mux2 #(64) amux(ForwardedSrcAE, {{32{ForwardedSrcAE[31] & signedDiv}}, ForwardedSrcAE[31:0]}, W64E, AE);
mux2 #(1) bzeromux(~(|ForwardedSrcBE), ~(|ForwardedSrcBE[31:0]), W64E, BZeroE); mux2 #(64) bmux(ForwardedSrcBE, {{32{ForwardedSrcBE[31] & signedDiv}}, ForwardedSrcBE[31:0]}, W64E, BE);
mux2 #(1) abitmux(ForwardedSrcAE[63], ForwardedSrcAE[31], W64E, AsBit);
mux2 #(1) bbitmux(ForwardedSrcBE[63], ForwardedSrcBE[31], W64E, BsBit);
mux2 #(64) amux(ForwardedSrcAE, {{(`XLEN-32){AsE}}, ForwardedSrcAE[31:0]}, W64E, AE);
mux2 #(64) bmux(ForwardedSrcBE, {{(`XLEN-32){BsE}}, ForwardedSrcBE[31:0]}, W64E, BE);
assign AsE = signedDiv & AsBit;
assign BsE = signedDiv & BsBit;
end else begin // 32 bits only end else begin // 32 bits only
assign AsE = signedDiv & ForwardedSrcAE[31];
assign BsE = signedDiv & ForwardedSrcBE[31];
assign AE = ForwardedSrcAE; assign AE = ForwardedSrcAE;
assign BE = ForwardedSrcBE; assign BE = ForwardedSrcBE;
assign AZeroE = ~(|ForwardedSrcAE); end
assign BZeroE = ~(|ForwardedSrcBE); assign AZeroE = ~(|AE);
end assign BZeroE = ~(|BE);
assign AsE = AE[`XLEN-1] & signedDiv;
assign BsE = BE[`XLEN-1] & signedDiv;
// Force integer inputs to be postiive // Force integer inputs to be postiive
mux2 #(`XLEN) posamux(AE, -AE, AsE, PosA); mux2 #(`XLEN) posamux(AE, -AE, AsE, PosA);