From 1e8ccf344930904e08ec432f558a823997f73693 Mon Sep 17 00:00:00 2001 From: DTowersM Date: Wed, 6 Jul 2022 23:43:57 +0000 Subject: [PATCH] added changes to the testbench and benchmarks/coremark to support running the addins directory without the fpu --- benchmarks/coremark/Makefile | 14 ++++++++------ .../coremark/riscv64-baremetal/core_portme.c | 12 ++++++------ .../coremark/riscv64-baremetal/core_portme.h | 2 +- pipelined/testbench/tests.vh | 2 +- 4 files changed, 16 insertions(+), 14 deletions(-) diff --git a/benchmarks/coremark/Makefile b/benchmarks/coremark/Makefile index f25cd2cd6..bc508b7d4 100644 --- a/benchmarks/coremark/Makefile +++ b/benchmarks/coremark/Makefile @@ -1,7 +1,8 @@ -#cmbase=../../addins/coremark PORT_DIR = $(CURDIR)/riscv64-baremetal -cmbase=../../addins/coremark -work_dir=$(cmbase)/work +# cmbase=../../addins/coremark +cmbase= ../riscv-coremark/coremark +work_dir= ../../benchmarks/coremark/work +XLEN ?=64 sources=$(cmbase)/core_main.c $(cmbase)/core_list_join.c $(cmbase)/coremark.h \ $(cmbase)/core_matrix.c $(cmbase)/core_state.c $(cmbase)/core_util.c \ $(PORT_DIR)/core_portme.h $(PORT_DIR)/core_portme.c $(PORT_DIR)/core_portme.mak \ @@ -9,15 +10,16 @@ sources=$(cmbase)/core_main.c $(cmbase)/core_list_join.c $(cmbase)/coremark.h \ $(work_dir)/coremark.bare.riscv.elf.memfile: $(work_dir)/coremark.bare.riscv riscv64-unknown-elf-objdump -D $< > $<.elf.objdump - riscv64-unknown-elf-elf2hex --bit-width 64 --input $< --output $@ + riscv64-unknown-elf-elf2hex --bit-width $(XLEN) --input $< --output $@ extractFunctionRadix.sh $<.elf.objdump - (cd ../../pipelined/regression && (vsim -c -do "do wally-pipelined-batch.do rv64gc coremark" > $(work_dir)/coremark.sim.log)) + (cd ../../pipelined/regression && (vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" > $(work_dir)/coremark.sim.log)) cd ../../benchmarks/coremark/ $(work_dir)/coremark.bare.riscv: $(sources) Makefile # make -C $(cmbase) PORT_DIR=$(PORT_DIR) compile RISCV=/opt/riscv/riscv-gnu-toolchain XCFLAGS="-march=rv64imd -mabi=lp64d -mbranch-cost=1 -DSKIP_DEFAULT_MEMSET -mtune=sifive-7-series -Ofast -funroll-all-loops -fno-delete-null-pointer-checks -fno-rename-registers --param=loop-max-datarefs-for-datadeps=0 -funroll-all-loops --param=uninlined-function-insns=8 -fno-tree-vrp -fwrapv -fno-toplevel-reorder --param=max-inline-insns-size=128 -fipa-pta" # These flags were used by WD on CoreMark - make -C $(cmbase) PORT_DIR=$(PORT_DIR) compile RISCV=$(RISCV)/riscv-gnu-toolchain XCFLAGS="-march=rv64imd -mabi=lp64d -mbranch-cost=1 -DSKIP_DEFAULT_MEMSET -mtune=sifive-7-series -Ofast -funroll-all-loops -fno-delete-null-pointer-checks -fno-rename-registers --param=loop-max-datarefs-for-datadeps=0 -funroll-all-loops --param=uninlined-function-insns=8 -fno-tree-vrp -fwrapv -fipa-pta " + # make -C $(cmbase) PORT_DIR=$(PORT_DIR) compile RISCV=$(RISCV)/riscv-gnu-toolchain XCFLAGS="-march=rv64imd -mabi=lp64d -mbranch-cost=1 -DSKIP_DEFAULT_MEMSET -mtune=sifive-7-series -Ofast -funroll-all-loops -fno-delete-null-pointer-checks -fno-rename-registers --param=loop-max-datarefs-for-datadeps=0 -funroll-all-loops --param=uninlined-function-insns=8 -fno-tree-vrp -fwrapv -fipa-pta " + make -C $(cmbase) PORT_DIR=$(PORT_DIR) compile RISCV=$(RISCV)/riscv-gnu-toolchain XCFLAGS="-march=rv$(XLEN)imc -mabi=lp$(XLEN) -mbranch-cost=1 -DSKIP_DEFAULT_MEMSET -mtune=sifive-7-series -Ofast -funroll-all-loops -fno-delete-null-pointer-checks -fno-rename-registers --param=loop-max-datarefs-for-datadeps=0 -funroll-all-loops --param=uninlined-function-insns=8 -fno-tree-vrp -fwrapv -fipa-pta " # -fno-toplevel-reorder --param=max-inline-insns-size=128 " # adding this bit caused a compiler error mkdir -p $(work_dir) mv $(cmbase)/coremark.bare.riscv $(work_dir) diff --git a/benchmarks/coremark/riscv64-baremetal/core_portme.c b/benchmarks/coremark/riscv64-baremetal/core_portme.c index 74ced52dc..d63f08d19 100755 --- a/benchmarks/coremark/riscv64-baremetal/core_portme.c +++ b/benchmarks/coremark/riscv64-baremetal/core_portme.c @@ -210,12 +210,12 @@ CORE_TICKS get_time(void) { */ secs_ret time_in_secs(CORE_TICKS ticks) { secs_ret retval=((secs_ret)ticks) / (secs_ret)EE_TICKS_PER_SEC; - float retvalint = (float) retval; - ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retvalint); - ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %f\n", retvalint); - ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retval); - ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %f\n", retval); - return retvalint; + // float retvalint = (float) retval; + // ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retvalint); + // ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %f\n", retvalint); + // ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retval); + // ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %f\n", retval); + return retval; } #else #error "Please implement timing functionality in core_portme.c" diff --git a/benchmarks/coremark/riscv64-baremetal/core_portme.h b/benchmarks/coremark/riscv64-baremetal/core_portme.h index ef26e88ad..1d2baeb95 100755 --- a/benchmarks/coremark/riscv64-baremetal/core_portme.h +++ b/benchmarks/coremark/riscv64-baremetal/core_portme.h @@ -28,7 +28,7 @@ Original Author: Shay Gal-on Define to 1 if the platform supports floating point. */ #ifndef HAS_FLOAT -#define HAS_FLOAT 1 +#define HAS_FLOAT 0 #endif /* Configuration: HAS_TIME_H Define to 1 if platform has the time.h header file, diff --git a/pipelined/testbench/tests.vh b/pipelined/testbench/tests.vh index 79f1c760b..b859805a6 100644 --- a/pipelined/testbench/tests.vh +++ b/pipelined/testbench/tests.vh @@ -36,7 +36,7 @@ string tvpaths[] = '{ "../../tests/riscof/work/riscv-arch-test/", "../../tests/wally-riscv-arch-test/work/", //"../../tests/riscof/work/wally-riscv-arch-test/", "../../tests/imperas-riscv-tests/work/", - "../../benchmarks/riscv-coremark/work/", + "../../benchmarks/coremark/work/", "../../addins/embench-iot/" };