diff --git a/src/ieu/alu.sv b/src/ieu/alu.sv
index d5f338276..f1bfd912c 100644
--- a/src/ieu/alu.sv
+++ b/src/ieu/alu.sv
@@ -56,6 +56,9 @@ module alu #(parameter WIDTH=32) (
   logic             Rotate;
   logic [WIDTH:0]   shA;                                                                    // XLEN+1 bit input source to shifter
   logic [WIDTH-1:0] rotA;                                                                   // XLEN bit input source to shifter
+  logic [1:0]       shASelect;                                                              // select signal for shifter source generation mux 
+
+  assign shASelect = {W64,SubArith};
 
 
   if (`ZBS_SUPPORTED) begin: zbsdec
@@ -67,7 +70,7 @@ module alu #(parameter WIDTH=32) (
   // Sign/Zero extend mux
   if (WIDTH == 64) begin // rv64 must handle word s/z extensions
     always_comb 
-      case ({W64, SubArith})
+      case (shASelect)
         2'b00: shA = {{1'b0}, A};
         2'b01: shA = {A[63], A};
         2'b10: shA = {{33'b0}, A[31:0]};
diff --git a/src/ieu/controller.sv b/src/ieu/controller.sv
index 02ef3eeae..2520bbe2d 100644
--- a/src/ieu/controller.sv
+++ b/src/ieu/controller.sv
@@ -197,7 +197,8 @@ module controller(
   assign CSRWriteD = CSRReadD & !(CSRZeroSrcD & InstrD[13]);            // Don't write if setting or clearing zeros
   assign SFenceVmaD = PrivilegedD & (InstrD[31:25] ==  7'b0001001);
   assign FenceD = SFenceVmaD | FenceXD; // possible sfence.vma or fence.i
-
+  
+  //NOTE: Move the B conditional logic into bctrl
   if (`ZBA_SUPPORTED) begin
     // ALU Decoding is more comprehensive when ZBA is supported. Only conflict with Funct3 is with slt instructionsb
     assign sltD = (Funct3D == 3'b010 & (~BSelectD[3]));