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extraneous files

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This commit is contained in:
Kevin Kim 2023-07-06 19:49:13 -07:00
parent 8d898b16c7
commit 6851233303
3 changed files with 21 additions and 5 deletions
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3
setup.sh
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@ -16,7 +16,8 @@ echo \$WALLY set to ${WALLY}
# Must edit these based on your local environment. Ask your sysadmin. # Must edit these based on your local environment. Ask your sysadmin.
export MGLS_LICENSE_FILE=27002@zircon.eng.hmc.edu # Change this to your Siemens license server export MGLS_LICENSE_FILE=27002@zircon.eng.hmc.edu # Change this to your Siemens license server
export SNPSLMD_LICENSE_FILE=27020@zircon.eng.hmc.edu # Change this to your Synopsys license server export SNPSLMD_LICENSE_FILE=27020@zircon.eng.hmc.edu # Change this to your Synopsys license server
export QUESTA_HOME=/cad/mentor/questa_sim-2022.4_2/questasim # Change this for your path to Questa, excluding bin #export QUESTA_HOME=/cad/mentor/questa_sim-2022.4_2/questasim # Change this for your path to Questa, excluding bin
export QUESTA_HOME=/cad/mentor/questa_sim-2021.4_4/questasim # Change this for your path to Questa, excluding bin
#export QUESTA_HOME=/cad/mentor/questa_sim-2022.4_3/questasim # Change this for your path to Questa, excluding bin #export QUESTA_HOME=/cad/mentor/questa_sim-2022.4_3/questasim # Change this for your path to Questa, excluding bin
export SNPS_HOME=/cad/synopsys/SYN # Change this for your path to Design Compiler, excluding bin export SNPS_HOME=/cad/synopsys/SYN # Change this for your path to Design Compiler, excluding bin

15
testbench/testbench-fp.sv
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@ -659,7 +659,14 @@ module testbenchfp;
end end
end end
if (TEST === "customdiv") begin // if unified div sqrt is being tested if (TEST === "customdiv") begin // if unified div sqrt is being tested
Tests = {Tests, custom}; Tests = {Tests, customdiv};
OpCtrl = {OpCtrl, `DIV_OPCTRL};
WriteInt = {WriteInt, 1'b0};
Unit = {Unit, `DIVUNIT};
Fmt = {Fmt, 2'b10};
end
if (TEST === "customdivcorrect") begin // if unified div sqrt is being tested
Tests = {Tests, customdivcorrect};
OpCtrl = {OpCtrl, `DIV_OPCTRL}; OpCtrl = {OpCtrl, `DIV_OPCTRL};
WriteInt = {WriteInt, 1'b0}; WriteInt = {WriteInt, 1'b0};
Unit = {Unit, `DIVUNIT}; Unit = {Unit, `DIVUNIT};
@ -770,7 +777,7 @@ module testbenchfp;
.XNaN, .YNaN, .XSNaN, .YSNaN, .X, .Y, .CmpNV(CmpFlg[4]), .CmpFpRes(FpCmpRes)); .XNaN, .YNaN, .XSNaN, .YSNaN, .X, .Y, .CmpNV(CmpFlg[4]), .CmpFpRes(FpCmpRes));
end end
if (TEST === "div" | TEST === "sqrt" | TEST === "all"| TEST === "custom") begin: fdivsqrt if (TEST === "div" | TEST === "sqrt" | TEST === "all"| TEST === "custom" | TEST ==="customdivcorrect") begin: fdivsqrt
fdivsqrt #(P) fdivsqrt(.clk, .reset, .XsE(Xs), .FmtE(ModFmt), .XmE(Xm), .YmE(Ym), fdivsqrt #(P) fdivsqrt(.clk, .reset, .XsE(Xs), .FmtE(ModFmt), .XmE(Xm), .YmE(Ym),
.XeE(Xe), .YeE(Ye), .SqrtE(OpCtrlVal[0]), .SqrtM(OpCtrlVal[0]), .XeE(Xe), .YeE(Ye), .SqrtE(OpCtrlVal[0]), .SqrtM(OpCtrlVal[0]),
.XInfE(XInf), .YInfE(YInf), .XZeroE(XZero), .YZeroE(YZero), .XInfE(XInf), .YInfE(YInf), .XZeroE(XZero), .YZeroE(YZero),
@ -1018,6 +1025,10 @@ module testbenchfp;
assign CheckNow = (DivDone | ~divsqrtop) & (UnitVal !== `CVTINTUNIT) & (UnitVal !== `CMPUNIT); assign CheckNow = (DivDone | ~divsqrtop) & (UnitVal !== `CVTINTUNIT) & (UnitVal !== `CMPUNIT);
if (~(ResMatch & FlagMatch) & CheckNow) begin if (~(ResMatch & FlagMatch) & CheckNow) begin
integer fd;
fd = $fopen("fperr.out","a");
$fwrite(fd, "%h_%h_%h_%2h\n",X[15:0],Y[15:0],Ans[15:0],AnsFlg);
$fclose(fd);
errors += 1; errors += 1;
$display("TestNum %d OpCtrl %d", TestNum, OpCtrl[TestNum]); $display("TestNum %d OpCtrl %d", TestNum, OpCtrl[TestNum]);
$display("Error in %s", Tests[TestNum]); $display("Error in %s", Tests[TestNum]);

8
testbench/tests-fp.vh
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@ -581,8 +581,12 @@ string f128fma[] = '{
"f128_mulAdd_rnm.tv" "f128_mulAdd_rnm.tv"
}; };
string custom[] = '{ string customdiv[] = '{
"f16_div_rne.tv" "f16_custom.tv"
};
string customdivcorrect[] = '{
"f16_custom.tv"
}; };