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Defined empty RVMODEL interrupt macros to make riscof warnings go away

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This commit is contained in:
David Harris 2023-05-14 03:36:28 -07:00
parent 3eed030192
commit 67a089104c
2 changed files with 24 additions and 0 deletions
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12
tests/riscof/sail_cSim/env/model_test.h vendored
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@ -51,5 +51,17 @@
#define RVMODEL_CLEAR_MEXT_INT #define RVMODEL_CLEAR_MEXT_INT
#define RVMODEL_CLR_MSW_INT
#define RVMODEL_CLR_MTIMER_INT
#define RVMODEL_CLR_MEXT_INT
#define RVMODEL_SET_SSW_INT
#define RVMODEL_CLR_SSW_INT
#define RVMODEL_CLR_STIMER_INT
#define RVMODEL_CLR_SEXT_INT
#define RVMODEL_SET_VSW_INT
#define RVMODEL_CLR_VSW_INT
#define RVMODEL_CLR_VTIMER_INT
#define RVMODEL_CLR_VEXT_INT
#endif // _COMPLIANCE_MODEL_H #endif // _COMPLIANCE_MODEL_H

12
tests/riscof/spike/env/model_test.h vendored
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@ -56,5 +56,17 @@
#define RVMODEL_CLEAR_MEXT_INT #define RVMODEL_CLEAR_MEXT_INT
#define RVMODEL_CLR_MSW_INT
#define RVMODEL_CLR_MTIMER_INT
#define RVMODEL_CLR_MEXT_INT
#define RVMODEL_SET_SSW_INT
#define RVMODEL_CLR_SSW_INT
#define RVMODEL_CLR_STIMER_INT
#define RVMODEL_CLR_SEXT_INT
#define RVMODEL_SET_VSW_INT
#define RVMODEL_CLR_VSW_INT
#define RVMODEL_CLR_VTIMER_INT
#define RVMODEL_CLR_VEXT_INT
#endif // _COMPLIANCE_MODEL_H #endif // _COMPLIANCE_MODEL_H