From 4aecba2a514bb4fecd3395957248fb9265e4e885 Mon Sep 17 00:00:00 2001
From: Vikram Krishna <vkrishna@hmc.edu>
Date: Thu, 14 Nov 2024 03:51:27 -0800
Subject: [PATCH 1/3] added handling for OpCode=100

---
 src/fpu/fcmp.sv | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/fpu/fcmp.sv b/src/fpu/fcmp.sv
index d1baac3b8..682e492be 100755
--- a/src/fpu/fcmp.sv
+++ b/src/fpu/fcmp.sv
@@ -75,6 +75,7 @@ module fcmp import cvw::*;  #(parameter cvw_t P) (
         3'b0?1: if (P.ZFA_SUPPORTED) 
                   CmpNV = Zfa ? EitherSNaN : EitherNaN; // fltq,fleq / flt,fle perform CompareQuietLess / CompareSignalingLess differing on when to set invalid
                 else CmpNV = EitherNaN;                 // flt, fle
+        3'b100: CmpNV = 1'b0;
         default: CmpNV = 1'bx;
     endcase
   end 

From eb777d3fa43bfe0dc5e6cb142234dae67134bb85 Mon Sep 17 00:00:00 2001
From: Vikram Krishna <vkrishna@hmc.edu>
Date: Thu, 14 Nov 2024 03:53:26 -0800
Subject: [PATCH 2/3] updated froundnx conditional

---
 src/fpu/fround.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/fpu/fround.sv b/src/fpu/fround.sv
index b5c1b975e..67a3b90f6 100644
--- a/src/fpu/fround.sv
+++ b/src/fpu/fround.sv
@@ -147,6 +147,6 @@ module fround import cvw::*;  #(parameter cvw_t P) (
 
   // Flags
   assign FRoundNV = XSNaN;                               // invalid if input is signaling NaN
-  assign FRoundNX = ZfaFRoundNX & ~EgeNf & (Rp | Tp);    // Inexact if Round or Sticky bit set for FRoundNX instruction
+  assign FRoundNX = ZfaFRoundNX & ~EgeNf & (Rp | Tp) & ~XNaN;    // Inexact if Round or Sticky bit set for FRoundNX instruction
 
 endmodule

From 0c0949e82bd393fc7fb3d9d1e8349dd53c42e705 Mon Sep 17 00:00:00 2001
From: Vikram Krishna <vkrishna@hmc.edu>
Date: Thu, 14 Nov 2024 03:54:32 -0800
Subject: [PATCH 3/3] added explanation

---
 src/fpu/fround.sv | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/fpu/fround.sv b/src/fpu/fround.sv
index 67a3b90f6..2814c766b 100644
--- a/src/fpu/fround.sv
+++ b/src/fpu/fround.sv
@@ -146,7 +146,8 @@ module fround import cvw::*;  #(parameter cvw_t P) (
   packoutput #(P) packoutput(W, Fmt, FRound); // pack and NaN-box based on selected format.
 
   // Flags
-  assign FRoundNV = XSNaN;                               // invalid if input is signaling NaN
+  assign FRoundNV = XSNaN;                                       // invalid if input is signaling NaN
   assign FRoundNX = ZfaFRoundNX & ~EgeNf & (Rp | Tp) & ~XNaN;    // Inexact if Round or Sticky bit set for FRoundNX instruction
+                                                                 // Note: NX must not be raised if input is invalid
 
 endmodule