From 6647cf65820cd57f1cc41c3885832e17326850a2 Mon Sep 17 00:00:00 2001 From: James Stine Date: Thu, 23 Feb 2023 07:52:40 -0600 Subject: [PATCH] Slight tweak to .synopsys for OSU setup --- synthDC/.synopsys_dc.setup | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/synthDC/.synopsys_dc.setup b/synthDC/.synopsys_dc.setup index 5c6b7f6b9..e4de11db6 100755 --- a/synthDC/.synopsys_dc.setup +++ b/synthDC/.synopsys_dc.setup @@ -24,6 +24,7 @@ if {$tech == "sky130"} { lappend search_path $s10lib } elseif {$tech == "tsmc28psyn"} { set TLU /home/jstine/TLU+ + set OSUTLU /import/yukari1/pdk/TSMC/TLU+ set pdk /proj/models/tsmc28/libraries/28nmtsmc/tcbn28hpcplusbwp30p140_190a/ set osupdk /import/yukari1/pdk/TSMC/28/CMOS/HPC+/stclib/9-track/tcbn28hpcplusbwp30p140-set/tcbn28hpcplusbwp30p140_190a_FE/ set s10lib $pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp30p140_180a @@ -32,7 +33,9 @@ if {$tech == "sky130"} { set mw_logic1_net VDD set mw_logic0_net VSS set CAPTABLE $TLU/1p8m/ - set MW_REFERENCE_LIBRARY /home/jstine/MW + set MW /home/jstine/MW + set OSUMW /import/yukari1/pdk/TSMC/MW + set MW_REFERENCE_LIBRARY $MW set MW_TECH_FILE tcbn28hpcplusbwp30p140 set MIN_TLU_FILE $CAPTABLE/crn28hpc+_1p08m+ut-alrdl_5x1z1u_rcbest.tluplus set MAX_TLU_FILE $CAPTABLE/crn28hpc+_1p08m+ut-alrdl_5x1z1u_rcworst.tluplus