From 653c4582419ab81aa2335588196cd0cbf1a72866 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Tue, 20 Sep 2022 04:12:05 -0700
Subject: [PATCH] Moved fpu modules into subdirectories

---
 pipelined/regression/testfloat.do                    | 2 +-
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrt.sv         | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtfgen2.sv    | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtfgen4.sv    | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtfsm.sv      | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtiter.sv     | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtpostproc.sv | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtpreproc.sv  | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtqsel2.sv    | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtqsel4.sv    | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtstage2.sv   | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtstage4.sv   | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtuotfc2.sv   | 0
 pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtuotfc4.sv   | 0
 pipelined/src/fpu/{ => fma}/fma.sv                   | 0
 pipelined/src/fpu/{ => fma}/fmaadd.sv                | 0
 pipelined/src/fpu/{ => fma}/fmaalign.sv              | 0
 pipelined/src/fpu/{ => fma}/fmaexpadd.sv             | 0
 pipelined/src/fpu/{ => fma}/fmalza.sv                | 0
 pipelined/src/fpu/{ => fma}/fmamult.sv               | 0
 pipelined/src/fpu/{ => fma}/fmasign.sv               | 0
 pipelined/src/fpu/{ => postproc}/cvtshiftcalc.sv     | 0
 pipelined/src/fpu/{ => postproc}/divshiftcalc.sv     | 0
 pipelined/src/fpu/{ => postproc}/fmashiftcalc.sv     | 0
 pipelined/src/fpu/{ => postproc}/negateintres.sv     | 0
 pipelined/src/fpu/{ => postproc}/postprocess.sv      | 0
 pipelined/src/fpu/{ => postproc}/resultsign.sv       | 0
 pipelined/src/fpu/{ => postproc}/round.sv            | 0
 pipelined/src/fpu/{ => postproc}/roundsign.sv        | 0
 pipelined/src/fpu/{ => postproc}/shiftcorrection.sv  | 0
 pipelined/src/fpu/{ => postproc}/specialcase.sv      | 0
 31 files changed, 1 insertion(+), 1 deletion(-)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrt.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtfgen2.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtfgen4.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtfsm.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtiter.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtpostproc.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtpreproc.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtqsel2.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtqsel4.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtstage2.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtstage4.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtuotfc2.sv (100%)
 rename pipelined/src/fpu/{ => fdivsqrt}/fdivsqrtuotfc4.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fma.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fmaadd.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fmaalign.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fmaexpadd.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fmalza.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fmamult.sv (100%)
 rename pipelined/src/fpu/{ => fma}/fmasign.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/cvtshiftcalc.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/divshiftcalc.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/fmashiftcalc.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/negateintres.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/postprocess.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/resultsign.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/round.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/roundsign.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/shiftcorrection.sv (100%)
 rename pipelined/src/fpu/{ => postproc}/specialcase.sv (100%)

diff --git a/pipelined/regression/testfloat.do b/pipelined/regression/testfloat.do
index 00020f77f..9b2c2b16d 100644
--- a/pipelined/regression/testfloat.do
+++ b/pipelined/regression/testfloat.do
@@ -32,7 +32,7 @@ vlib work
 # start and run simulation
 # remove +acc flag for faster sim during regressions if there is no need to access internal signals
 # $num = the added words after the call
-vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/generic/*.sv  ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697 
+vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/fpu/*/*.sv ../src/generic/*.sv  ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697 
 
 vsim -voptargs=+acc work.testbenchfp -G TEST=$2
 
diff --git a/pipelined/src/fpu/fdivsqrt.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrt.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrt.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrt.sv
diff --git a/pipelined/src/fpu/fdivsqrtfgen2.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtfgen2.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtfgen2.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtfgen2.sv
diff --git a/pipelined/src/fpu/fdivsqrtfgen4.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtfgen4.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtfgen4.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtfgen4.sv
diff --git a/pipelined/src/fpu/fdivsqrtfsm.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtfsm.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv
diff --git a/pipelined/src/fpu/fdivsqrtiter.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtiter.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtiter.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtiter.sv
diff --git a/pipelined/src/fpu/fdivsqrtpostproc.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtpostproc.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
diff --git a/pipelined/src/fpu/fdivsqrtpreproc.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtpreproc.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtpreproc.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtpreproc.sv
diff --git a/pipelined/src/fpu/fdivsqrtqsel2.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtqsel2.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtqsel2.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtqsel2.sv
diff --git a/pipelined/src/fpu/fdivsqrtqsel4.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtqsel4.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtqsel4.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtqsel4.sv
diff --git a/pipelined/src/fpu/fdivsqrtstage2.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtstage2.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtstage2.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtstage2.sv
diff --git a/pipelined/src/fpu/fdivsqrtstage4.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtstage4.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtstage4.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtstage4.sv
diff --git a/pipelined/src/fpu/fdivsqrtuotfc2.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc2.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtuotfc2.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc2.sv
diff --git a/pipelined/src/fpu/fdivsqrtuotfc4.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc4.sv
similarity index 100%
rename from pipelined/src/fpu/fdivsqrtuotfc4.sv
rename to pipelined/src/fpu/fdivsqrt/fdivsqrtuotfc4.sv
diff --git a/pipelined/src/fpu/fma.sv b/pipelined/src/fpu/fma/fma.sv
similarity index 100%
rename from pipelined/src/fpu/fma.sv
rename to pipelined/src/fpu/fma/fma.sv
diff --git a/pipelined/src/fpu/fmaadd.sv b/pipelined/src/fpu/fma/fmaadd.sv
similarity index 100%
rename from pipelined/src/fpu/fmaadd.sv
rename to pipelined/src/fpu/fma/fmaadd.sv
diff --git a/pipelined/src/fpu/fmaalign.sv b/pipelined/src/fpu/fma/fmaalign.sv
similarity index 100%
rename from pipelined/src/fpu/fmaalign.sv
rename to pipelined/src/fpu/fma/fmaalign.sv
diff --git a/pipelined/src/fpu/fmaexpadd.sv b/pipelined/src/fpu/fma/fmaexpadd.sv
similarity index 100%
rename from pipelined/src/fpu/fmaexpadd.sv
rename to pipelined/src/fpu/fma/fmaexpadd.sv
diff --git a/pipelined/src/fpu/fmalza.sv b/pipelined/src/fpu/fma/fmalza.sv
similarity index 100%
rename from pipelined/src/fpu/fmalza.sv
rename to pipelined/src/fpu/fma/fmalza.sv
diff --git a/pipelined/src/fpu/fmamult.sv b/pipelined/src/fpu/fma/fmamult.sv
similarity index 100%
rename from pipelined/src/fpu/fmamult.sv
rename to pipelined/src/fpu/fma/fmamult.sv
diff --git a/pipelined/src/fpu/fmasign.sv b/pipelined/src/fpu/fma/fmasign.sv
similarity index 100%
rename from pipelined/src/fpu/fmasign.sv
rename to pipelined/src/fpu/fma/fmasign.sv
diff --git a/pipelined/src/fpu/cvtshiftcalc.sv b/pipelined/src/fpu/postproc/cvtshiftcalc.sv
similarity index 100%
rename from pipelined/src/fpu/cvtshiftcalc.sv
rename to pipelined/src/fpu/postproc/cvtshiftcalc.sv
diff --git a/pipelined/src/fpu/divshiftcalc.sv b/pipelined/src/fpu/postproc/divshiftcalc.sv
similarity index 100%
rename from pipelined/src/fpu/divshiftcalc.sv
rename to pipelined/src/fpu/postproc/divshiftcalc.sv
diff --git a/pipelined/src/fpu/fmashiftcalc.sv b/pipelined/src/fpu/postproc/fmashiftcalc.sv
similarity index 100%
rename from pipelined/src/fpu/fmashiftcalc.sv
rename to pipelined/src/fpu/postproc/fmashiftcalc.sv
diff --git a/pipelined/src/fpu/negateintres.sv b/pipelined/src/fpu/postproc/negateintres.sv
similarity index 100%
rename from pipelined/src/fpu/negateintres.sv
rename to pipelined/src/fpu/postproc/negateintres.sv
diff --git a/pipelined/src/fpu/postprocess.sv b/pipelined/src/fpu/postproc/postprocess.sv
similarity index 100%
rename from pipelined/src/fpu/postprocess.sv
rename to pipelined/src/fpu/postproc/postprocess.sv
diff --git a/pipelined/src/fpu/resultsign.sv b/pipelined/src/fpu/postproc/resultsign.sv
similarity index 100%
rename from pipelined/src/fpu/resultsign.sv
rename to pipelined/src/fpu/postproc/resultsign.sv
diff --git a/pipelined/src/fpu/round.sv b/pipelined/src/fpu/postproc/round.sv
similarity index 100%
rename from pipelined/src/fpu/round.sv
rename to pipelined/src/fpu/postproc/round.sv
diff --git a/pipelined/src/fpu/roundsign.sv b/pipelined/src/fpu/postproc/roundsign.sv
similarity index 100%
rename from pipelined/src/fpu/roundsign.sv
rename to pipelined/src/fpu/postproc/roundsign.sv
diff --git a/pipelined/src/fpu/shiftcorrection.sv b/pipelined/src/fpu/postproc/shiftcorrection.sv
similarity index 100%
rename from pipelined/src/fpu/shiftcorrection.sv
rename to pipelined/src/fpu/postproc/shiftcorrection.sv
diff --git a/pipelined/src/fpu/specialcase.sv b/pipelined/src/fpu/postproc/specialcase.sv
similarity index 100%
rename from pipelined/src/fpu/specialcase.sv
rename to pipelined/src/fpu/postproc/specialcase.sv