Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'main' of github.com:ross144/cvw

Browse Source
This commit is contained in:
Rose Thompson 2023-11-14 13:54:48 -06:00
commit 65356e362a
3 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
config/rv32gc/config.vh
View File

@ -45,7 +45,7 @@ localparam ZFH_SUPPORTED = 0;
localparam SSTC_SUPPORTED = 1;
localparam ZICBOM_SUPPORTED = 1;
localparam ZICBOZ_SUPPORTED = 1;
localparam ZICBOP_SUPPORTED = 0;
localparam ZICBOP_SUPPORTED = 1;
localparam ZICCLSM_SUPPORTED = 0;
localparam SVPBMT_SUPPORTED = 0;
localparam SVNAPOT_SUPPORTED = 0;

2
sim/lint-wally
View File

@ -5,7 +5,7 @@ export PATH=$PATH:/usr/local/bin/
verilator=`which verilator`
basepath=$(dirname $0)/..
for config in fpga rv32e rv64gc rv32gc rv32imc rv32i rv64i rv64fpquad; do
for config in rv32e rv64gc rv32gc rv32imc rv32i rv64i rv64fpquad; do
#for config in rv64gc; do
echo "$config linting..."
if !($verilator --no-timing --lint-only "$@" --top-module wallywrapper "-I$basepath/config/shared" "-I$basepath/config/$config" $basepath/src/cvw.sv $basepath/testbench/wallywrapper.sv $basepath/src/*/*.sv $basepath/src/*/*/*.sv --relative-includes ); then

2
testbench/testbench-imperas.sv
View File

@ -237,7 +237,7 @@ module testbench;
assign HRDATAEXT = 0;
end
if(P.FPGA) begin : sdcard
if(P.SDC_SUPPORTED) begin : sdcard
// *** fix later
/* -----\/----- EXCLUDED -----\/-----
sdModel sdcard