From 60931e7d5ccb2a0c3a86cd44908a45ad1c42f823 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sat, 17 Jun 2023 20:38:51 -0700 Subject: [PATCH] Fixed embench to run all tests, even ones not in 1.0 --- benchmarks/embench/Makefile | 8 ++++++++ testbench/tests.vh | 16 ++++++++-------- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/benchmarks/embench/Makefile b/benchmarks/embench/Makefile index 538fb64f9..3dba4daaa 100644 --- a/benchmarks/embench/Makefile +++ b/benchmarks/embench/Makefile @@ -16,10 +16,18 @@ buildsize: build_speedopt_size build_sizeopt_size # uses the build_all.py python file to build the tests in addins/embench-iot/bd_speed/ optimized for speed and size build_speedopt_speed: $(embench_dir)/build_all.py --builddir=bd_speedopt_speed --arch riscv32 --chip generic --board rv32wallyverilog --ldflags="-nostartfiles ../../../config/riscv32/boards/rv32wallyverilog/startup/crt0.S" --cflags="-O2 -nostartfiles" + # remove files not used in embench1.0 When changing to 2.0, restore these files + #rm -rf $(embench_dir)/bd_speedopt_speed/src/md5sum + #rm -rf $(embench_dir)/bd_speedopt_speed/src/tarfind + #rm -rf $(embench_dir)/bd_speedopt_speed/src/primecount find $(embench_dir)/bd_speedopt_speed/ -type f ! -name "*.*" | while read f; do cp "$$f" "$$f.elf"; done build_sizeopt_speed: $(embench_dir)/build_all.py --builddir=bd_sizeopt_speed --arch riscv32 --chip generic --board rv32wallyverilog --ldflags="-nostartfiles ../../../config/riscv32/boards/rv32wallyverilog/startup/crt0.S" --cflags="-Os -nostartfiles" + # remove files not used in embench1.0 When changing to 2.0, restore these files + #rm -rf $(embench_dir)/bd_sizeopt_speed/src/md5sum + #rm -rf $(embench_dir)/bd_sizeopt_speed/src/tarfind + #rm -rf $(embench_dir)/bd_sizeopt_speed/src/primecount find $(embench_dir)/bd_sizeopt_speed/ -type f ! -name "*.*" | while read f; do cp "$$f" "$$f.elf"; done # uses the build_all.py python file to build the tests in addins/embench-iot/bd_speed/ optimized for speed and size diff --git a/testbench/tests.vh b/testbench/tests.vh index 38f5bc2d8..f38f28056 100644 --- a/testbench/tests.vh +++ b/testbench/tests.vh @@ -75,26 +75,26 @@ string tvpaths[] = '{ string embench[] = '{ `EMBENCH, - "bd_speedopt_speed/src/nsichneu/nsichneu", - "bd_speedopt_speed/src/cubic/cubic", // cubic is likely going to removed when embench 2.0 launches "bd_speedopt_speed/src/aha-mont64/aha-mont64", "bd_speedopt_speed/src/crc32/crc32", + "bd_speedopt_speed/src/cubic/cubic", // cubic is likely going to removed when embench 2.0 launches "bd_speedopt_speed/src/edn/edn", "bd_speedopt_speed/src/huffbench/huffbench", "bd_speedopt_speed/src/matmult-int/matmult-int", - // "bd_speedopt_speed/src/md5sum/md5sum", //commenting out tests from embench 2.0. When embench 2.0 launches stabilty, add these tests back + "bd_speedopt_speed/src/md5sum/md5sum", //commenting out tests from embench 2.0. When embench 2.0 launches stabilty, add these tests back "bd_speedopt_speed/src/minver/minver", "bd_speedopt_speed/src/nettle-aes/nettle-aes", "bd_speedopt_speed/src/nettle-sha256/nettle-sha256", + "bd_speedopt_speed/src/nsichneu/nsichneu", "bd_speedopt_speed/src/nbody/nbody", "bd_speedopt_speed/src/picojpeg/picojpeg", - // "bd_speedopt_speed/src/primecount/primecount", + "bd_speedopt_speed/src/primecount/primecount", "bd_speedopt_speed/src/qrduino/qrduino", "bd_speedopt_speed/src/sglib-combined/sglib-combined", "bd_speedopt_speed/src/slre/slre", "bd_speedopt_speed/src/st/st", "bd_speedopt_speed/src/statemate/statemate", - // "bd_speedopt_speed/src/tarfind/tarfind", + "bd_speedopt_speed/src/tarfind/tarfind", "bd_speedopt_speed/src/ud/ud", "bd_speedopt_speed/src/wikisort/wikisort", "bd_sizeopt_speed/src/aha-mont64/aha-mont64", @@ -103,20 +103,20 @@ string tvpaths[] = '{ "bd_sizeopt_speed/src/edn/edn", "bd_sizeopt_speed/src/huffbench/huffbench", "bd_sizeopt_speed/src/matmult-int/matmult-int", - // "bd_sizeopt_speed/src/md5sum/md5sum", + "bd_sizeopt_speed/src/md5sum/md5sum", "bd_sizeopt_speed/src/minver/minver", "bd_sizeopt_speed/src/nbody/nbody", "bd_sizeopt_speed/src/nettle-aes/nettle-aes", "bd_sizeopt_speed/src/nettle-sha256/nettle-sha256", "bd_sizeopt_speed/src/nsichneu/nsichneu", "bd_sizeopt_speed/src/picojpeg/picojpeg", - // "bd_sizeopt_speed/src/primecount/primecount", + "bd_sizeopt_speed/src/primecount/primecount", "bd_sizeopt_speed/src/qrduino/qrduino", "bd_sizeopt_speed/src/sglib-combined/sglib-combined", "bd_sizeopt_speed/src/slre/slre", "bd_sizeopt_speed/src/st/st", "bd_sizeopt_speed/src/statemate/statemate", - // "bd_sizeopt_speed/src/tarfind/tarfind", + "bd_sizeopt_speed/src/tarfind/tarfind", "bd_sizeopt_speed/src/ud/ud", "bd_sizeopt_speed/src/wikisort/wikisort" };