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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main

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This commit is contained in:
David Harris 2022-01-27 14:33:35 +00:00
commit 5eccbcf531
22 changed files with 1571 additions and 25 deletions
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21
pipelined/regression/regression-wally
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@ -12,6 +12,17 @@
################################## ##################################
import sys,os import sys,os
class bcolors:
HEADER = '\033[95m'
OKBLUE = '\033[94m'
OKCYAN = '\033[96m'
OKGREEN = '\033[92m'
WARNING = '\033[93m'
FAIL = '\033[91m'
ENDC = '\033[0m'
BOLD = '\033[1m'
UNDERLINE = '\033[4m'
from collections import namedtuple from collections import namedtuple
regressionDir = os.path.dirname(os.path.abspath(__file__)) regressionDir = os.path.dirname(os.path.abspath(__file__))
os.chdir(regressionDir) os.chdir(regressionDir)
@ -103,10 +114,10 @@ def run_test_case(config):
os.chdir(regressionDir) os.chdir(regressionDir)
os.system(cmd) os.system(cmd)
if search_log_for_text(config.grepstr, logname): if search_log_for_text(config.grepstr, logname):
print("%s_%s: Success" % (config.variant, config.name)) print(f"{bcolors.OKGREEN}%s_%s: Success{bcolors.ENDC}" % (config.variant, config.name))
return 0 return 0
else: else:
print("%s_%s: Failures detected in output" % (config.variant, config.name)) print(f"{bcolors.FAIL}%s_%s: Failures detected in output{bcolors.ENDC}" % (config.variant, config.name))
print(" Check %s" % logname) print(" Check %s" % logname)
return 1 return 1
@ -145,16 +156,16 @@ def main():
num_fail+=result.get(timeout=TIMEOUT_DUR) num_fail+=result.get(timeout=TIMEOUT_DUR)
except TimeoutError: except TimeoutError:
num_fail+=1 num_fail+=1
print("%s_%s: Timeout - runtime exceeded %d seconds" % (config.variant, config.name, TIMEOUT_DUR)) print(f"{bcolors.FAIL}%s_%s: Timeout - runtime exceeded %d seconds{bcolors.ENDC}" % (config.variant, config.name, TIMEOUT_DUR))
# Count the number of failures # Count the number of failures
if num_fail: if num_fail:
print("Regression failed with %s failed configurations" % num_fail) print(f"{bcolors.FAIL}Regression failed with %s failed configurations{bcolors.ENDC}" % num_fail)
# Remind the user to try `make allclean`, since it may be needed if test # Remind the user to try `make allclean`, since it may be needed if test
# cases have changed # cases have changed
print("Reminder: have you run `make allclean`?") print("Reminder: have you run `make allclean`?")
else: else:
print("SUCCESS! All tests ran without failures") print(f"{bcolors.OKGREEN}SUCCESS! All tests ran without failures{bcolors.ENDC}")
return num_fail return num_fail
if __name__ == '__main__': if __name__ == '__main__':

35
pipelined/src/ifu/ifu.sv
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@ -96,7 +96,6 @@ module ifu (
logic [`XLEN-1:0] PCD; logic [`XLEN-1:0] PCD;
localparam [31:0] nop = 32'h00000013; // instruction for NOP localparam [31:0] nop = 32'h00000013; // instruction for NOP
logic reset_q; // see comment below about PCNextF and icache.
logic [`XLEN-1:0] PCBPWrongInvalidate; logic [`XLEN-1:0] PCBPWrongInvalidate;
logic BPPredWrongM; logic BPPredWrongM;
@ -106,8 +105,8 @@ module ifu (
logic [`XLEN+1:0] PCFExt; logic [`XLEN+1:0] PCFExt;
logic CacheableF; logic CacheableF;
logic [`XLEN-1:0] PCNextFMux; logic [`XLEN-1:0] PCNextFSpill;
logic [`XLEN-1:0] PCFMux; logic [`XLEN-1:0] PCFSpill;
logic SelNextSpill; logic SelNextSpill;
logic ICacheFetchLine; logic ICacheFetchLine;
logic BusStall; logic BusStall;
@ -127,8 +126,8 @@ module ifu (
// this exists only if there are compressed instructions. // this exists only if there are compressed instructions.
assign PCFp2 = PCF + `XLEN'b10; assign PCFp2 = PCF + `XLEN'b10;
assign PCNextFMux = SelNextSpill ? PCFp2 : PCNextF; assign PCNextFSpill = SelNextSpill ? PCFp2 : PCNextF;
assign PCFMux = SelSpill ? PCFp2 : PCF; assign PCFSpill = SelSpill ? PCFp2 : PCF;
assign Spill = &PCF[$clog2(SPILLTHRESHOLD)+1:1]; assign Spill = &PCF[$clog2(SPILLTHRESHOLD)+1:1];
@ -167,18 +166,18 @@ module ifu (
// end of spill support // end of spill support
end else begin : NoSpillSupport // line: SpillSupport end else begin : NoSpillSupport // line: SpillSupport
assign PCNextFMux = PCNextF; assign PCNextFSpill = PCNextF;
assign PCFMux = PCF; assign PCFSpill = PCF;
assign SelNextSpill = 0; assign SelNextSpill = 0;
assign PostSpillInstrRawF = InstrRawF; assign PostSpillInstrRawF = InstrRawF;
end end
assign PCFExt = {2'b00, PCFMux}; assign PCFExt = {2'b00, PCFSpill};
mmu #(.TLB_ENTRIES(`ITLB_ENTRIES), .IMMU(1)) mmu #(.TLB_ENTRIES(`ITLB_ENTRIES), .IMMU(1))
immu(.PAdr(PCFExt[`PA_BITS-1:0]), immu(.PAdr(PCFExt[`PA_BITS-1:0]),
.VAdr(PCFMux), .VAdr(PCFSpill),
.Size(2'b10), .Size(2'b10),
.PTE(PTE), .PTE(PTE),
.PageTypeWriteVal(PageType), .PageTypeWriteVal(PageType),
@ -235,7 +234,7 @@ module ifu (
simpleram #( simpleram #(
.BASE(`RAM_BASE), .RANGE(`RAM_RANGE)) ram ( .BASE(`RAM_BASE), .RANGE(`RAM_RANGE)) ram (
.clk, .clk,
.a(CPUBusy | reset ? PCPF[31:0] : PCNextFMux[31:0]), // mux is also inside $, have to replay address if CPU is stalled. .a(CPUBusy | reset ? PCPF[31:0] : PCNextFSpill[31:0]), // mux is also inside $, have to replay address if CPU is stalled.
.we(1'b0), .we(1'b0),
.wd(0), .rd(FinalInstrRawF_FIXME)); .wd(0), .rd(FinalInstrRawF_FIXME));
assign FinalInstrRawF = FinalInstrRawF_FIXME[31:0]; assign FinalInstrRawF = FinalInstrRawF_FIXME[31:0];
@ -286,7 +285,7 @@ module ifu (
.RW(IFURWF), .RW(IFURWF),
.Atomic(2'b00), .Atomic(2'b00),
.FlushCache(1'b0), .FlushCache(1'b0),
.NextAdr(PCNextFMux[11:0]), .NextAdr(PCNextFSpill[11:0]),
.PAdr(PCPF), .PAdr(PCPF),
.CacheCommitted(), .CacheCommitted(),
.InvalidateCacheM(InvalidateICacheM)); .InvalidateCacheM(InvalidateICacheM));
@ -303,7 +302,7 @@ module ifu (
// branch predictor signal // branch predictor signal
logic SelBPPredF; logic SelBPPredF;
logic [`XLEN-1:0] BPPredPCF, PCNext0F, PCNext1F, PCNext2F, PCNext3F; logic [`XLEN-1:0] BPPredPCF, PCNext0F, PCNext1F, PCNext2F;
logic [4:0] InstrClassD, InstrClassE; logic [4:0] InstrClassD, InstrClassE;
@ -333,16 +332,9 @@ module ifu (
mux2 #(`XLEN) pcmux2(.d0(PCNext1F), .d1(PCBPWrongInvalidate), .s(InvalidateICacheM), .y(PCNext2F)); mux2 #(`XLEN) pcmux2(.d0(PCNext1F), .d1(PCBPWrongInvalidate), .s(InvalidateICacheM), .y(PCNext2F));
// Mux only required on instruction class miss prediction. // Mux only required on instruction class miss prediction.
mux2 #(`XLEN) pcmuxBPWrongInvalidateFlush(.d0(PCE), .d1(PCF), .s(BPPredWrongM), .y(PCBPWrongInvalidate)); mux2 #(`XLEN) pcmuxBPWrongInvalidateFlush(.d0(PCE), .d1(PCF), .s(BPPredWrongM), .y(PCBPWrongInvalidate));
mux2 #(`XLEN) pcmux3(.d0(PCNext2F), .d1(PrivilegedNextPCM), .s(PrivilegedChangePCM), .y(PCNext3F)); mux2 #(`XLEN) pcmux3(.d0(PCNext2F), .d1(PrivilegedNextPCM), .s(PrivilegedChangePCM), .y(UnalignedPCNextF));
// This mux is required as PCNextF needs to be the valid reset vector during reset.
// Reseting PCF does not accomplish this as PCNextF will be +2/4 more than PCF.
//mux2 #(`XLEN) pcmux4(.d0(PCNext3F), .d1(`RESET_VECTOR), .s(`MEM_IROM ? reset : reset_q), .y(UnalignedPCNextF));
// mux2 #(`XLEN) pcmux4(.d0(PCNext3F), .d1(`RESET_VECTOR), .s(reset), .y(UnalignedPCNextF)); // ******* probably can get rid of by making reset SelAdr = 01
assign UnalignedPCNextF = PCNext3F;
flopenrc #(1) BPPredWrongMReg(.clk, .reset, .en(~StallM), .clear(FlushM), .d(BPPredWrongE), .q(BPPredWrongM));
assign PCNextF = {UnalignedPCNextF[`XLEN-1:1], 1'b0}; // hart-SPEC p. 21 about 16-bit alignment assign PCNextF = {UnalignedPCNextF[`XLEN-1:1], 1'b0}; // hart-SPEC p. 21 about 16-bit alignment
flopenl #(`XLEN) pcreg(clk, reset, ~StallF, PCNextF, `RESET_VECTOR, PCF); flopenl #(`XLEN) pcreg(clk, reset, ~StallF, PCNextF, `RESET_VECTOR, PCF);
@ -351,6 +343,8 @@ module ifu (
if (`BPRED_ENABLED) begin : bpred if (`BPRED_ENABLED) begin : bpred
logic BPPredDirWrongE, BTBPredPCWrongE, RASPredPCWrongE, BPPredClassNonCFIWrongE; logic BPPredDirWrongE, BTBPredPCWrongE, RASPredPCWrongE, BPPredClassNonCFIWrongE;
flopenrc #(1) BPPredWrongMReg(.clk, .reset, .en(~StallM), .clear(FlushM), .d(BPPredWrongE), .q(BPPredWrongM));
bpred bpred(.clk, .reset, bpred bpred(.clk, .reset,
.StallF, .StallD, .StallE, .StallF, .StallD, .StallE,
.FlushF, .FlushD, .FlushE, .FlushF, .FlushD, .FlushE,
@ -376,6 +370,7 @@ module ifu (
end else begin : bpred end else begin : bpred
assign BPPredPCF = '0; assign BPPredPCF = '0;
assign BPPredWrongE = PCSrcE; assign BPPredWrongE = PCSrcE;
assign BPPredWrongM = '0;
assign {SelBPPredF, BPPredDirWrongM, BTBPredPCWrongM, RASPredPCWrongM, BPPredClassNonCFIWrongM} = '0; assign {SelBPPredF, BPPredDirWrongM, BTBPredPCWrongM, RASPredPCWrongM, BPPredClassNonCFIWrongM} = '0;
end end

12
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/references/WALLY-ADD.reference_output Normal file
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@ -0,0 +1,12 @@
00000000
00000001
ffffffff
00000001
00000002
00000000
ffffffff
00000000
fffffffe
b6944260
83edeb47
0c939c34

12
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/references/WALLY-SLT.reference_output Normal file
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@ -0,0 +1,12 @@
00000000
00000001
00000000
00000000
00000000
00000000
00000001
00000001
00000000
00000000
00000001
00000001

12
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/references/WALLY-SLTU.reference_output Normal file
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@ -0,0 +1,12 @@
00000000
00000001
00000001
00000000
00000000
00000001
00000000
00000000
00000000
00000001
00000001
00000000

12
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/references/WALLY-SUB.reference_output Normal file
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@ -0,0 +1,12 @@
00000000
ffffffff
00000001
00000001
00000000
00000002
ffffffff
fffffffe
00000000
ebb7926c
e2aa20ca
63a59ba8

12
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/references/WALLY-XOR.reference_output Normal file
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@ -0,0 +1,12 @@
00000000
00000001
ffffffff
00000001
00000000
fffffffe
ffffffff
fffffffe
00000000
674f4c2c
d1bb1e6e
3395fef6

136
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-ADD.S Normal file
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@ -0,0 +1,136 @@
///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-ADD.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.392776//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x28(0x00000000), rs2:x13(0x00000000), result rd:x25(0x00000000)
li x28, MASK_XLEN(0x00000000)
li x13, MASK_XLEN(0x00000000)
ADD x25, x28, x13
sw x25, 0(x6)
# Testcase 1: rs1:x29(0x00000000), rs2:x14(0x00000001), result rd:x2(0x00000001)
li x29, MASK_XLEN(0x00000000)
li x14, MASK_XLEN(0x00000001)
ADD x2, x29, x14
sw x2, 4(x6)
# Testcase 2: rs1:x9(0x00000000), rs2:x31(0xffffffff), result rd:x17(0xffffffff)
li x9, MASK_XLEN(0x00000000)
li x31, MASK_XLEN(0xffffffff)
ADD x17, x9, x31
sw x17, 8(x6)
# Testcase 3: rs1:x16(0x00000001), rs2:x13(0x00000000), result rd:x30(0x00000001)
li x16, MASK_XLEN(0x00000001)
li x13, MASK_XLEN(0x00000000)
ADD x30, x16, x13
sw x30, 12(x6)
# Testcase 4: rs1:x26(0x00000001), rs2:x27(0x00000001), result rd:x10(0x00000002)
li x26, MASK_XLEN(0x00000001)
li x27, MASK_XLEN(0x00000001)
ADD x10, x26, x27
sw x10, 16(x6)
# Testcase 5: rs1:x31(0x00000001), rs2:x16(0xffffffff), result rd:x12(0x00000000)
li x31, MASK_XLEN(0x00000001)
li x16, MASK_XLEN(0xffffffff)
ADD x12, x31, x16
sw x12, 20(x6)
# Testcase 6: rs1:x19(0xffffffff), rs2:x29(0x00000000), result rd:x30(0xffffffff)
li x19, MASK_XLEN(0xffffffff)
li x29, MASK_XLEN(0x00000000)
ADD x30, x19, x29
sw x30, 24(x6)
# Testcase 7: rs1:x7(0xffffffff), rs2:x17(0x00000001), result rd:x5(0x00000000)
li x7, MASK_XLEN(0xffffffff)
li x17, MASK_XLEN(0x00000001)
ADD x5, x7, x17
sw x5, 28(x6)
# Testcase 8: rs1:x10(0xffffffff), rs2:x5(0xffffffff), result rd:x25(0xfffffffe)
li x10, MASK_XLEN(0xffffffff)
li x5, MASK_XLEN(0xffffffff)
ADD x25, x10, x5
sw x25, 32(x6)
# Testcase 9: rs1:x26(0x1846d424), rs2:x9(0x9e4d6e3c), result rd:x30(0xb6944260)
li x26, MASK_XLEN(0x1846d424)
li x9, MASK_XLEN(0x9e4d6e3c)
ADD x30, x26, x9
sw x30, 36(x6)
# Testcase 10: rs1:x23(0x88561712), rs2:x26(0xfb97d435), result rd:x20(0x83edeb47)
li x23, MASK_XLEN(0x88561712)
li x26, MASK_XLEN(0xfb97d435)
ADD x20, x23, x26
sw x20, 40(x6)
# Testcase 11: rs1:x10(0xe6f4590b), rs2:x4(0x259f4329), result rd:x24(0x0c939c34)
li x10, MASK_XLEN(0xe6f4590b)
li x4, MASK_XLEN(0x259f4329)
ADD x24, x10, x4
sw x24, 44(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-ADD.S
// David_Harris@hmc.edu & Katherine Parry

136
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLT.S Normal file
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@ -0,0 +1,136 @@
///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLT.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.393471//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x11(0x00000000), rs2:x8(0x00000000), result rd:x24(0x00000000)
li x11, MASK_XLEN(0x00000000)
li x8, MASK_XLEN(0x00000000)
SLT x24, x11, x8
sw x24, 0(x6)
# Testcase 1: rs1:x11(0x00000000), rs2:x23(0x00000001), result rd:x28(0x00000001)
li x11, MASK_XLEN(0x00000000)
li x23, MASK_XLEN(0x00000001)
SLT x28, x11, x23
sw x28, 4(x6)
# Testcase 2: rs1:x3(0x00000000), rs2:x7(0xffffffff), result rd:x30(0x00000000)
li x3, MASK_XLEN(0x00000000)
li x7, MASK_XLEN(0xffffffff)
SLT x30, x3, x7
sw x30, 8(x6)
# Testcase 3: rs1:x19(0x00000001), rs2:x8(0x00000000), result rd:x8(0x00000000)
li x19, MASK_XLEN(0x00000001)
li x8, MASK_XLEN(0x00000000)
SLT x8, x19, x8
sw x8, 12(x6)
# Testcase 4: rs1:x26(0x00000001), rs2:x31(0x00000001), result rd:x5(0x00000000)
li x26, MASK_XLEN(0x00000001)
li x31, MASK_XLEN(0x00000001)
SLT x5, x26, x31
sw x5, 16(x6)
# Testcase 5: rs1:x26(0x00000001), rs2:x18(0xffffffff), result rd:x15(0x00000000)
li x26, MASK_XLEN(0x00000001)
li x18, MASK_XLEN(0xffffffff)
SLT x15, x26, x18
sw x15, 20(x6)
# Testcase 6: rs1:x29(0xffffffff), rs2:x17(0x00000000), result rd:x30(0x00000001)
li x29, MASK_XLEN(0xffffffff)
li x17, MASK_XLEN(0x00000000)
SLT x30, x29, x17
sw x30, 24(x6)
# Testcase 7: rs1:x16(0xffffffff), rs2:x4(0x00000001), result rd:x10(0x00000001)
li x16, MASK_XLEN(0xffffffff)
li x4, MASK_XLEN(0x00000001)
SLT x10, x16, x4
sw x10, 28(x6)
# Testcase 8: rs1:x18(0xffffffff), rs2:x10(0xffffffff), result rd:x23(0x00000000)
li x18, MASK_XLEN(0xffffffff)
li x10, MASK_XLEN(0xffffffff)
SLT x23, x18, x10
sw x23, 32(x6)
# Testcase 9: rs1:x11(0x1ff39849), rs2:x27(0x8c25166a), result rd:x30(0x00000000)
li x11, MASK_XLEN(0x1ff39849)
li x27, MASK_XLEN(0x8c25166a)
SLT x30, x11, x27
sw x30, 36(x6)
# Testcase 10: rs1:x31(0x8a5006c1), rs2:x26(0x3405095c), result rd:x20(0x00000001)
li x31, MASK_XLEN(0x8a5006c1)
li x26, MASK_XLEN(0x3405095c)
SLT x20, x31, x26
sw x20, 40(x6)
# Testcase 11: rs1:x10(0x8c1745a7), rs2:x15(0x966e1277), result rd:x3(0x00000001)
li x10, MASK_XLEN(0x8c1745a7)
li x15, MASK_XLEN(0x966e1277)
SLT x3, x10, x15
sw x3, 44(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLT.S
// David_Harris@hmc.edu & Katherine Parry

136
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLTU.S Normal file
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@ -0,0 +1,136 @@
///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLTU.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.393741//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x20(0x00000000), rs2:x26(0x00000000), result rd:x13(0x00000000)
li x20, MASK_XLEN(0x00000000)
li x26, MASK_XLEN(0x00000000)
SLTU x13, x20, x26
sw x13, 0(x6)
# Testcase 1: rs1:x11(0x00000000), rs2:x19(0x00000001), result rd:x8(0x00000001)
li x11, MASK_XLEN(0x00000000)
li x19, MASK_XLEN(0x00000001)
SLTU x8, x11, x19
sw x8, 4(x6)
# Testcase 2: rs1:x20(0x00000000), rs2:x22(0xffffffff), result rd:x9(0x00000001)
li x20, MASK_XLEN(0x00000000)
li x22, MASK_XLEN(0xffffffff)
SLTU x9, x20, x22
sw x9, 8(x6)
# Testcase 3: rs1:x16(0x00000001), rs2:x3(0x00000000), result rd:x3(0x00000000)
li x16, MASK_XLEN(0x00000001)
li x3, MASK_XLEN(0x00000000)
SLTU x3, x16, x3
sw x3, 12(x6)
# Testcase 4: rs1:x22(0x00000001), rs2:x25(0x00000001), result rd:x5(0x00000000)
li x22, MASK_XLEN(0x00000001)
li x25, MASK_XLEN(0x00000001)
SLTU x5, x22, x25
sw x5, 16(x6)
# Testcase 5: rs1:x29(0x00000001), rs2:x5(0xffffffff), result rd:x30(0x00000001)
li x29, MASK_XLEN(0x00000001)
li x5, MASK_XLEN(0xffffffff)
SLTU x30, x29, x5
sw x30, 20(x6)
# Testcase 6: rs1:x2(0xffffffff), rs2:x27(0x00000000), result rd:x3(0x00000000)
li x2, MASK_XLEN(0xffffffff)
li x27, MASK_XLEN(0x00000000)
SLTU x3, x2, x27
sw x3, 24(x6)
# Testcase 7: rs1:x29(0xffffffff), rs2:x23(0x00000001), result rd:x30(0x00000000)
li x29, MASK_XLEN(0xffffffff)
li x23, MASK_XLEN(0x00000001)
SLTU x30, x29, x23
sw x30, 28(x6)
# Testcase 8: rs1:x27(0xffffffff), rs2:x18(0xffffffff), result rd:x22(0x00000000)
li x27, MASK_XLEN(0xffffffff)
li x18, MASK_XLEN(0xffffffff)
SLTU x22, x27, x18
sw x22, 32(x6)
# Testcase 9: rs1:x23(0x642bfa42), rs2:x17(0xd67e55fd), result rd:x9(0x00000001)
li x23, MASK_XLEN(0x642bfa42)
li x17, MASK_XLEN(0xd67e55fd)
SLTU x9, x23, x17
sw x9, 36(x6)
# Testcase 10: rs1:x8(0x85940927), rs2:x28(0xcfc6e625), result rd:x7(0x00000001)
li x8, MASK_XLEN(0x85940927)
li x28, MASK_XLEN(0xcfc6e625)
SLTU x7, x8, x28
sw x7, 40(x6)
# Testcase 11: rs1:x19(0xe5214606), rs2:x27(0xadf20806), result rd:x31(0x00000000)
li x19, MASK_XLEN(0xe5214606)
li x27, MASK_XLEN(0xadf20806)
SLTU x31, x19, x27
sw x31, 44(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLTU.S
// David_Harris@hmc.edu & Katherine Parry

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SUB.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.393180//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x3(0x00000000), rs2:x29(0x00000000), result rd:x28(0x00000000)
li x3, MASK_XLEN(0x00000000)
li x29, MASK_XLEN(0x00000000)
SUB x28, x3, x29
sw x28, 0(x6)
# Testcase 1: rs1:x22(0x00000000), rs2:x11(0x00000001), result rd:x16(0xffffffff)
li x22, MASK_XLEN(0x00000000)
li x11, MASK_XLEN(0x00000001)
SUB x16, x22, x11
sw x16, 4(x6)
# Testcase 2: rs1:x18(0x00000000), rs2:x4(0xffffffff), result rd:x12(0x00000001)
li x18, MASK_XLEN(0x00000000)
li x4, MASK_XLEN(0xffffffff)
SUB x12, x18, x4
sw x12, 8(x6)
# Testcase 3: rs1:x14(0x00000001), rs2:x11(0x00000000), result rd:x20(0x00000001)
li x14, MASK_XLEN(0x00000001)
li x11, MASK_XLEN(0x00000000)
SUB x20, x14, x11
sw x20, 12(x6)
# Testcase 4: rs1:x21(0x00000001), rs2:x30(0x00000001), result rd:x7(0x00000000)
li x21, MASK_XLEN(0x00000001)
li x30, MASK_XLEN(0x00000001)
SUB x7, x21, x30
sw x7, 16(x6)
# Testcase 5: rs1:x31(0x00000001), rs2:x18(0xffffffff), result rd:x16(0x00000002)
li x31, MASK_XLEN(0x00000001)
li x18, MASK_XLEN(0xffffffff)
SUB x16, x31, x18
sw x16, 20(x6)
# Testcase 6: rs1:x15(0xffffffff), rs2:x28(0x00000000), result rd:x17(0xffffffff)
li x15, MASK_XLEN(0xffffffff)
li x28, MASK_XLEN(0x00000000)
SUB x17, x15, x28
sw x17, 24(x6)
# Testcase 7: rs1:x9(0xffffffff), rs2:x2(0x00000001), result rd:x26(0xfffffffe)
li x9, MASK_XLEN(0xffffffff)
li x2, MASK_XLEN(0x00000001)
SUB x26, x9, x2
sw x26, 28(x6)
# Testcase 8: rs1:x30(0xffffffff), rs2:x18(0xffffffff), result rd:x30(0x00000000)
li x30, MASK_XLEN(0xffffffff)
li x18, MASK_XLEN(0xffffffff)
SUB x30, x30, x18
sw x30, 32(x6)
# Testcase 9: rs1:x24(0x03983ca8), rs2:x27(0x17e0aa3c), result rd:x13(0xebb7926c)
li x24, MASK_XLEN(0x03983ca8)
li x27, MASK_XLEN(0x17e0aa3c)
SUB x13, x24, x27
sw x13, 36(x6)
# Testcase 10: rs1:x26(0xb5d32b16), rs2:x22(0xd3290a4c), result rd:x21(0xe2aa20ca)
li x26, MASK_XLEN(0xb5d32b16)
li x22, MASK_XLEN(0xd3290a4c)
SUB x21, x26, x22
sw x21, 40(x6)
# Testcase 11: rs1:x16(0x004ae545), rs2:x27(0x9ca5499d), result rd:x28(0x63a59ba8)
li x16, MASK_XLEN(0x004ae545)
li x27, MASK_XLEN(0x9ca5499d)
SUB x28, x16, x27
sw x28, 44(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SUB.S
// David_Harris@hmc.edu & Katherine Parry

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-XOR.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.394013//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x14(0x00000000), rs2:x19(0x00000000), result rd:x9(0x00000000)
li x14, MASK_XLEN(0x00000000)
li x19, MASK_XLEN(0x00000000)
XOR x9, x14, x19
sw x9, 0(x6)
# Testcase 1: rs1:x15(0x00000000), rs2:x16(0x00000001), result rd:x22(0x00000001)
li x15, MASK_XLEN(0x00000000)
li x16, MASK_XLEN(0x00000001)
XOR x22, x15, x16
sw x22, 4(x6)
# Testcase 2: rs1:x21(0x00000000), rs2:x23(0xffffffff), result rd:x30(0xffffffff)
li x21, MASK_XLEN(0x00000000)
li x23, MASK_XLEN(0xffffffff)
XOR x30, x21, x23
sw x30, 8(x6)
# Testcase 3: rs1:x26(0x00000001), rs2:x12(0x00000000), result rd:x3(0x00000001)
li x26, MASK_XLEN(0x00000001)
li x12, MASK_XLEN(0x00000000)
XOR x3, x26, x12
sw x3, 12(x6)
# Testcase 4: rs1:x11(0x00000001), rs2:x20(0x00000001), result rd:x4(0x00000000)
li x11, MASK_XLEN(0x00000001)
li x20, MASK_XLEN(0x00000001)
XOR x4, x11, x20
sw x4, 16(x6)
# Testcase 5: rs1:x16(0x00000001), rs2:x19(0xffffffff), result rd:x21(0xfffffffe)
li x16, MASK_XLEN(0x00000001)
li x19, MASK_XLEN(0xffffffff)
XOR x21, x16, x19
sw x21, 20(x6)
# Testcase 6: rs1:x11(0xffffffff), rs2:x28(0x00000000), result rd:x7(0xffffffff)
li x11, MASK_XLEN(0xffffffff)
li x28, MASK_XLEN(0x00000000)
XOR x7, x11, x28
sw x7, 24(x6)
# Testcase 7: rs1:x8(0xffffffff), rs2:x1(0x00000001), result rd:x24(0xfffffffe)
li x8, MASK_XLEN(0xffffffff)
li x1, MASK_XLEN(0x00000001)
XOR x24, x8, x1
sw x24, 28(x6)
# Testcase 8: rs1:x9(0xffffffff), rs2:x4(0xffffffff), result rd:x23(0x00000000)
li x9, MASK_XLEN(0xffffffff)
li x4, MASK_XLEN(0xffffffff)
XOR x23, x9, x4
sw x23, 32(x6)
# Testcase 9: rs1:x14(0x38701a14), rs2:x27(0x5f3f5638), result rd:x2(0x674f4c2c)
li x14, MASK_XLEN(0x38701a14)
li x27, MASK_XLEN(0x5f3f5638)
XOR x2, x14, x27
sw x2, 36(x6)
# Testcase 10: rs1:x5(0x19c16a0d), rs2:x28(0xc87a7463), result rd:x23(0xd1bb1e6e)
li x5, MASK_XLEN(0x19c16a0d)
li x28, MASK_XLEN(0xc87a7463)
XOR x23, x5, x28
sw x23, 40(x6)
# Testcase 11: rs1:x27(0x38018b47), rs2:x19(0x0b9475b1), result rd:x21(0x3395fef6)
li x27, MASK_XLEN(0x38018b47)
li x19, MASK_XLEN(0x0b9475b1)
XOR x21, x27, x19
sw x21, 44(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-XOR.S
// David_Harris@hmc.edu & Katherine Parry

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00000000
00000000
00000001
00000000
ffffffff
ffffffff
00000001
00000000
00000002
00000000
00000000
00000000
ffffffff
ffffffff
00000000
00000000
fffffffe
ffffffff
393cb5d1
72ca6f49
7b12609b
245889d8
7f42ac28
af17a2d3

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@ -0,0 +1,24 @@
00000000
00000000
00000001
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000000
00000001
00000000
00000000
00000000
00000001
00000000
00000000
00000000
00000000
00000000

24
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@ -0,0 +1,24 @@
00000000
00000000
00000001
00000000
00000001
00000000
00000000
00000000
00000000
00000000
00000001
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000000
00000000
00000000
00000001
00000000

24
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@ -0,0 +1,24 @@
00000000
00000000
ffffffff
ffffffff
00000001
00000000
00000001
00000000
00000000
00000000
00000002
00000000
ffffffff
ffffffff
fffffffe
ffffffff
00000000
00000000
0f7dc13a
f51130ed
bb2485d0
9633d6e4
4557352f
60fe4e94

24
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00000000
00000000
00000001
00000000
ffffffff
ffffffff
00000001
00000000
00000000
00000000
fffffffe
ffffffff
ffffffff
ffffffff
fffffffe
ffffffff
00000000
00000000
e6f91511
a770a807
87ea008b
3afeadc9
3e7f1ce8
a43d2571

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-ADD.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.394307//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x20(0x0000000000000000), rs2:x22(0x0000000000000000), result rd:x3(0x0000000000000000)
li x20, MASK_XLEN(0x0000000000000000)
li x22, MASK_XLEN(0x0000000000000000)
ADD x3, x20, x22
sd x3, 0(x6)
# Testcase 1: rs1:x1(0x0000000000000000), rs2:x4(0x0000000000000001), result rd:x21(0x0000000000000001)
li x1, MASK_XLEN(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000001)
ADD x21, x1, x4
sd x21, 8(x6)
# Testcase 2: rs1:x7(0x0000000000000000), rs2:x20(0xffffffffffffffff), result rd:x27(0xffffffffffffffff)
li x7, MASK_XLEN(0x0000000000000000)
li x20, MASK_XLEN(0xffffffffffffffff)
ADD x27, x7, x20
sd x27, 16(x6)
# Testcase 3: rs1:x19(0x0000000000000001), rs2:x4(0x0000000000000000), result rd:x13(0x0000000000000001)
li x19, MASK_XLEN(0x0000000000000001)
li x4, MASK_XLEN(0x0000000000000000)
ADD x13, x19, x4
sd x13, 24(x6)
# Testcase 4: rs1:x3(0x0000000000000001), rs2:x12(0x0000000000000001), result rd:x27(0x0000000000000002)
li x3, MASK_XLEN(0x0000000000000001)
li x12, MASK_XLEN(0x0000000000000001)
ADD x27, x3, x12
sd x27, 32(x6)
# Testcase 5: rs1:x4(0x0000000000000001), rs2:x2(0xffffffffffffffff), result rd:x20(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000001)
li x2, MASK_XLEN(0xffffffffffffffff)
ADD x20, x4, x2
sd x20, 40(x6)
# Testcase 6: rs1:x1(0xffffffffffffffff), rs2:x7(0x0000000000000000), result rd:x31(0xffffffffffffffff)
li x1, MASK_XLEN(0xffffffffffffffff)
li x7, MASK_XLEN(0x0000000000000000)
ADD x31, x1, x7
sd x31, 48(x6)
# Testcase 7: rs1:x16(0xffffffffffffffff), rs2:x7(0x0000000000000001), result rd:x24(0x0000000000000000)
li x16, MASK_XLEN(0xffffffffffffffff)
li x7, MASK_XLEN(0x0000000000000001)
ADD x24, x16, x7
sd x24, 56(x6)
# Testcase 8: rs1:x26(0xffffffffffffffff), rs2:x2(0xffffffffffffffff), result rd:x30(0xfffffffffffffffe)
li x26, MASK_XLEN(0xffffffffffffffff)
li x2, MASK_XLEN(0xffffffffffffffff)
ADD x30, x26, x2
sd x30, 64(x6)
# Testcase 9: rs1:x20(0x05d51433ade9b2b4), rs2:x4(0x6cf55b158b53031d), result rd:x27(0x72ca6f49393cb5d1)
li x20, MASK_XLEN(0x05d51433ade9b2b4)
li x4, MASK_XLEN(0x6cf55b158b53031d)
ADD x27, x20, x4
sd x27, 72(x6)
# Testcase 10: rs1:x21(0x11ebcd49428a1c22), rs2:x10(0x126cbc8f38884479), result rd:x12(0x245889d87b12609b)
li x21, MASK_XLEN(0x11ebcd49428a1c22)
li x10, MASK_XLEN(0x126cbc8f38884479)
ADD x12, x21, x10
sd x12, 80(x6)
# Testcase 11: rs1:x15(0x2e2950656fa231e9), rs2:x2(0x80ee526e0fa07a3f), result rd:x20(0xaf17a2d37f42ac28)
li x15, MASK_XLEN(0x2e2950656fa231e9)
li x2, MASK_XLEN(0x80ee526e0fa07a3f)
ADD x20, x15, x2
sd x20, 88(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-ADD.S
// David_Harris@hmc.edu & Katherine Parry

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-SLT.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.394785//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x18(0x0000000000000000), rs2:x9(0x0000000000000000), result rd:x5(0x0000000000000000)
li x18, MASK_XLEN(0x0000000000000000)
li x9, MASK_XLEN(0x0000000000000000)
SLT x5, x18, x9
sd x5, 0(x6)
# Testcase 1: rs1:x8(0x0000000000000000), rs2:x25(0x0000000000000001), result rd:x31(0x0000000000000001)
li x8, MASK_XLEN(0x0000000000000000)
li x25, MASK_XLEN(0x0000000000000001)
SLT x31, x8, x25
sd x31, 8(x6)
# Testcase 2: rs1:x16(0x0000000000000000), rs2:x12(0xffffffffffffffff), result rd:x20(0x0000000000000000)
li x16, MASK_XLEN(0x0000000000000000)
li x12, MASK_XLEN(0xffffffffffffffff)
SLT x20, x16, x12
sd x20, 16(x6)
# Testcase 3: rs1:x10(0x0000000000000001), rs2:x22(0x0000000000000000), result rd:x12(0x0000000000000000)
li x10, MASK_XLEN(0x0000000000000001)
li x22, MASK_XLEN(0x0000000000000000)
SLT x12, x10, x22
sd x12, 24(x6)
# Testcase 4: rs1:x19(0x0000000000000001), rs2:x31(0x0000000000000001), result rd:x29(0x0000000000000000)
li x19, MASK_XLEN(0x0000000000000001)
li x31, MASK_XLEN(0x0000000000000001)
SLT x29, x19, x31
sd x29, 32(x6)
# Testcase 5: rs1:x21(0x0000000000000001), rs2:x28(0xffffffffffffffff), result rd:x20(0x0000000000000000)
li x21, MASK_XLEN(0x0000000000000001)
li x28, MASK_XLEN(0xffffffffffffffff)
SLT x20, x21, x28
sd x20, 40(x6)
# Testcase 6: rs1:x5(0xffffffffffffffff), rs2:x23(0x0000000000000000), result rd:x10(0x0000000000000001)
li x5, MASK_XLEN(0xffffffffffffffff)
li x23, MASK_XLEN(0x0000000000000000)
SLT x10, x5, x23
sd x10, 48(x6)
# Testcase 7: rs1:x13(0xffffffffffffffff), rs2:x24(0x0000000000000001), result rd:x14(0x0000000000000001)
li x13, MASK_XLEN(0xffffffffffffffff)
li x24, MASK_XLEN(0x0000000000000001)
SLT x14, x13, x24
sd x14, 56(x6)
# Testcase 8: rs1:x27(0xffffffffffffffff), rs2:x21(0xffffffffffffffff), result rd:x3(0x0000000000000000)
li x27, MASK_XLEN(0xffffffffffffffff)
li x21, MASK_XLEN(0xffffffffffffffff)
SLT x3, x27, x21
sd x3, 64(x6)
# Testcase 9: rs1:x8(0x983631890063e42f), rs2:x21(0xb2d650af313b32b7), result rd:x15(0x0000000000000001)
li x8, MASK_XLEN(0x983631890063e42f)
li x21, MASK_XLEN(0xb2d650af313b32b7)
SLT x15, x8, x21
sd x15, 72(x6)
# Testcase 10: rs1:x19(0xb5d97ef760ef1471), rs2:x28(0xac7c8803e01bbf50), result rd:x14(0x0000000000000000)
li x19, MASK_XLEN(0xb5d97ef760ef1471)
li x28, MASK_XLEN(0xac7c8803e01bbf50)
SLT x14, x19, x28
sd x14, 80(x6)
# Testcase 11: rs1:x19(0x66faf98908135d58), rs2:x14(0xb3ab1b2cdf26f517), result rd:x25(0x0000000000000000)
li x19, MASK_XLEN(0x66faf98908135d58)
li x14, MASK_XLEN(0xb3ab1b2cdf26f517)
SLT x25, x19, x14
sd x25, 88(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-SLT.S
// David_Harris@hmc.edu & Katherine Parry

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-SLTU.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.395005//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x22(0x0000000000000000), rs2:x23(0x0000000000000000), result rd:x2(0x0000000000000000)
li x22, MASK_XLEN(0x0000000000000000)
li x23, MASK_XLEN(0x0000000000000000)
SLTU x2, x22, x23
sd x2, 0(x6)
# Testcase 1: rs1:x15(0x0000000000000000), rs2:x17(0x0000000000000001), result rd:x29(0x0000000000000001)
li x15, MASK_XLEN(0x0000000000000000)
li x17, MASK_XLEN(0x0000000000000001)
SLTU x29, x15, x17
sd x29, 8(x6)
# Testcase 2: rs1:x16(0x0000000000000000), rs2:x30(0xffffffffffffffff), result rd:x18(0x0000000000000001)
li x16, MASK_XLEN(0x0000000000000000)
li x30, MASK_XLEN(0xffffffffffffffff)
SLTU x18, x16, x30
sd x18, 16(x6)
# Testcase 3: rs1:x20(0x0000000000000001), rs2:x25(0x0000000000000000), result rd:x1(0x0000000000000000)
li x20, MASK_XLEN(0x0000000000000001)
li x25, MASK_XLEN(0x0000000000000000)
SLTU x1, x20, x25
sd x1, 24(x6)
# Testcase 4: rs1:x29(0x0000000000000001), rs2:x2(0x0000000000000001), result rd:x16(0x0000000000000000)
li x29, MASK_XLEN(0x0000000000000001)
li x2, MASK_XLEN(0x0000000000000001)
SLTU x16, x29, x2
sd x16, 32(x6)
# Testcase 5: rs1:x11(0x0000000000000001), rs2:x10(0xffffffffffffffff), result rd:x27(0x0000000000000001)
li x11, MASK_XLEN(0x0000000000000001)
li x10, MASK_XLEN(0xffffffffffffffff)
SLTU x27, x11, x10
sd x27, 40(x6)
# Testcase 6: rs1:x15(0xffffffffffffffff), rs2:x2(0x0000000000000000), result rd:x26(0x0000000000000000)
li x15, MASK_XLEN(0xffffffffffffffff)
li x2, MASK_XLEN(0x0000000000000000)
SLTU x26, x15, x2
sd x26, 48(x6)
# Testcase 7: rs1:x27(0xffffffffffffffff), rs2:x29(0x0000000000000001), result rd:x26(0x0000000000000000)
li x27, MASK_XLEN(0xffffffffffffffff)
li x29, MASK_XLEN(0x0000000000000001)
SLTU x26, x27, x29
sd x26, 56(x6)
# Testcase 8: rs1:x14(0xffffffffffffffff), rs2:x7(0xffffffffffffffff), result rd:x18(0x0000000000000000)
li x14, MASK_XLEN(0xffffffffffffffff)
li x7, MASK_XLEN(0xffffffffffffffff)
SLTU x18, x14, x7
sd x18, 64(x6)
# Testcase 9: rs1:x3(0xf689a4a5ffda0336), rs2:x27(0xfa83ada4a2121ac5), result rd:x24(0x0000000000000001)
li x3, MASK_XLEN(0xf689a4a5ffda0336)
li x27, MASK_XLEN(0xfa83ada4a2121ac5)
SLTU x24, x3, x27
sd x24, 72(x6)
# Testcase 10: rs1:x31(0xfca055362169df82), rs2:x22(0x66dd779403c54c71), result rd:x14(0x0000000000000000)
li x31, MASK_XLEN(0xfca055362169df82)
li x22, MASK_XLEN(0x66dd779403c54c71)
SLTU x14, x31, x22
sd x14, 80(x6)
# Testcase 11: rs1:x23(0x00de59f550f0fc2b), rs2:x25(0x03a8987936a98d74), result rd:x1(0x0000000000000001)
li x23, MASK_XLEN(0x00de59f550f0fc2b)
li x25, MASK_XLEN(0x03a8987936a98d74)
SLTU x1, x23, x25
sd x1, 88(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-SLTU.S
// David_Harris@hmc.edu & Katherine Parry

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-SUB.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.394545//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x4(0x0000000000000000), rs2:x23(0x0000000000000000), result rd:x13(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000000)
li x23, MASK_XLEN(0x0000000000000000)
SUB x13, x4, x23
sd x13, 0(x6)
# Testcase 1: rs1:x7(0x0000000000000000), rs2:x9(0x0000000000000001), result rd:x12(0xffffffffffffffff)
li x7, MASK_XLEN(0x0000000000000000)
li x9, MASK_XLEN(0x0000000000000001)
SUB x12, x7, x9
sd x12, 8(x6)
# Testcase 2: rs1:x29(0x0000000000000000), rs2:x24(0xffffffffffffffff), result rd:x16(0x0000000000000001)
li x29, MASK_XLEN(0x0000000000000000)
li x24, MASK_XLEN(0xffffffffffffffff)
SUB x16, x29, x24
sd x16, 16(x6)
# Testcase 3: rs1:x27(0x0000000000000001), rs2:x29(0x0000000000000000), result rd:x30(0x0000000000000001)
li x27, MASK_XLEN(0x0000000000000001)
li x29, MASK_XLEN(0x0000000000000000)
SUB x30, x27, x29
sd x30, 24(x6)
# Testcase 4: rs1:x22(0x0000000000000001), rs2:x7(0x0000000000000001), result rd:x31(0x0000000000000000)
li x22, MASK_XLEN(0x0000000000000001)
li x7, MASK_XLEN(0x0000000000000001)
SUB x31, x22, x7
sd x31, 32(x6)
# Testcase 5: rs1:x25(0x0000000000000001), rs2:x2(0xffffffffffffffff), result rd:x26(0x0000000000000002)
li x25, MASK_XLEN(0x0000000000000001)
li x2, MASK_XLEN(0xffffffffffffffff)
SUB x26, x25, x2
sd x26, 40(x6)
# Testcase 6: rs1:x9(0xffffffffffffffff), rs2:x4(0x0000000000000000), result rd:x20(0xffffffffffffffff)
li x9, MASK_XLEN(0xffffffffffffffff)
li x4, MASK_XLEN(0x0000000000000000)
SUB x20, x9, x4
sd x20, 48(x6)
# Testcase 7: rs1:x30(0xffffffffffffffff), rs2:x15(0x0000000000000001), result rd:x22(0xfffffffffffffffe)
li x30, MASK_XLEN(0xffffffffffffffff)
li x15, MASK_XLEN(0x0000000000000001)
SUB x22, x30, x15
sd x22, 56(x6)
# Testcase 8: rs1:x22(0xffffffffffffffff), rs2:x14(0xffffffffffffffff), result rd:x29(0x0000000000000000)
li x22, MASK_XLEN(0xffffffffffffffff)
li x14, MASK_XLEN(0xffffffffffffffff)
SUB x29, x22, x14
sd x29, 64(x6)
# Testcase 9: rs1:x10(0xdff3334b91b15f5d), rs2:x21(0xeae2025e82339e23), result rd:x12(0xf51130ed0f7dc13a)
li x10, MASK_XLEN(0xdff3334b91b15f5d)
li x21, MASK_XLEN(0xeae2025e82339e23)
SUB x12, x10, x21
sd x12, 72(x6)
# Testcase 10: rs1:x5(0xd670f668637e0edc), rs2:x18(0x403d1f83a859890c), result rd:x23(0x9633d6e4bb2485d0)
li x5, MASK_XLEN(0xd670f668637e0edc)
li x18, MASK_XLEN(0x403d1f83a859890c)
SUB x23, x5, x18
sd x23, 80(x6)
# Testcase 11: rs1:x11(0x753c7c99032f06ca), rs2:x24(0x143e2e04bdd7d19b), result rd:x2(0x60fe4e944557352f)
li x11, MASK_XLEN(0x753c7c99032f06ca)
li x24, MASK_XLEN(0x143e2e04bdd7d19b)
SUB x2, x11, x24
sd x2, 88(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-SUB.S
// David_Harris@hmc.edu & Katherine Parry

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///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-XOR.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-01-27 08:08:42.395231//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "model_test.h"
#include "arch_test.h"
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
RVTEST_SIGBASE( x6, wally_signature)
# Testcase 0: rs1:x27(0x0000000000000000), rs2:x22(0x0000000000000000), result rd:x17(0x0000000000000000)
li x27, MASK_XLEN(0x0000000000000000)
li x22, MASK_XLEN(0x0000000000000000)
XOR x17, x27, x22
sd x17, 0(x6)
# Testcase 1: rs1:x20(0x0000000000000000), rs2:x4(0x0000000000000001), result rd:x7(0x0000000000000001)
li x20, MASK_XLEN(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000001)
XOR x7, x20, x4
sd x7, 8(x6)
# Testcase 2: rs1:x4(0x0000000000000000), rs2:x20(0xffffffffffffffff), result rd:x21(0xffffffffffffffff)
li x4, MASK_XLEN(0x0000000000000000)
li x20, MASK_XLEN(0xffffffffffffffff)
XOR x21, x4, x20
sd x21, 16(x6)
# Testcase 3: rs1:x7(0x0000000000000001), rs2:x28(0x0000000000000000), result rd:x10(0x0000000000000001)
li x7, MASK_XLEN(0x0000000000000001)
li x28, MASK_XLEN(0x0000000000000000)
XOR x10, x7, x28
sd x10, 24(x6)
# Testcase 4: rs1:x4(0x0000000000000001), rs2:x16(0x0000000000000001), result rd:x28(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000001)
li x16, MASK_XLEN(0x0000000000000001)
XOR x28, x4, x16
sd x28, 32(x6)
# Testcase 5: rs1:x30(0x0000000000000001), rs2:x13(0xffffffffffffffff), result rd:x21(0xfffffffffffffffe)
li x30, MASK_XLEN(0x0000000000000001)
li x13, MASK_XLEN(0xffffffffffffffff)
XOR x21, x30, x13
sd x21, 40(x6)
# Testcase 6: rs1:x3(0xffffffffffffffff), rs2:x1(0x0000000000000000), result rd:x9(0xffffffffffffffff)
li x3, MASK_XLEN(0xffffffffffffffff)
li x1, MASK_XLEN(0x0000000000000000)
XOR x9, x3, x1
sd x9, 48(x6)
# Testcase 7: rs1:x30(0xffffffffffffffff), rs2:x15(0x0000000000000001), result rd:x26(0xfffffffffffffffe)
li x30, MASK_XLEN(0xffffffffffffffff)
li x15, MASK_XLEN(0x0000000000000001)
XOR x26, x30, x15
sd x26, 56(x6)
# Testcase 8: rs1:x26(0xffffffffffffffff), rs2:x4(0xffffffffffffffff), result rd:x28(0x0000000000000000)
li x26, MASK_XLEN(0xffffffffffffffff)
li x4, MASK_XLEN(0xffffffffffffffff)
XOR x28, x26, x4
sd x28, 64(x6)
# Testcase 9: rs1:x27(0x2227d96d41a93f90), rs2:x21(0x8557716aa7502a81), result rd:x21(0xa770a807e6f91511)
li x27, MASK_XLEN(0x2227d96d41a93f90)
li x21, MASK_XLEN(0x8557716aa7502a81)
XOR x21, x27, x21
sd x21, 72(x6)
# Testcase 10: rs1:x9(0x1d77ce4058d87776), rs2:x28(0x27896389df3277fd), result rd:x1(0x3afeadc987ea008b)
li x9, MASK_XLEN(0x1d77ce4058d87776)
li x28, MASK_XLEN(0x27896389df3277fd)
XOR x1, x9, x28
sd x1, 80(x6)
# Testcase 11: rs1:x9(0x0a68e88e0ad40415), rs2:x18(0xae55cdff34ab18fd), result rd:x11(0xa43d25713e7f1ce8)
li x9, MASK_XLEN(0x0a68e88e0ad40415)
li x18, MASK_XLEN(0xae55cdff34ab18fd)
XOR x11, x9, x18
sd x11, 88(x6)
.EQU NUMTESTS,12
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
wally_signature:
.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-XOR.S
// David_Harris@hmc.edu & Katherine Parry