More directed testing

tests/testgen/Makefile

@@ -1,4 +1,39 @@
-all:
+#all:
+#	./covergen.py
+#	cd ../riscof; make wally-riscv-arch-test
+#	cd ../../sim; make memfiles
+
+CEXT		:= c
+CPPEXT		:= cpp
+AEXT		:= s
+SEXT		:= S
+SRCEXT 		:= \([$(CEXT)$(AEXT)$(SEXT)]\|$(CPPEXT)\)
+#SRCS = $(wildcard *.S)
+#PROGS = $(patsubst %.S,%,$(SRCS))
+SRCDIR = ${WALLY}/tests/functcov/rv64/I
+SRCEXT = S
+SOURCES		?= $(shell find $(SRCDIR) -type f -regex ".*\.$(SRCEXT)" | sort)
+OBJEXT = elf
+OBJECTS		:= $(SOURCES:.$(SEXT)=.$(OBJEXT))
+
+all: 
 	./covergen.py
-	cd ../riscof; make wally-riscv-arch-test
+	make build
-	cd ../../sim; make memfiles
+
+build: $(OBJECTS)
+
+%.elf.objdump: %.elf
+
+# Change many things if bit width isn't 64
+$(SRCDIR)/%.elf: $(SRCDIR)/%.$(SEXT) 
+	riscv64-unknown-elf-gcc -g -o $@ -march=rv64gqc_zfa_zba_zbb_zbc_zbs_zfh_zicboz_zicbop_zicbom -mabi=lp64 -mcmodel=medany \
+	    -nostartfiles -T${WALLY}/examples/link/link.ld $<
+	riscv64-unknown-elf-objdump -S -D $@ > $@.objdump
+	riscv64-unknown-elf-elf2hex --bit-width 64 --input $@ --output $@.memfile
+	extractFunctionRadix.sh $@.objdump
+    
+clean:
+	rm -f ${SRCDIR}/*.elf ${SRCDIR}/*.objdump ${SRCDIR}/*.addr *${SRCDIR}/.lab ${SRCDIR}/*.memfile
+
+
+

tests/testgen/covergen.py

@@ -14,7 +14,7 @@ from datetime import datetime
 from random import randint 
 from random import seed
 from random import getrandbits
-from os import getenv
+import os
 import re
 
 ##################################
@@ -33,16 +33,16 @@ def signedImm12(imm):
 
 def writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen):
   lines = "\n# Testcase " + str(desc) + "\n"
-  lines = lines + "li x" + str(rd) + ", MASK_XLEN(" + formatstr.format(rdval) + ") # initialize rd to a random value that should get changed\n"
+  lines = lines + "li x" + str(rd) + ", " + formatstr.format(rdval) + " # initialize rd to a random value that should get changed\n"
   if (test in rtype):
-    lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
+    lines = lines + "li x" + str(rs1) + ", " + formatstr.format(rs1val) + " # initialize rs1 to a random value \n"
-    lines = lines + "li x" + str(rs2) + ", MASK_XLEN(" + formatstr.format(rs2val) + ") # initialize rs2 to a random value\n"
+    lines = lines + "li x" + str(rs2) + ", " + formatstr.format(rs2val) + " # initialize rs2 to a random value\n"
     lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", x" + str(rs2) + " # perform operation\n" 
   elif (test in shiftitype):
-    lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
+    lines = lines + "li x" + str(rs1) + ", " + formatstr.format(rs1val) + " # initialize rs1 to a random value \n"
     lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", " + shiftImm(immval, xlen) + " # perform operation\n"
   elif (test in itype):
-    lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
+    lines = lines + "li x" + str(rs1) + ", " + formatstr.format(rs1val) + " # initialize rs1 to a random value \n"
     lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", " + signedImm12(immval) + " # perform operation\n"
   else:
     pass
@@ -79,22 +79,28 @@ def make_rs2(test, storecmd, xlen):
 
 def make_rd_rs1(test, storecmd, xlen):
   for r in range(32):
-    [rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
+    [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
     desc = "cp_rd_rs1 (Test rd = rs1 = x" + str(r) + ")"
     writeCovVector(desc, r, rs2, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
 
 def make_rd_rs2(test, storecmd, xlen):
   for r in range(32):
-    [rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
+    [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
     desc = "cp_rd_rs2 (Test rd = rs1 = x" + str(r) + ")"
     writeCovVector(desc, rs1, r, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
 
 def make_rd_rs1_rs2(test, storecmd, xlen):
   for r in range(32):
-    [rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
+    [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
     desc = "cp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x" + str(r) + ")"
     writeCovVector(desc, r, r, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
 
+def make_rs1_rs2(test, storecmd, xlen):
+  for r in range(32):
+    [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
+    desc = "cp_rd_rs1_rs2 (Test rs1 = rs2 = x" + str(r) + ")"
+    writeCovVector(desc, r, r, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
+
 def make_rs1_maxvals(test, storecmd, xlen):
    for v in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
     [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
@@ -131,6 +137,29 @@ def make_rs1_rs2_eqval(test, storecmd, xlen):
 #def make_cp_gpr_hazard(test, storecmd, xlen):
 #  pass # *** to be implemented ***
 
+def make_rs1_sign(test, storecmd, xlen):
+   for v in [1, -1]:
+    [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
+    rs1val = abs(rs1val) * v;
+    desc = "cp_rs1_sign (Test source rs1 value = " + hex(rs1val) + ")"
+    writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
+
+def make_rs2_sign(test, storecmd, xlen):
+  for v in [1, -1]:
+    [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
+    rs2val = abs(rs2val) * v;
+    desc = "cp_rs2_sign (Test source rs2 value = " + hex(rs2val) + ")"
+    writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
+
+def make_cr_rs1_rs2_sign(test, storecmd, xlen):
+  for v1 in [1, -1]:
+    for v2 in [1, -1]:
+      [rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
+      rs1val = abs(rs1val) * v1;
+      rs2val = abs(rs2val) * v2;
+      desc = "cr_rs1_rs2 (Test source rs1 = " + hex(rs1val) + " rs2 = " + hex(rs2val) + ")"
+      writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
+
 def write_tests(coverpoints, test, storecmd, xlen):
   for coverpoint in coverpoints:
     if (coverpoint == "cp_asm_count"):
@@ -141,12 +170,18 @@ def write_tests(coverpoints, test, storecmd, xlen):
       make_rs1(test, storecmd, xlen)
     elif (coverpoint == "cp_rs2"):
       make_rs2(test, storecmd, xlen)
-    elif (coverpoint == "cp_rd_rs1"):
+    elif (coverpoint == "cmp_rd_rs1"):
       make_rd_rs1(test, storecmd, xlen)
-    elif (coverpoint == "cp_rd_rs2"):
+    elif (coverpoint == "cmp_rd_rs2"):
       make_rd_rs2(test, storecmd, xlen)
-    elif (coverpoint == "cp_rd_rs1_rs2"):
+    elif (coverpoint == "cmp_rd_rs1_rs2"):
       make_rd_rs1_rs2(test, storecmd, xlen)
+    elif (coverpoint == "cmp_rd_rs1_eq"):
+      pass # duplicate of cmp_rd_rs1
+    elif (coverpoint == "cmp_rd_rs2_eq"):
+      pass # duplicate of cmp_rd_rs2
+    elif (coverpoint == "cmp_rs1_rs2_eq"):
+      make_rs1_rs2(test, storecmd, xlen)
     elif (coverpoint == "cp_rs1_maxvals"):
       make_rs1_maxvals(test, storecmd, xlen)
     elif (coverpoint == "cp_rs2_maxvals"):
@@ -159,8 +194,22 @@ def write_tests(coverpoints, test, storecmd, xlen):
       make_rd_rs2_eqval(test, storecmd, xlen)
     elif (coverpoint == "cmp_rs1_rs2_eqval"):
       make_rs1_rs2_eqval(test, storecmd, xlen)
-#    elif (coverpoint == "cp_gpr_hazard"):
+    elif (coverpoint == "cp_rs1_sign"):
-#      make_cp_gpr_hazard(test, storecmd, xlen)
+      make_rs1_sign(test, storecmd, xlen)
+    elif (coverpoint == "cp_rs2_sign"):
+      make_rs2_sign(test, storecmd, xlen)
+    elif (coverpoint == "cp_rd_sign"):
+      pass # hope already covered by rd_maxvals
+    elif (coverpoint == "cr_rs1_rs2"):
+      make_cr_rs1_rs2_sign(test, storecmd, xlen)
+    elif (coverpoint == "cp_rs1_toggle"):
+      pass # toggle not needed and seems to be covered by other things
+    elif (coverpoint == "cp_rs2_toggle"):
+      pass # toggle not needed and seems to be covered by other things
+    elif (coverpoint == "cp_rd_toggle"):
+      pass # toggle not needed and seems to be covered by other things
+    elif (coverpoint == "cp_gpr_hazard"):
+      pass # not yet implemented
     else:
       print("Error: " + coverpoint + " not implemented yet for " + test)
       
@@ -188,7 +237,7 @@ def getcovergroups(coverdefdir, coverfiles):
 ##################################
 
 # change these to suite your tests
-riscv = getenv("RISCV")
+riscv = os.environ.get("RISCV")
 coverdefdir = riscv+"/ImperasDV-OpenHW/Imperas/ImpProprietary/source/host/riscvISACOV/source/coverage";
 #coverfiles = ["RV64I", "RV64M", "RV64A", "RV64C", "RV64F", "RV64D"] # add more later
 coverfiles = ["RV64I"] # add more later
@@ -222,13 +271,13 @@ for xlen in xlens:
     storecmd = "sd"
     wordsize = 8
   for test in coverpoints.keys():
-#  for test in tests:
+#    pathname = "../wally-riscv-arch-test/riscv-test-suite/rv" + str(xlen) + "i_m/I/"
-#    corners = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1, 
+    WALLY = os.environ.get('WALLY')
-#            2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
+    pathname = WALLY+"/tests/functcov/rv" + str(xlen) + "/I/"
-    corners = [0, 1, 2**(xlen)-1]
+    cmd = "mkdir -p " + pathname
-    pathname = "../wally-riscv-arch-test/riscv-test-suite/rv" + str(xlen) + "i_m/I/"
+    os.system(cmd)
     basename = "WALLY-COV-" + test 
-    fname = pathname + "src/" + basename + ".S"
+    fname = pathname + "/" + basename + ".S"
 
     # print custom header part
     f = open(fname, "w")

tests/testgen/covergen_footer.S

@@ -1,30 +1,2 @@
-RVTEST_CODE_END
-RVMODEL_HALT
 
-RVTEST_DATA_BEGIN
+.end
-.align 4
-rvtest_data:
-.word 0x98765432
-RVTEST_DATA_END
-
-RVMODEL_DATA_BEGIN
-
-
-wally_signature:
-    .fill NUMTESTS*(XLEN/32),4,0xdeadbeef
-
-#ifdef rvtest_mtrap_routine
-
-mtrap_sigptr:
-    .fill 64*(XLEN/32),4,0xdeadbeef
-
-#endif
-
-#ifdef rvtest_gpr_save
-
-gpr_save:
-    .fill 32*(XLEN/32),4,0xdeadbeef
-
-#endif
-
-RVMODEL_DATA_END

tests/testgen/covergen_header.S

@@ -4,18 +4,9 @@
 // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 ///////////////////////////////////////////
 
-#include "model_test.h"
-#include "arch_test.h"
-RVTEST_ISA("RV64I")
-
 .section .text.init
 .globl rvtest_entry_point
+
 rvtest_entry_point:
-RVMODEL_BOOT
-RVTEST_CODE_BEGIN
 
-RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",temp)
-
-    la x6, wally_signature
-    sd x0, 0(x6)