From e08a5789085c432c5286b743afabafdd0626a5a1 Mon Sep 17 00:00:00 2001 From: Kip Macsai-Goren Date: Tue, 6 Jul 2021 18:32:47 -0400 Subject: [PATCH 1/6] fixed upper bits page fault signal --- wally-pipelined/src/mmu/tlbcontrol.sv | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/wally-pipelined/src/mmu/tlbcontrol.sv b/wally-pipelined/src/mmu/tlbcontrol.sv index 85731217e..0a726ab2b 100644 --- a/wally-pipelined/src/mmu/tlbcontrol.sv +++ b/wally-pipelined/src/mmu/tlbcontrol.sv @@ -70,12 +70,10 @@ module tlbcontrol #(parameter TLB_ENTRIES = 8, if (`XLEN==64) begin assign SV39Mode = (SVMode == `SV39); // generate page fault if upper bits aren't all the same - logic UpperOnes39, UpperZeros39, UpperOnes48, UpperZeros48; - assign UpperOnes39 = &(Address[63:39]); - assign UpperZeros39 = ~|(Address[63:39]); - assign UpperOnes48 = &(Address[63:48]); - assign UpperZeros48 = ~|(Address[63:48]); - assign UpperBitsUnequalPageFault = SV39Mode ? (Address[38] ? UpperOnes39 : UpperZeros39) : (Address[47] ? UpperOnes48 : UpperZeros48); + logic UpperEqual39, UpperEqual48; + assign UpperEqual39 = &(Address[63:38]) | ~|(Address[63:38]); + assign UpperEqual48 = &(Address[63:47]) | ~|(Address[63:47]); + assign UpperBitsUnequalPageFault = SvMode ? ~UpperEqual39 : ~UpperEqual48; end else begin assign SV39Mode = 0; assign UpperBitsUnequalPageFault = 0; From b757c96b2db498e7c8dd4010e62e0cf893f530cc Mon Sep 17 00:00:00 2001 From: Abe Date: Tue, 6 Jul 2021 23:28:58 -0400 Subject: [PATCH 2/6] Changed SvMode to SVMode on line 76 --- wally-pipelined/src/mmu/tlbcontrol.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/wally-pipelined/src/mmu/tlbcontrol.sv b/wally-pipelined/src/mmu/tlbcontrol.sv index 632b8f50a..307ef327c 100644 --- a/wally-pipelined/src/mmu/tlbcontrol.sv +++ b/wally-pipelined/src/mmu/tlbcontrol.sv @@ -73,7 +73,7 @@ module tlbcontrol #(parameter TLB_ENTRIES = 8, logic UpperEqual39, UpperEqual48; assign UpperEqual39 = &(Address[63:38]) | ~|(Address[63:38]); assign UpperEqual48 = &(Address[63:47]) | ~|(Address[63:47]); - assign UpperBitsUnequalPageFault = SvMode ? ~UpperEqual39 : ~UpperEqual48; + assign UpperBitsUnequalPageFault = SVMode ? ~UpperEqual39 : ~UpperEqual48; end else begin assign SV39Mode = 0; assign UpperBitsUnequalPageFault = 0; From 8dc40e988e74637904d1ef9d1f7705f1e277debf Mon Sep 17 00:00:00 2001 From: Abe Date: Tue, 6 Jul 2021 23:35:47 -0400 Subject: [PATCH 3/6] Updated portme file to include counters MTIME and MINSTRET. Timer currently set to read milliseconds running at 100MHZ, but this can be changed by setting a different clock speed in the testbench sv file and manipulating TIMER_RES_DIVIDER on line 120 --- riscv-coremark/riscv64-baremetal/core_portme.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/riscv-coremark/riscv64-baremetal/core_portme.c b/riscv-coremark/riscv64-baremetal/core_portme.c index dab428306..1502fd42c 100755 --- a/riscv-coremark/riscv64-baremetal/core_portme.c +++ b/riscv-coremark/riscv64-baremetal/core_portme.c @@ -126,6 +126,15 @@ void portable_free(void *p) { /** Define Host specific (POSIX), or target specific global time variables. */ static CORETIMETYPE start_time_val, stop_time_val; +/* Function: minstret + This function will count the number of instructions. +*/ +void minstretFunc(void) +{ + unsigned long minstretAttempt = read_csr(minstret); + ee_printf("Minstret is %lu\n", minstretAttempt); +} + /* Function: start_time This function will be called right before starting the timed portion of the benchmark. @@ -133,6 +142,7 @@ static CORETIMETYPE start_time_val, stop_time_val; or zeroing some system parameters - e.g. setting the cpu clocks cycles to 0. */ void start_time(void) { + minstretFunc(); GETMYTIME(start_time_val); ee_printf("Timer started\n"); ee_printf(" MTIME: %u\n", start_time_val); @@ -157,6 +167,7 @@ void stop_time(void) { asm volatile("int3");/*1 */ #endif GETMYTIME(stop_time_val); + minstretFunc(); ee_printf("Timer stopped\n"); ee_printf(" MTIME: %u\n", stop_time_val); } @@ -183,7 +194,7 @@ CORE_TICKS get_time(void) { secs_ret time_in_secs(CORE_TICKS ticks) { secs_ret retval=((secs_ret)ticks) / (secs_ret)EE_TICKS_PER_SEC; int retvalint = (int)retval; - ee_printf(" RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retvalint); + ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retvalint); return retval; } #else From b536065ee85284e2b5ad57be98798c934af7c873 Mon Sep 17 00:00:00 2001 From: Abe Date: Tue, 6 Jul 2021 23:37:43 -0400 Subject: [PATCH 4/6] Removed debugging loop to test timers for clarity --- riscv-coremark/coremark/core_main.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/riscv-coremark/coremark/core_main.c b/riscv-coremark/coremark/core_main.c index a2c3ac679..b5d5e6da4 100644 --- a/riscv-coremark/coremark/core_main.c +++ b/riscv-coremark/coremark/core_main.c @@ -96,7 +96,7 @@ MAIN_RETURN_TYPE main(void) { MAIN_RETURN_TYPE main(int argc, char *argv[]) { #endif //const char s[] = "Elizabeth"; - //ee_printf("eeprint"); + ee_printf("eeprint"); //ee_printf("Trying to print: %d", 0); /*gg_printf("Elizabeth");*/ //sendstring("Elizabeth"); @@ -198,7 +198,7 @@ MAIN_RETURN_TYPE main(int argc, char *argv[]) { if (results[i].execs & ID_LIST) { ee_printf("loop"); ee_printf("%d \n", MULTITHREAD); - ee_printf("%d \n sizethread ", results[0].size); + ee_printf("%d \n sizethread \n", results[0].size); results[i].list=core_list_init(results[0].size,results[i].memblock[1],results[i].seed1); @@ -212,20 +212,6 @@ MAIN_RETURN_TYPE main(int argc, char *argv[]) { } } - /*int foreverLoop = 1; - secs_ret timing = 0; - int timingInt; - ee_printf("\nENTERING FOREVER WHILE LOOP\n"); - while(foreverLoop == 1) - { - start_time(); - //filler - stop_time(); - timing += time_in_secs(get_time()); - timingInt = (int)timing; - ee_printf("Timing is %d\n", timingInt); - }/* - /* automatically determine number of iterations if not set */ if (results[0].iterations==0) { secs_ret secs_passed=0; @@ -257,6 +243,7 @@ MAIN_RETURN_TYPE main(int argc, char *argv[]) { ee_printf("iterations is %d\n", results[0].iterations); } /* perform actual benchmark */ + ee_printf("iterations is %d\n", results[0].iterations); ee_printf("Starting benchmark\n"); start_time(); #if (MULTITHREAD>1) @@ -376,7 +363,7 @@ MAIN_RETURN_TYPE main(int argc, char *argv[]) { unsigned long long tmp = (unsigned long long) 1000.0*default_num_contexts*results[0].iterations/time_in_secs(total_time); secs_ret totalmsecs = time_in_secs(total_time); int totalmint = (int) totalmsecs; - ee_printf("ELAPSED S: %d\n", totalmint); + ee_printf("ELAPSED TIME: %d\n", totalmint); ee_printf("CoreMark 1.0 : %d / %s %s\n",tmp,COMPILER_VERSION,COMPILER_FLAGS); #if defined(MEM_LOCATION) && !defined(MEM_LOCATION_UNSPEC) From c721341691cd6406e4635ed72795b602f553bc4a Mon Sep 17 00:00:00 2001 From: Abe Date: Wed, 7 Jul 2021 02:28:11 -0400 Subject: [PATCH 5/6] Commented out printf statements for quicker simulation time. Also added function minstretDiff, which calculates the number of machine instructions retired during the coremark benchmark's runtime, excluding setup time. --- .../riscv64-baremetal/core_portme.c | 38 +++++++++++++------ 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/riscv-coremark/riscv64-baremetal/core_portme.c b/riscv-coremark/riscv64-baremetal/core_portme.c index 1502fd42c..43e204a57 100755 --- a/riscv-coremark/riscv64-baremetal/core_portme.c +++ b/riscv-coremark/riscv64-baremetal/core_portme.c @@ -125,14 +125,27 @@ void portable_free(void *p) { #if SAMPLE_TIME_IMPLEMENTATION /** Define Host specific (POSIX), or target specific global time variables. */ static CORETIMETYPE start_time_val, stop_time_val; +static unsigned long start_instr_val, stop_instr_val; -/* Function: minstret +/* Function: minstretFunc This function will count the number of instructions. */ -void minstretFunc(void) +unsigned long minstretFunc(void) { - unsigned long minstretAttempt = read_csr(minstret); - ee_printf("Minstret is %lu\n", minstretAttempt); + unsigned long minstretRead = read_csr(minstret); + //ee_printf("Minstret is %lu\n", minstretRead); + return minstretRead; +} + +/* Function: minstretDiff + This function will take the difference between the first and second reads from the + MINSTRET csr to determine the number of machine instructions retired between two points + of time +*/ +unsigned long minstretDiff(void) +{ + unsigned long minstretDifference = MYTIMEDIFF(stop_instr_val, start_instr_val); + return minstretDifference; } /* Function: start_time @@ -142,10 +155,10 @@ void minstretFunc(void) or zeroing some system parameters - e.g. setting the cpu clocks cycles to 0. */ void start_time(void) { - minstretFunc(); + start_instr_val = minstretFunc(); GETMYTIME(start_time_val); - ee_printf("Timer started\n"); - ee_printf(" MTIME: %u\n", start_time_val); + //ee_printf("Timer started\n"); + //ee_printf(" MTIME: %u\n", start_time_val); #if CALLGRIND_RUN CALLGRIND_START_INSTRUMENTATION #endif @@ -167,9 +180,9 @@ void stop_time(void) { asm volatile("int3");/*1 */ #endif GETMYTIME(stop_time_val); - minstretFunc(); - ee_printf("Timer stopped\n"); - ee_printf(" MTIME: %u\n", stop_time_val); + stop_instr_val = minstretFunc(); + //ee_printf("Timer stopped\n"); + //ee_printf(" MTIME: %u\n", stop_time_val); } /* Function: get_time Return an abstract "ticks" number that signifies time on the system. @@ -182,7 +195,8 @@ void stop_time(void) { */ CORE_TICKS get_time(void) { CORE_TICKS elapsed=(CORE_TICKS)(MYTIMEDIFF(stop_time_val, start_time_val)); - ee_printf(" Elapsed MTIME: %u\n", elapsed); + //ee_printf(" Elapsed MTIME: %u\n", elapsed); + //ee_printf(" Elapsed MINSTRET: %lu\n", minstretDiff()); return elapsed; } /* Function: time_in_secs @@ -194,7 +208,7 @@ CORE_TICKS get_time(void) { secs_ret time_in_secs(CORE_TICKS ticks) { secs_ret retval=((secs_ret)ticks) / (secs_ret)EE_TICKS_PER_SEC; int retvalint = (int)retval; - ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retvalint); + //ee_printf("RETURN VALUE FROM TIME IN SECS FUNCTION: %d\n", retvalint); return retval; } #else From 84711fbdc8849e72bff4015985308f5c9dfa82db Mon Sep 17 00:00:00 2001 From: Abe Date: Wed, 7 Jul 2021 02:37:09 -0400 Subject: [PATCH 6/6] Updated MISA defining as well as porting sizes for peripherals (34 to 56) --- .../config/coremark_bare/wally-config.vh | 29 ++++++++++--------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/wally-pipelined/config/coremark_bare/wally-config.vh b/wally-pipelined/config/coremark_bare/wally-config.vh index 95441f8f0..45f04cffb 100644 --- a/wally-pipelined/config/coremark_bare/wally-config.vh +++ b/wally-pipelined/config/coremark_bare/wally-config.vh @@ -34,7 +34,8 @@ `define XLEN 64 //`define MISA (32'h00000104) -`define MISA (32'h00001104 | 1<<5 | 1<<18 | 1 << 20 | 1 << 12 | 1 << 0) +//`define MISA (32'h00001104 | 1<<5 | 1<<18 | 1 << 20 | 1 << 12 | 1 << 0) +`define MISA (32'h00000104 | 0 << 5 | 0 << 3 | 1 << 18 | 1 << 20 | 1 << 12 | 1 << 0) `define ZCSR_SUPPORTED 1 `define COUNTERS 32 `define ZCOUNTERS_SUPPORTED 1 @@ -53,7 +54,7 @@ `define DTLB_ENTRIES 32 // Legal number of PMP entries are 0, 16, or 64 -`define PMP_ENTRIES 16 +`define PMP_ENTRIES 64 // Address space `define RESET_VECTOR 64'h0000000080000000 @@ -66,23 +67,23 @@ // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits `define BOOTTIM_SUPPORTED 1'b1 -`define BOOTTIM_BASE 34'h00001000 -`define BOOTTIM_RANGE 34'h00000FFF +`define BOOTTIM_BASE 56'h00001000 +`define BOOTTIM_RANGE 56'h00000FFF `define TIM_SUPPORTED 1'b1 -`define TIM_BASE 34'h80000000 -`define TIM_RANGE 34'h07FFFFFF +`define TIM_BASE 56'h80000000 +`define TIM_RANGE 56'h07FFFFFF `define CLINT_SUPPORTED 1'b1 -`define CLINT_BASE 34'h02000000 -`define CLINT_RANGE 34'h0000FFFF +`define CLINT_BASE 56'h02000000 +`define CLINT_RANGE 56'h0000FFFF `define GPIO_SUPPORTED 1'b1 -`define GPIO_BASE 34'h10012000 -`define GPIO_RANGE 34'h000000FF +`define GPIO_BASE 56'h10012000 +`define GPIO_RANGE 56'h000000FF `define UART_SUPPORTED 1'b1 -`define UART_BASE 34'h10000000 -`define UART_RANGE 34'h00000007 +`define UART_BASE 56'h10000000 +`define UART_RANGE 56'h00000007 `define PLIC_SUPPORTED 1'b1 -`define PLIC_BASE 34'h0C000000 -`define PLIC_RANGE 34'h03FFFFFF +`define PLIC_BASE 56'h0C000000 +`define PLIC_RANGE 56'h03FFFFFF // Test modes