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Fixed bug in the btb branch logging.

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We were only logging branch instructions not all control flow instructions which dramatically skewed the results for sim_bp.
This commit is contained in:
Rose Thompson 2023-11-15 14:51:47 -06:00
parent feb45b9b59
commit 5d4a89b27c
1 changed files with 20 additions and 5 deletions
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25
testbench/common/loggers.sv
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@ -213,26 +213,41 @@ module loggers import cvw::*; #(parameter cvw_t P,
if (P.BPRED_SUPPORTED) begin : BranchLogger
if (BPRED_LOGGER) begin
string direction;
int file;
int file, CFIfile;
logic PCSrcM;
string LogFile;
string LogFile, CFILogFile;
logic resetD, resetEdge;
flopenrc #(1) PCSrcMReg(clk, reset, dut.core.FlushM, ~dut.core.StallM, dut.core.ifu.PCSrcE, PCSrcM);
flop #(1) ResetDReg(clk, reset, resetD);
assign resetEdge = ~reset & resetD;
initial begin
LogFile = "branch.log"; // will break some of Ross's research analysis scripts
CFILogFile = "cfi.log"; // will break some of Ross's research analysis scripts
//LogFile = $psprintf("branch_%s%0d.log", P.BPRED_TYPE, P.BPRED_SIZE);
file = $fopen(LogFile, "w");
CFIfile = $fopen(CFILogFile, "w");
end
always @(posedge clk) begin
if(resetEdge) $fwrite(file, "TRAIN\n");
if(StartSample) $fwrite(file, "BEGIN %s\n", memfilename);
if(resetEdge) begin
$fwrite(file, "TRAIN\n");
$fwrite(CFIfile, "TRAIN\n");
end
if(StartSample) begin
$fwrite(file, "BEGIN %s\n", memfilename);
$fwrite(CFIfile, "BEGIN %s\n", memfilename);
end
if(dut.core.ifu.InstrClassM[0] & ~dut.core.StallW & ~dut.core.FlushW & dut.core.InstrValidM) begin
direction = PCSrcM ? "t" : "n";
$fwrite(file, "%h %s\n", dut.core.PCM, direction);
end
if(EndSample) $fwrite(file, "END %s\n", memfilename);
if((|dut.core.ifu.InstrClassM) & ~dut.core.StallW & ~dut.core.FlushW & dut.core.InstrValidM) begin
direction = PCSrcM ? "t" : "n";
$fwrite(CFIfile, "%h %s\n", dut.core.PCM, direction);
end
if(EndSample) begin
$fwrite(file, "END %s\n", memfilename);
$fwrite(CFIfile, "END %s\n", memfilename);
end
end
end
end