Updated arty a7 fpga top.

This commit is contained in:
Ross Thompson 2023-07-17 15:55:57 -05:00
parent c7283f8c83
commit 5ce4ac963f

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@ -225,7 +225,7 @@ module fpgaTop
.peripheral_aresetn(peripheral_aresetn)); .peripheral_aresetn(peripheral_aresetn));
// wally // wally
wallypipelinedsoc wallypipelinedsoc wallypipelinedsocwrapper wallypipelinedsocwrapper
(.clk(CPUCLK), (.clk(CPUCLK),
.reset_ext(bus_struct_reset), .reset_ext(bus_struct_reset),
// bus interface // bus interface