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Start of IFU cleanup

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This commit is contained in:
David Harris 2022-01-25 17:31:53 +00:00
parent 0660e5fe51
commit 5cb879129e
1 changed files with 2 additions and 7 deletions
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9
pipelined/src/ifu/ifu.sv
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@ -250,14 +250,12 @@ module ifu (
.HRESPRam(), .HREADYRam()); .HRESPRam(), .HREADYRam());
-----/\----- EXCLUDED -----/\----- */ -----/\----- EXCLUDED -----/\----- */
assign FinalInstrRawF = FinalInstrRawF_FIXME[31:0]; assign FinalInstrRawF = FinalInstrRawF_FIXME[31:0];
assign BusStall = 0; assign BusStall = 0;
assign IFUBusRead = 0; assign IFUBusRead = 0;
assign ICacheBusAck = 0; assign ICacheBusAck = 0;
assign SelUncachedAdr = 0; assign SelUncachedAdr = 0;
assign IFUBusAdr = 0; assign IFUBusAdr = 0;
end else begin : bus end else begin : bus
genvar index; genvar index;
for (index = 0; index < WORDSPERLINE; index++) begin:fetchbuffer for (index = 0; index < WORDSPERLINE; index++) begin:fetchbuffer
@ -381,10 +379,7 @@ module ifu (
.s(`MEM_IROM ? reset : reset_q), .s(`MEM_IROM ? reset : reset_q),
.y(UnalignedPCNextF)); .y(UnalignedPCNextF));
flop #(1) resetReg (.clk(clk), flop #(1) resetReg (.clk(clk), .d(reset),.q(reset_q)); // delay reset
.d(reset),
.q(reset_q));
flopenrc #(1) BPPredWrongMReg(.clk, .reset, .en(~StallM), .clear(FlushM), flopenrc #(1) BPPredWrongMReg(.clk, .reset, .en(~StallM), .clear(FlushM),
.d(BPPredWrongE), .q(BPPredWrongM)); .d(BPPredWrongE), .q(BPPredWrongM));